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Indian Institute of Technology Kharagpur

Course Name: VLSI PHYSICAL DESIGN

Assignment- Week 5
TYPE OF QUESTION: MCQ/MSQ/SA
Number of questions: 10 Total mark: 10 x 1 = 10
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QUESTION 1:
Which of the following is/are true for the spider leg clock distribution network?
a. A separate wire is laid out from the clock source to each of the destinations.
b. Use separate drivers on each of the wires.
c. Sometime a wire is shared from the clock source to multiple destinations.
d. Use a single powerful driver to drive all the output lines.

Correct Answer: a, d

Detailed Solution: In the spider-leg clock distribution network, a single powerful driver is used
in cascade with the clock source, and separate wires are laid out to each of the clock destination
points. The layout looks like the legs of a spider.
Hence, the correct options are (a) and (d).
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QUESTION 2:
What of the following are the main purposes of using buffers in a clock tree network?
a. To reduce the overall area requirements.
b. To reduce the jitter.
c. To reduce the delay.
d. To amplify the current source.

Correct Answer: c, d

Detailed Solution: In general, buffers are used to minimize the transmission delay of a signal,
amplify the current and also to reconstruct the signal. It adds to the area, and has nothing to do
with jitter. Hence, the correct options are (c) and (d).
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QUESTION 3:
What is true for CMOS transmission gate?
a. One nMOS and one pMOS transistors are connected in parallel where both of
the transistors are either turned on or turned off at any given time.
b. Two nMOS and a pMOS transistors are connected in parallel where exactly one
of them conducts at any given time.
c. One nMOS and one pMOS transistors are connected in series.
d. None of these

Correct Answer: a

Detailed Solution: A transmission gate is constructed by connecting a pMOS and an nMOS

transistor in parallel, such that both of them are turned OFF or both of them are turned ON at any
given time. The correct option is (a).
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QUESTION 4:
Which of the following statement(s) is/are false for CMOS circuits?
a. An nMOS transistor passes logic 0 signal without any degradation.
b. An nMOS transistor passes logic 1 signal without any degradation.
c. A pMOS transistor passes logic 0 signal without any degradation.
d. A pMOS transistor passes logic 1 signal without any degradation.

Correct Answer: b, c

Detailed Solution: An nMOS transistor can pass a low voltage (logic 0) without degradation,
but degrades a high voltage (logic 1). In contrast, a pMOS transistor can pass a high voltage
(logic 1) without degradation, but degrades a low voltage (logic 0).
Hence, the correct options are (b) and (c).
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QUESTION 5:
Which of the following techniques can mitigate the clock skew problem in a circuit?
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a. Increase the frequency of the clock.

b. Make the maximum delays of each combinational circuit block between pairs of
register stages equal.
c. Equalize the delays of all the critical paths.
d. Make the delay from the clock source to all the clock sink points equal.
Correct Answer: d

Detailed Solution: Clock skew can be handled by making the delays from the clock source to all
the clock sink points equal. None of (a), (b) or (c) can eliminate clock skew. Hence, the correct
option is (d).
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QUESTION 6:
Which of the following strategies can reduce the propagation delay of a long interconnection
line?
a. Reduce the width of the line.
b. Increase the width of the line.
c. Insert one or more buffers along the line.
d. All of these.

Correct Answer: c

Detailed Solution: Reducing the width of the line increases its resistance, while increasing the
width of the line increases its capacitance. As such, they do not serve the purpose of reducing the
interconnection RC delay. Delay can be reduced by reducing the segment lengths of a long
interconnection line through insertion of buffers.
The correct option is (c).
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QUESTION 7:
Which of the following statements are true?
a. The X‐tree topology has better crosstalk effects as compared to the H‐tree
topology.
b. The H‐tree topology has better crosstalk effects as compared to the X‐tree
topology.
c. In power routing, the widths of various segments of the wires may vary.
d. In H‐tree the distance from clock source to each of the clock sink is same.
Correct Answer: b, c, d
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Detailed Solution: The X-tree topology is not good with respect to crosstalk as some of the wire
segments can run very close to each other. This does not happen with the H-tree topology. In H-
tree the distance from clock source to each of the clock sink is same. Also, in power routing,
based on the maximum current that may flow, the widths of various wire segments may be
different.
Hence, the correct options are (b), (c) and (d).
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QUESTION 8:
For a H‐tree clock network connecting 16 points, the Manhattan distance from the center point
of the tree to any of the terminal points in units of grid cells will be __________ units.
Correct Answer: 11

Detailed Solution: A H-tree clock network can be extended to any number of levels for
connecting 4, 16, 64, 256, … points respectively. From the layout of a 2-level H-tree connecting
16 points, the Manhattan distance from the center to any of the terminal points can be counted to
be 11. This follows from the diagram.
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QUESTION 9:
When the target clock nodes are located in arbitrary locations all around a chip, which of the
following strategies is/are undesirable?
a. A pure H‐tree or X‐tree topology.
b. A two‐level structure with a clock mesh being driven by a regular H‐tree.
c. A spider leg network.
d. A two‐level structure with a clock mesh being driven by a regular X‐tree.
Correct Answer: a, d

Detailed Solution: H-tree or X-tree topologies are advantageous when the target clock nodes are
uniformly distributed. Also, a spider leg network is not very flexible and very rarely used. The
two-level structure is the most suitable one when the target clock nodes are distributed in
arbitrary locations.
Hence, the correct options are (a) and (d).
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QUESTION 10:
Which of the following clock routing algorithm follows top‐down approach?
a. Method of Means and Medians (MMM) algorithm.
b. H‐tree based algorithm.
c. Recursive Geometric Matching (RGM) algorithm.
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d. All of these.

Correct Answer: a, b

Detailed Solution: MMM and H-tree follow top-down approach while RGM follows a bottom-
up approach.
Hence, the correct options are (a) and (b).
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