Computer

Architecture and Logic

Design
Lecture: 03
Engr. Irshad Hussain
Department of Software Engineering, UET ATD
Combinational Logic
Circuits Part II -
Theoretical Foundations
Overview
 Simplifying Boolean Functions
 Algebraic Manipulation
 Karnaugh Map Manipulation (simplifying functions of 2, 3, 4 variables)
 Systematic Approach for Simplifying Functions using K-maps
 Implicants, Prime Implicants (PIs), and Essential Prime Implicants
 Simplifying Functions using Essential and Nonessential PIs
 Product-Of-Sum Simplification
 Don’t-care Conditions and Simplification using Don’t Cares
 Algorithmic Techniques for Simplification
 Basic Boolean Functions
 Basic Boolean functions of 1 and 2 binary variables
 Logic Basis and Conversions
 Basis AND-OR-NOT, Basis NAND, Basis NOR
 Logic Gates (NOT, AND, OR, NAND, NOR, XOR, XNOR)
 Combinational Logic Circuits from Boolean Functions
 Circuits with AND-OR-NOT gates, with NAND gates, with NOR gates
Boolean Functions as
Equations
Simplifying a Boolean
Function
 Why simplify Boolean functions?

 Boolean functions are used to design digital logic

circuits. Simpler Boolean function can mean
cheaper, smaller, faster circuit (more details later).
 Three main approaches to simplify Boolean
functions:
 Algebraic Manipulations – using Boolean algebra as a
tool for simplifications.
 Karnaugh Map Manipulations – very easy graphical
method to simplify Boolean functions (it works for
functions of up to 4 variables).
 Algorithmic Techniques – used to program a computer
to do the simplifications.
Algebraic Manipulation
Karnaugh Map Manipulations
 We can use a K-map to simplify a Boolean function of 2, 3,
or 4 variables as Sum-Of-Products.
 Procedure:
 Enter 1s in the K-map for each minterm (product term) in the
function.
 Group adjacent K-map cells containing 1s to obtain a product with
fewer variables. The number of cells in a group must be a power of
2 (2, 4, 8, …).
 Try to group as much as possible cells containing 1s when making
a group (such group corresponds to a simpler product term).
 Try to make as less as possible groups to cover all cells containing
1s (this corresponds to fewer product terms in the simplified
function).
 Do not forget to handle boundary cells for K-maps of 3 or 4
variables when you do the grouping.
 Important: The result after the simplification may not be unique.
Simplifying a Boolean Function using 2-variable K-
map (examples)
Simplifying a Boolean Function using 3-variable K-
map (groupings)
Simplifying a Boolean Function using 3-variable K-
map (examples)
Simplifying a Boolean Function using 3-variable K-
map (examples)
Simplifying a Boolean Function using 4-variable K-
map (grouping examples)
Simplifying a Boolean Function using 4-variable K-
map (examples)
Grouping Cells in a K-map Systematically

 The procedure for combining cells in a K-map may be made more

systematic if we introduce the terms: implicants, prime implicants,
and essential prime implicants.
 An Implicant (I) of a function F is a product term which implies F,
i.e., F = 1 whenever I = 1.
 All minterms of a function F are implicants of F.

 All rectangles in a K-map made up of cells containing 1s

correspond to implicants.
 An implicant of F is called a Prime Implicant (PI) if any product
term obtained by deleting a literal of PI is NOT an implicant of F.
 Thus, a prime implicant is not contained in any “larger” implicant.
 On a K-map of n-variable function, the set of prime implicants

corresponds to the set of all rectangles made up of 2m cells

containing 1s (m = 0, 1,2,…,n), with each rectangle containing as
many cells as possible.
Example of Prime Implicants
(PIs)
Consider function F(W,X,Y,Z)
whose K-map is shown at right.
 Product terms Z’, XY, WX’Y’ are
prime implicants. Why?
 Consider the term XY and obtain
terms by deleting any literal:
 We get two terms: term X and term Y.
 Both terms are NOT implicants of F.
 Thus, the term XY is prime implicant.
 Y’Z’ is not a prime implicant
because it is contained in Z’.
 WXY is not a prime implicant
because it is contained in XY.
Essential Prime Implicants
(EPIs)
If a minterm of a function F is included
in ONLY one prime implicant pi, then
pi is an Essential Prime Implicant of F.
 An essential prime implicant MUST
appear in all possible SOP
expressions of function F.
 To find essential prime implicants:
 Generate all prime implicants of a
function
 Select those prime implicants that contain
at least one 1 that is not covered by
any other prime implicant.
 For the previous example, the PIs are
Z’, XY, and WX’Y’; all of these are
essential.
Essential Prime Implicants
(examples)
Systematic Procedure for
Simplifying Boolean Functions
 Given : The K-map of a Boolean function
 Obtain: The simplest SOP expression for the
function

1. Find all primary implicants (PIs) of the function.

2. Select all essential PIs.
3. For remaining minterms not included in the essential
PIs, select a set of other PIs to cover them, with
minimal overlap in the set. The resulting simplified
function is the logical
4. OR of the product terms selected above.
Example
Other Examples
Other Examples (cont.)
Product-Of-Sum (POS)
Simplification
So far, we have considered simplification of a Boolean
function expressed in Sum-Of-Products (SOP) form using
a K-map .
 Sometimes the Product-Of-Sums form of a function is
simpler than the SOP form.
 Can we use K-maps to simplify a Boolean function in
Product-Of-Sums form?
 Procedure:
 Use sum-of-products simplification on the zeros of function F in
the K-map. In this way you will get the simplified complement of
F (F’).
 Find the complement of F’ which is F, i.e., (F’)’ = F
 Recall that the complement of a Boolean function can be obtained by (1)
taking the dual and (2) complementing each literal.
 OR, using DeMorgan’s Theorem.
POS Simplification Example
Don’t-Care Conditions
 Sometimes a Boolean function is not specified for
some variable value combinations. Why?
 There may be a combination of input values which will
never occur.
 If they do occur, the value of the function is of no concern.
 The function value for such combinations is called a
don't-care and the combination is called don’t-care
condition.
 The don’t-care function values are usually denoted
with x. Each x may be arbitrarily assigned the value 0
or 1 in an implementation.
 Don’t-cares can be used to further simplify a function.
Simplification using Don’t-
Cares
 Treat don't-cares as if they are 1s to generate

prime implicants in order to produce simple

expressions.
 Delete prime implicants that cover only don't-
care minterms.
 Treat the covering of remaining don't care
minterms as optional in the selection process
(i.e. they may be, but need not be, covered).
Example with Don’t-Care
Conditions
 Consider the following incompletely specified

function F that has three don’t-care minterms d:

 F(A,B,C,D) = ∑m(1,3,7,11,15)
 d(A,B,C,D) = ∑m(0,2,5)
Other Examples with Don’t-
Cares (1)
Other Examples with Don’t-
Cares (2)
 Simplify the function F(A,B,C,D)

whose K-map is shown at the top-

right.
 F = A’BC’+AB’+CD’+A’C’D
or
 F = A’BD’+AB’+CD’+A’C’D
 The middle two terms are EPIs,
while the first and last terms are
selected to cover the minterms m1,
m4, and m5.
 There’s a third solution! Can you
find it?
Algorithmic Techniques for Simplification

 Simplification of Boolean functions using a K-

maps works for functions of up to 4 variables.
 What do we do for functions with more than 4-
5 variables?
 You can “code up” a minimiser (Computer-
Aided Design, CAD).
 Quine-McCluskey algorithm
 Iterated consensus
 We won’t discuss these techniques here.
 Search on Internet to find more information
about the Quine-McCluskey algorithm.
Basic Boolean Functions
 Given N binary variables there exist Boolean
functions of these N variables.
 Some functions of 1 and 2 variables we will call
Basic Boolean Functions.
 There exist 4 Boolean functions of 1 variable.
 The truth tables and names of these functions
are given below:
Boolean Functions of 2
Variables (1)
Boolean Functions of 2
Variables (2)
Logic Basis
 Definition: Logic Basis is a minimal set of basic
Boolean functions with which an arbitrary Boolean
function can be represented.
 Logic Basis AND-OR-NOT
 This set consists of functions G9, G15, and F2
 G9(X,Y) = X•Y -- this function equals to logic operation AND
 G15(X,Y) = X+Y -- this function equals to logic operation OR
 F2(X) = X’ -- this function equals to logic operation NOT
 We have seen in previous lectures that using the
basic logic operations (AND,OR,NOT) we can
represent any Boolean functions.
 Thus, functions G9, G15, and F2 form a logic basis.
Logic Basis NAND
 Basic Boolean function NAND (G8) is a logic basis.
 Proof: we will show that with function NAND we can
represent the basic logic operations AND, OR, and
NOT, which implies that we can represent any Boolean
function.
 Function NAND is G8(X,Y) = (X•Y)’
 Function NOT is F2(X) = X’ = (X•X)’ = G8(X,X)
 Function AND is G9(X,Y) = X•Y = ((X•Y)’)’ =
= ( (X•Y)’ • (X•Y)’ )’ =
= G8( G8(X,Y) , G8(X,Y) )
 Function OR is G15(X,Y) = X+Y = ((X+Y)’)’ = (X’•Y’)’ =
= ( (X•X)’ • (Y•Y)’ )’ =
= G8( G8(X,X) , G8(Y,Y) )
Logic Basis NOR
 Basic Boolean function NOR (G2) is a logic basis.
 Proof: we will show that with function NOR we can
represent the basic logic operations AND, OR, and
NOT which implies that we can represent any Boolean
function.
 Function NOR is G2(X,Y) = (X+Y)’
 Function NOT is F2(X) = X’ = (X+X)’ = G2(X,X)
 Function AND is G9(X,Y) = X•Y = ((X•Y)’)’ = (X’+Y’)’ =
= ( (X+X)’ + (Y+Y)’ )’ =
= G2( G2(X,X) , G2(Y,Y) )
 Function OR is G15(X,Y) = X+Y = ((X+Y)’)’ =
= ( (X+Y)’ + (X+Y)’ )’ =
= G2( G2(X,Y) , G2(X,Y) )
Converting Boolean Functions from basis AND-OR-NOT to basis NAND

 Any Boolean function in basis AND-OR-NOT can be

converted to basis NAND using the DeMorgan’s
theorem.
 Examples:
H1(W,X,Y,Z) = W’X’+W’Y’+WXY+ W’Z =
= (( W’X’+W’Y’+WXY+ W’Z )’)’ =
= ( (W’X’)’ • (W’Y’)’ • (WXY)’ • (W’Z)’ )’
H2(X,Y,Z) = (X+Y+Z) • (Y’+Z’) =
= (( X+Y+Z )’)’ • (( Y’+Z’ )’)’ =
= (X’Y’Z’)’ • (YZ)’ =
= (( (X’Y’Z’)’ • (YZ)’ )’)’
Converting Boolean Functions from basis AND-OR-NOT to basis NOR

 Any Boolean function in basis AND-OR-NOT can be

converted to basis NOR using the DeMorgan’s theorem.
 Examples:

H1(W,X,Y,Z) = W’X’+W’Y’+WXY+ W’Z =

= ((W’X’)’)’ + ((W’Y’)’)’ + ((WXY)’)’ + ((W’Z)’)’ =
= (W+X)’ + (W+Y)’ + (W’+X’+Y’)’ + (W+Z’)’ =
= (( (W+X)’ + (W+Y)’ + (W’+X’+Y’)’ + (W+Z’)’ )’)’

H2(X,Y,Z) = (X+Y+Z) • (Y’+Z’) =

= (( (X+Y+Z) • (Y’+Z’) )’)’ =
= ( (X+Y+Z)’ + (Y’+Z’)’ )’
Logic Gates
 Digital Systems are made out of digital circuits.
 Digital circuits are hardware components that
manipulate binary information.
 Certain well defined basic (small) digital circuits
are called Logic Gates.
 Logic Gates are electronic circuit components
that operate on one or more input signals to
produce an output signal.
 Logic Gates implement basic Boolean functions
of one or more variables.
 Let us look at some Logic Gates.
Inverter (NOT Gate)
Buffer
AND Gate
OR Gate
NAND Gate
NOR Gate
XOR Gate
XNOR Gate
Combinational Logic Circuits
from Boolean Functions
 Logic Gates implement basic Boolean functions.
 Using a set of basic Boolean functions called a Logic
Basis, we can represent any Boolean function.
 Thus, the Logic Gates that implement the functions
in a Logic Basis can be used to implement any
Boolean function.
 Outputs of Logic Gates are connected to inputs of
other gates to form a Combinational Logic Circuit.
 Combinational Logic Circuits implement Boolean
functions.
Combinational Logic Circuits from Boolean Functions in basis AND-OR-NOT
Combinational Logic Circuits
from Boolean Functions in
basis NAND
Combinational Logic Circuits
from Boolean Functions in
basis NOR
Combinational Logic Circuits
from
Boolean
circuit, we must Functions (cont.)
In order to design a cost-effective and efficient


minimize the circuit’s size (area)

and propagation delay (time required for an input
signal change to be observed at the output line).
 We do this by simplifying and optimizing the
Boolean function that the circuit implements.
 Observe the truth table of
F = A’ + B•C’ + A’•B’ and G = A’ + B•C’
 Truth tables for F and G are identical - same
function.
 Use G to implement the logic circuit because
less components (gates) are needed.
Combinational Logic Circuits
from
Boolean Functions (cont.)
Digital Logic Circuits

PHYSICAL
IMPLEMENTATION
BASICS
Overview
 Integrated Circuits
 Level of Integration
 Integrated Circuit Technologies
 CMOS Circuits
 MOS Transistors as Switches
 Basic Gates as CMOS circuits
 Basic Technology Parameters
 Propagation Delay of Gates and Logic Circuits
 Size of Gates and Logic Circuits
 Design Trade-Offs
 Two-Level Circuit Optimization
 Multiple-Level Circuit Optimization
 Basic Assumption for Logic Gates
Integrated Circuits (ICs)
 Digital Systems are made out of digital circuits.
 Certain well defined basic (small) digital circuits
are called Logic Gates.
 Gates have inputs and outputs and perform
specific mathematical logic operations.
 Outputs of gates are connected to inputs of
other gates to form a digital logic circuit.
 Digital logic circuits are physically implemented
using transistors and interconnections in
complex semiconductor devices called
integrated circuits.
Integrated Circuits (cont.)
Integrated Circuits - Level of Integration

 An IC is a silicon semiconductor crystal (chip) that contains a

network of transistors. The number of transistors determines the
Level of Integration:
 Small-scale Integration (SSI)
Several transistors (<40) per chip.
 Medium-scale Integration (MSI)
Between 40-400 transistors per chip. Perform basic digital
functions, e.g., 4-bit addition, multiplication, etc.
 Large-scale Integration (LSI)
Between 400 and a few thousands of transistors per chip.
Implement digital systems, e.g. small processors and memories.
 Very Large-scale Integration (VLSI)
Several thousands to over 1 billion transistors per chip.
Implements complex digital systems, e.g., complex
microprocessors, multi-processor systems on-chip, etc.
Integrated Circuit
Technologies
CMOS Circuits
MOS Transistors as Switches
NOT (Inverter) Gate as CMOS
circuit
Basic Gates as CMOS Circuits
Basic Gates as CMOS Circuits
Basic Technology Parameters
Characterizing Digital Logic Gates

 Fan-in: # of gate inputs (usually up to 4 or 5).

 Fan-out: # of standard loads a gate’s output can
drive without impairing gate performance (up to 8).
 Size: area on the silicon crystal occupied by the
layout cell for the circuit corresponding to the gate.
The area is proportional to the size of a transistor.
 Power dissipation: power consumed by the gate
(dissipated as heat).
 Propagation delay: time required for an input
signal change to be observed at an output line.
Propagation Delay of Gates
Propagation Delay of Logic
Circuits
Size of Gates
Size of Logic Circuits
Design Trade-Offs
 In order to design a cost-effective and efficient circuit, we must
minimize the circuit’s size (area) and propagation delay (time
required for an input signal change to be observed at the output
line).
 We do this by simplifying the Boolean function (expression) that
the circuit implements.
 A Boolean function can be represented as a Two-Level
expression (Standard SOP form) or as a Multiple-Level
expression.
 Example of Two-Level expression: G=ABC+ABD+E+ACF+ADF
 1st level are the AND operations in each term
 2nd level are the OR operations among the terms
 Example of Multiple-Level expression: G = A•(B+F)•(C+D) + E
 1st level are the OR operations in the brackets
 2nd level are the AND operations among the terms A, (B+F), (C+D)
 3rd level is the OR operation between A(B+F)(C+D) and E
Design Trade-Offs: Two-Level Circuit
Optimization
Any combinational digital circuit can be constructed as Two-Level circuit. Why?
 Because the corresponding Boolean function always can be represented as
Two-Level expression, i.e., in Standard Sum-Of-Products form. To do this use
the simplification techniques (Algebraic and/or K-map manipulations) discussed
earlier in the course.
 A Two-Level circuit gives you the smallest propagation delay (the fastest circuit)
but the circuit’s area is not optimal.
Design Trade-Offs: Multiple-Level Circuit
Optimization
A Multiple-Level circuit can give you the smallest possible circuit’s area but the
propagation delay is not the smallest possible.
 There is not a formal procedure how to obtain an optimal Multiple-Level circuit.
 You have to simplify the Boolean function corresponding to the circuit by
applying algebraic operations such that to get the simplest possible Multiple-
Level expression.
Basic Assumption for Logic
Gates
We have seen that real logic gates have propagation delay.


However, when we design and functionally analyze logic circuits

at gate level we assume that gates are ideal, i.e., do not suffer
from the physical propagation delays that are inherent in
transistors.