ARM Microcontroller: Acorn Apple Vlsi
ARM Microcontroller: Acorn Apple Vlsi
Back in 1983. There was a company called Acorn computers that was a first to develop and evolve such
ideas “Microcontrollers”. Now these ideas were started to develop the architectural ideas based on the
Reduced Instruction Set Computer (RISC), this concept of microprocessor architecture type that utilizes a
small, highly-optimized set of instructions rather than the highly-specialized set of instructions typically
found in other architectures.
Initially this company ARM was jointly formed, and owned by Acorn which was the initiator, and Apple
and there was another company called VLSI.
This Apple iPhone all of us are familiar with and some of the very popular Nokia phones. They all have
the ARM11 processor inside them. However, the application you decide how much power you need from
the processor. The very simple application you do not need a processor as powerful such as ARM. All you
can use 8-bit PIC microcontrollers, which are very cheap, those are very simple 8-bit processors can we
used them.
But ARM processors are typically 32 bit and above. So, use the ARM processor need reasonably powerful
computation capability that make a heart of embedded system.
ARM processor is existed and the most important thing is that maintain compatibility, which is very
important to generate new instructions-set that added of older instructions are also carried through;
such that a program which was developed within older generation would run pretty well. Therefore, the
design architecture is taken place as:
Functionality of microcontroller are compared based on preference and how much memory would be
required to implement. Such an example that implements an application used a conventional ARM
architecture which requiring 100 kilobytes, but the used ARM have only 120 kilobytes. Therefore, a high
code density is far enough to build the certain application. Otherwise, the limit of built-in memory is not
compatible with application.
There is other problem in which made slower performances that because of low-cost design on-chip
memory, finally the size of designed must be accommodate to the recommendation peripherals that are
need to desired application.
Cortex-M: For machine learning and DSP Arm Cortex-M CPU Architecture
Cortex-A: Best-in-class efficient performance Arm Cortex-A CPU Architecture
Cortex-R: Low latency and high-performance Arm Cortex-R CPU Architecture
CPU and Processor: Processor Intellectual Property Arm CPU and Processor Technology
A high power is not required this ARM 7, and is a very popular architecture that used with mobile phone.
However, ARM 9 is first thing that 5 stages of pipeline; fetch, decode, execute, memory, and write. In
addition, used the new concept of cache memory, to separate between (instruction cache) and (data
cache), like a von Neumann architecture.
Towards Harvard architecture can be developed talking place to produce the ARM 10; the main
difference was the pipeline that give further enhanced by adding another stage called issue. This way the
basic architecture started evolving making the processor more powerful and faster by adding novel
architectural concepts.
ARM family comparison that explores main differences between versions, this table gives a quick
comparison among 4 ARM family members ARM 7, 9, 10 and 11. The clock frequency that provides the
speed of a processor is determined by the clock frequencies are increasing, the processors are becoming
faster in each time frequency.
The power consumption is also a measure of the clock frequency, faster clock more power consumption.
Estimate the power consumption with respect to the clock frequency, every microcontroller has a range
of permissible clock frequencies.
ARM Feature
One of classical example is multiple register and load/store memory, normally the load a value from
memory into one register; in other hands, the ARM processor allows to specify in such a way that the
value loaded into 4 registers. Therefore need 4 clock cycle to write into those 4 registers, multiple cycles,
such multiple data.
Barrel shifter which is very common concept. The barrel shifter is a hardware that allows multiple bit
shifting in very efficiently at a single cycle. ARM architecture and there are many instructions which
directly utilize this barrel shifting capability.
Some of the differences are depend on certain instructions that require a variable number of clock cycles
for execution. While the RISC, all instructions should be exhibited executed in a single clock cycle, but in
ARM some of instructions can be more complex, therefore require multiple clocks.
Another feature is that in ARM; this feature is dealing with instruction-set that can be configured as
thumb mode. This mode means thumb is a subset of the of ARM instructions, which works in 16-bit
mode. Normally ARM processor is 32-bit, nonetheless there may be many applications where less power,
therefor a thumb instruction set essential 16-bit instruction set. Further that lead to a shortening of total
code size and less code density.
Note: The Advanced High-performance Bus (AHB) is used to connect components that need higher
bandwidth. These could be internal memory or an external memory interface, DMA etc.