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Lecture #06, Microprocessor - Pins

The document provides an overview of the 8086 microprocessor, detailing its pin configurations for both MIN and MAX modes, power supply requirements, and various signal functions. It describes the roles of key pins, including those for interrupts, data flow, and memory access, as well as differences between the 8086 and 8088 processors. The lecture is presented by Dr. Sharnali Islam from the University of Dhaka and includes references to additional resources.

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Shohag Hawlader Shanto
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5 views13 pages

Lecture #06, Microprocessor - Pins

The document provides an overview of the 8086 microprocessor, detailing its pin configurations for both MIN and MAX modes, power supply requirements, and various signal functions. It describes the roles of key pins, including those for interrupts, data flow, and memory access, as well as differences between the 8086 and 8088 processors. The lecture is presented by Dr. Sharnali Islam from the University of Dhaka and includes references to additional resources.

Uploaded by

Shohag Hawlader Shanto
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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EEE-3103: Microprocessor and Interfacing

Lecture #6: 8086 Microprocessor


8086- Pins

Dr. Sharnali Islam


Department of Electrical and Electronic Engineering
University of Dhaka
[email protected]

Slides used resources from:


Prof. Sazzad M.S. Imran, PhD, EEE DU
Web resources UNDERSTANDING 8085/8086 MICROPROCESSORS - Sen
Pin Diagram of 8086 Microprocessor

MIN mode MAX mode


Pin Diagram of 8086 Microprocessor

Intel 8086 microprocessor → HMOS technology.


29,000 transistors
housed in 40-pin DIP package.

Two pin diagrams → MIN mode and


MAX mode.
Pin-24 to pin-31 differ with each other.

MIN mode (uniprocessor) → Pin 33 high


CPU issues control signals.8086 generates control signals

MAX mode (multiprocessor) →


- Pin 33 low
- Bus controller IC (8288) generates control signals.8288 generates control signals
Pin Diagram of 8086 Microprocessor

(AD0−AD15) = multiplexed lower 16 address lines


(A16/S3−A19/S6) = multiplexed upper 4 address lines.

(A0−A15) → carry address during T1,


carry data during T2, T3 and T4.

(A16–A19) → carry address during T1,


carry status signals during T2, T3 and T4.

A0–A19 → address lines for accessing memory.


can address 220=1MB memory.

A0 to A15 → address lines for accessing I/O’s.


can access 216=64kB of I/O’s.
Pin Diagram of 8086 Microprocessor
Power Supply and Ground:
Pin 40 = 5V DC supply at VCC,
Pin 1 and 20 = ground at VSS.

Clock Signal:
Pin-19 → Clock signal.
5MHz, 8MHz or 10MHz for different versions.

A16/S3—A19/S6 Signals:
Time multiplexed signals.
A19–A16 → address lines during T1 for memory operation.
remain low during I/O operations.
carry status signals during T2–T4.

S4 and S3 = identify segment register for 20-bit physical address generation.


S5 = interrupt enable status.
S6 = remains low during T2 to T4.
Pin Diagram of 8086 Microprocessor
BHE/S7 Signal:

The bus high enable pin is used in the 8086 to enable the most-
significant data bus bits (D15–D8) during a read or a write operation. The
state of S7 is always a logic 1.

BHE and A0 determine references to memory.


Pin Diagram of 8086 Microprocessor
Ready:
Pin 22 is high = device is ready to transfer data.
Pin 22 is low = wait state.

Reset Pin:
Reset signal → applied after 50μS of ‘power on’
active for at least 4 CLK cycles.
execution starts after Reset returns to low value.

During resetting →
Processor immediately terminate its present activity,
All internal register contents = 0000H,
CS = F000H and IP = FFF0H.
execution starts from physical address FFFF0H.
Pin Diagram of 8086 Microprocessor
INTR: A maskable interrupt is an interrupt that can be ignored or disabled by setting a particular bit (IF) in the CPU.
Interrupt request signal →
sampled during last clock cycle of each instruction.

NMI: A non-maskable interrupt is an interrupt that cannot be ignored or disabled. It always gets the CPU’s attention no matter what.
Non-maskable interrupt → edge triggered input,
causes interrupt request to microprocessor.

INTA: (Interrupt Acknowledgement)


Microprocessor receives interrupt request through NMI/INTR,
It acknowledges interrupt through INTA.

TEST Signal:
BUSY output pin of 8087 NDP is connected to TEST input pin.
8087 is busy → pulls TEST signal high,
8086 is made to WAIT
8087 completes its instruction executions,
BUSY signal goes low = TEST input becomes low
8086 goes for execution of its program.
Pin Diagram of 8086 Microprocessor
MN/MX:
High = works in minimum mode;
Low = works in maximum mode.

ALE:
Address latch enable →
positive pulse = availability of valid address on address/data lines.

DT/Rഥ and DEN Pin:


DT/R ഥ = output pin
Sends Receive decides directions of data flow through transreceivers.
data Data
1 = processor sends out data;
0 = processor receives data.

DEN = data enable


availability of data over address/data lines.
active from middle of T2 until middle of T4.
Pin Diagram of 8086 Microprocessor
M/IO:
distinguish between memory and I/O operations.

RD:
signal for read operation from memory or input device.

WR:
write data into memory or output device.

HOLD:
signal to processor
Acknowledges
external devices request to access address/data buses.

HLDA:
Hold Acknowledgement
acknowledges HOLD signal.
Pin Diagram of 8086 Microprocessor
QS1 and QS0:
Queue status signals
provide status of instruction queue.

S2 , S1 and S0 Pins:
output status signals in MAX mode.
indicates type of operation carried out by processor.
active during T4 of previous cycle and
T1 and T2 of current cycle.
passive state during T3 of current bus cycle.
Pin Diagram of 8086 Microprocessor
LOCK Signal:
activated by LOCK prefix instruction
remains active until completion of next instruction.
LOCK = low → all interrupts get masked
HOLD request is not granted.
other devices should not issue HOLD signal to 8086.

RQ/GT1 and RQ/GT0 :


Request/Grant signals
other processors request CPU to release system bus.
when signal is received, CPU sends acknowledgment.
Comparison between 8086 and 8088

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