Microprocessor
Microprocessor
1. The number of address bits that are present in Microprocessor 8085 are
________.
(A) 64 (B) 32
(C) 16 (D) 8
Ans. (C);
8085 microprocessor has 16 bit address ranging from A15 – A8 and AD7 – AD0.
Address bus is unidirectional.
7. 8085 is a-
(A) 8-bit Microprocessor (B) 4-bit Computer processor
(C) 8-bit Mini processor (D) 4-bit Mega processor
Ans. (A);
The Intel 8085 is an 8-bit microprocessor produced by intel. In this microprocessor
NMOS technology is used and it has parallel CPU.
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
8. A microprocessor is called an n-bit microprocessor depending upon
(A) Registers’ length (B) Size of internal data bus
(C) Size of external data bus (D) None of these
Ans. (A);
A microprocessor is called n-bit mirco-processor depending on the size of internal
data bus. In other words it is the number of data lines which are fed to CPU.
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
12. First In First Out (FIFO) is used in
(A) Stack (B) Linked list
(C) Queue (D) Tree
Ans. (C);
First in First Out (FIFO) is used in Queue. It is a method for handling data
structures where the first element is processed first and the newest element is
processes last. It is used in data structures, Disk scheduling and communication
and networking.
14. Which of the following flag conditions are not available in 8085 processor?
(A) Zero flag (B) Parity flag
(C) Overflow flag (D) Auxiliary carry flag
Ans. (C);
In 8085 microprocessor overflow flags are not available. There are five flags in
8085 microprocessor (i) Carry flag (ii) Auxiliary carry flag (iii) Sign flag (iv)
Parity flag (v) Zero flag
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
15. ________ Flag is used only internally for BCD operation and is not available
for the programmer to change the sequence of the program.
(A) Zero flag (B) Parity flag
(C) Carry flag (D) Auxiliary flag
Ans. (D);
x The auxillary carry is used only internally for BCD operation and not available
for programmer.
x The auxillary flag is used by only microprocessor
18. Which one of the following flags is not used or branching in a microprocessor?
(A) Carry flag (B) Auxiliary carry flag
(C) Overflow flag (D) Parity flag
Ans. (B);
Auxiliary carry flag is not used for branching in a microprocessor.
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
19. In 8085 microprocessor the value of the most signification bit of the result
following the execution of any arithmetic or Boolean instruction is stored in
(A) The carry status flag (B) The auxiliary carry status flag
(C) The sign status flag (D) The zero status flag
Ans. (C);
The most significant bit (MSB) represents the sign of the number
x If MSB = 1 Indicates the number is negative and sign flag becomes set.
x If MSB = 0 Indicates the number of positive and sign flag becomes reset.
So, it is stored in the sign status flag.
23. The 8085 has two registers known as primary data pointers. These are
registers
(A) B and C (B) D and E
(C) H and L (D) C and D
Ans. (C);
The valid register pairs in the 8085 are DE, BC and HL. The HL pair is used to act
as a primary data pointer and it holds 16-bit address of memory location.
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
A microprocessor can perform different function because it’s operation is based on
instructions and controlled by software. A microprocessor accept binary data as
input process and then provide output based on the instruction stored in the
memory.
25. In a 8085 microprocessor, the shift registers which store the result of an
addition and the overflow bit are, respectively
(A) B and F (B) A and F
(C) H and F (D) A and C
Ans. (B);
In an 8085 microprocessor, after performing the addition, result is stored in
accumulator and if any carry (overflow bit) is generated gets updated in the flags.
27. An 8-bit microprocessor has the typical two way connected buffered line
which are called.
(A) Address bus (B) Data bus
(C) Control bus (D) Power lines
Ans. (B);
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
Data bus is bidirectional because the microprocessor can read from memory or
write data to memory.
29. In a computer, set of electrical paths which is used to transfer data is called
(A) Ports (B) Monitors
(C) Bus (D) Computer clock
Ans. (C);
x Bus is group of conductor or wire which are use for transfer address, data,
control signal between microprocessor, memory, I/O device.
x Bus it three types:
1. Address bus
2. Data bus
3. Control bus
30. Which signal in 8085 is used to de-multiplex address and data bus?
(A) READY (B) ALE
(C) HOLD (D) HLDA
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
Ans. (B);
To de-multiplexer address from data, ALE (Address latch enable) signal is used.
33. In which type of addressing, the address field contains effective address?
(A) Immediate Addressing (B) Direct Addressing
(C) Indirect Addressing (D) Register Addressing
Ans. (B);
In direct Addressing, the address field contains effective address.
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
34. After executing instruction LXI H, 2050 H in 8085 microprocessor, what will
be the content in register?
(A) A = 50 H (B) B = 50 H
(C) H = 50 H (D) L = 50 H
Ans. (D);
LXI H, 2050 HHL = 2050 H
H = 20 H, L = 50 H
35. In 8085 microprocessor CMA, RLC, RRC instructions are examples of which
addressing mode?
(A) Implicit addressing mode
(B) Direct addressing mode
(C) Indirect addressing mode
(D) Immediate addressing mode
Ans. (A);
CMA, RLC, RRC are implicit addressing mode. The implicit addressing mode
does not specify an effective address explicitly for either the destination or the
source or both sometimes.
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
37. In 8085 microprocessor system, the direct addressing instructions is
(A) Mov A, B (B) Mov B, OAH
(C) MOv C, M (D) STA adds
Ans. (A);
Direct addressing modes implies the address location, contain itself by the
instruction.
x STA address is direct addressing mode
x MOV, C, M - indirect addressing mode
x MOV, A, B - resister addressing mode
x MVIB, OAH- immediate addressing mode.
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
40. Which one of the following types of instructions will be used to copy from the
source to the destination location?
(A) Arithmetic instruction (B) Data transfer instructions
(C) Logical instructions (D) Machine control instructions
Ans. (B);
Data transfer instructions will be used to copy from the source to the destination
location. Data transfer instructions are also called copy instructions. Source and
destination can be register, data or memory address.
41. Which one of the following addressing mode is used in the instruction PUSH
B?
(A) Direct (B) Register
(C) Register indirect (D) Immediate
Ans. (C);
Register indirect addressing modes is used in the instruction PUSH B.
46. Which flag does not change by the execution of the instruction DCR B in 8085
microprocessor?
(A) Parity (B) Carry
(C) Zero (D) Sign
Ans. (B);
DCR B: B – 01 H o B (It means the content of the register is decrement by one.)
DCR B: requires o 1 Byte, 1 MC (F) and 4T states for execution.
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
Ans. (C);
TRAP also called RST 4.5
Then, ISR o (4.5) u 8 = (36)10 o (24)H = (0024)H
50. In the 8085 microprocessor, the RST 6 instruction transfers the program
execution to the following location:
(A) 30 H (B) 24 H
(C) 48 H (D) 60 H
Ans. (A);
Vector addressing are calculated by the formula = 8 u n
Then, for RST 6
=8u6
= (48)10
= (30) H
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076
51. Which of the following interrupts has the lowest priority?
(A) RST 5.5 (B) RST 7.6
(C) TRAP (D) INTR
Ans. (D);
Decreasing priority order of interrupts-
TRAP > RST 7.5 > RST 6.5 > RST 5.5 > INTR
So, INTR interrupt has the lowest priority.
‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐
Prepare for various competitive exams GATE | SSC JE | State JE/AE (offline & Online)
SCO 134-136, sector 34A Chandigarh | www.yourpedia.in | 9855273076