FPGA Implementation of Fuzzy Logic Contr
FPGA Implementation of Fuzzy Logic Contr
passenger and also reduces the power consumption. D : Car Distance N : No.of Stops
Elevator group controller based Fuzzy Logic Fig. 1 : Basic Structure of the proposed Fuzzy Logic
Framework with self tunning scheme for reducing the average Cotroller for Elevator Group Control System
ISBN:978-81-906109-7-1
Proc.of the Intl.Conf.on Future Engg.Trends(ICFET 2K10),SSE,Saveetha University,India
A. Fuzzification Design Module for the proposed FPGA small window and only four adjoining rules can be viewed
based Fuzzy Logic Controller for Elevator Group through this window at a time. Therefore, instead of having to
Control System.: - access 25 rules, the inference engine only has to access four
rules during every computation. The window can move around
The fuzzification block has five outputs, one for each the FAM table and its position is identified by an index j
fuzzy value defined in the inputs Universe of Discourse. defined as:
However, the fuzzification process entails that, for any single
crisp value of the input Xi, only two adjacent fuzzy values are ADR1 = ―00‖ & ADR2 = ―00‖ j = 0
significant (with non-zero-membership values). By ignoring ADR1 = ‖00‖ & ADR2 = ―01‖ j = 1
the insignificant fuzzy values, the number of output signals ADR1 = ―00‖ & ADR2 = ―10‖ j = 2
can also be reduced from five to two. The possible ADR1 = ―00‖ & ADR2 = ―11‖ j = 3
combinations of significant fuzzy values for an arbitrary ADR1 = ―01‖ & ADR2 = ―00‖ j = 4
inputs are : ADR1 = ―01‖ & ADR2 = ―01‖ j = 5
ADR1 = ―11‖ & ADR2 = ―11‖ j = 15
B i1 and Bi2 ; and Bi2 and Bi3 ;
There are sixteen ‗window positions‘ altogether and
It is found that using just three variables, ADRi, Bi_A the first six are shown in Fig.3. The shaded blocks are the
rules which are considered relevant for the input conditions
and Bi_B, all the combinations can be sufficiently represented
corresponding to the index j. To distinguish the ‗windowed‘
for any value of xi as shown by the following statements:
view of the FAM table from the original table, the first is
ADRi = ―00‖ : Bi_A = B i1 , Bi_B = Bi2 referred to as the ‗Mini‘ fuzzy associative memory (FAM)
table. When the window technique is applied to the FAM table
ADRi = ―01‖ : Bi_A = Bi2 , Bi_B = Bi3 in the Table I, it is observe that number of the mini-FAM
tables are identical (e.g. J=1, J=4) out of the sixteen mini–
ADRi = ―10‖ : Bi_A = Bi3 , Bi_B = Bi4 FAM tables, only seven unique tables are formed.
ADRi = ―11‖ : Bi_A = Bi4 , Bi_B = Bi5
Figure-2 illustrates how these conditions correspond Table-I ( FAM Table of the FLC Design)
with the universe of discourse.
Membership
function
VS S M L VL
Universe of
Discourse
ISBN:978-81-906109-7-1
Proc.of the Intl.Conf.on Future Engg.Trends(ICFET 2K10),SSE,Saveetha University,India
C. Defuzzification algorithm :- call is registered, relevant data from all cars in the group are
needed for computation of the value of the input variables.
The function of the defuzzificaition is to convert the The data required from every car are, its present position in
fuzzy output value of the control system into the the building, motion status, speed direction of travel.
corresponding crisp value of the membership function shown
in fig.4. This is achieved using the weighted average Here we use two input variables for fuzzy evaluation
defuzzification method. This defuzzification operation they are the car distance and number of stops. Their
requires several multipliers and a divider. Behavioural definitions are as follows : -
modelling in VHDL supports multiplication and divi-sion but 1) Car distance : The distance travelled by car to move
these operations are complicated to realise in the systhesis and from its present position to a hall call floor when a hall
implementation stages. call is registered.
NVB NB N NS Z PS P PB PVB 2) Number of stops : The number of stops of floors a car
has to stop at to load or to unload passengers before a
Single ton
Membership
hall call floor is reached.
Function
For every car in the group, the values of the two
input variables are calculated based on the data supplied by
each car controller. The calculated values of each car are then
processed by the FLC and from fuzzy evaluation, a perfor-
mance index (PI) is assigned to each car. The PI denotes the
-1 0 1
suitability of the car to answer a hall call at a particular instant,
Universe of
the car with the highest PI value is considered the car most
Fig. 4 : Output Fuzzyset
Discourse suitable to attend to the hall call.
ISBN:978-81-906109-7-1
Proc.of the Intl.Conf.on Future Engg.Trends(ICFET 2K10),SSE,Saveetha University,India
answer a hall call at a particular instance. Base on the data
given to the input of fuzzifier, elevator car 3 has the highest PI
to response the hall calls, which is shown in simulation result
in figure-7.
V. CONCLUSION
De-fuzzification Result
This paper presents an approach for the
implementation of a fuzzy logic controller for elevator group
Fig.7 : Output Simulation Result
control system on FPGA using VHDL. The controller for
Based on these data the average waiting time of the elevator group control system is implemented on a Xilinx
passenger become 48 sec for 40 floors, whereas this time was Spartan-3E FPGA . The implementation of the fuzzy logic
taken to be 52 sec for 35 floors [1]. The average waiting time controller is very straight forward by coding each component
is calucalted based on the average traffic flow in particular of the fuzzy inference system in VHDL according to the
time instance i.e.morning (8am to 10am) and evening (5pm to 7pm) design specifications. The design of the FLC is highly flexible
and computation time of the fuzzy controller. Table-II show as the membership functions and rule base can be easily
the comparison result between proposed approach and 35 changed with reduced rule techniques. Because of the reduced
floors which was described in [1]. rule techniques the computation time of the fuzzy controller is
Table-II
reduced and elevator group control system gives faster
performance by reducing the average waiting time (AWT) of
AWT Time
the passenger is reduce upto 48 seconds.
Average Waiting Time of proposed approach for 40 floors. 48 Sec
Average Waiting Time of proposed approach for 35 floors 52 Sec
described in [1]. VI. REFERENCE
1) J. Jamaludin, N.A. Rahim, W.P.Hew, ―Development of self tunning
B. FPGA Implementation :
fuzzy logic controller for intelligence control of elevator system‖ Journal
The design of fuzzy logic controller for group of of Engineering Applications of Artificial Intelligence 22 (2009)1167–
elevator control system is implemented using VHDL. 1178.
Synthesis process has performed using Xilinx tools[6] for 2) Daniel M. Munoz, Carlos H. Llanos, Mauricio Ayala-Rincon,
synthesizing the compiled VHDL design codes into gate level ―Distributed Approach to group control of elevator systems using fuzzy
schematics. The VHDL codes are synthesized for converting logic and FPGA implementation of dispatching algorithms‖, Journal of
Engineering Applications of Artificial Intelligence 21 (2008)1309–1320.
into RTL view of the FLC architecture as shown in figure 8.
3) Daijin Kim, member, IEEE ―An Implementation of fuzzy Logic
The Technology mapping has chosen in this project from Controller on the Reconfigurable FPGA system,‖ IEEE Transactions on
Spartan 3E (xc3s500E) with FG320 package and a speed industrial Electronics, Vol.47, No.3, June 2000.
grade of -4. The synthesized schematic is also simulated to 4) Gudwin, R., Gomide, F., Andrade Netto, M., 1998. ―A fuzzy elevator
ensure the synthesized design functions. Table-III shows the group controller with linear context adaptation‖. In: Proceedings of
device utilisation summary of the FPGA based fuzzy logic FUZZ-IEEE98, WCCI‘98—IEEE World Congress on Computational
Intelligence, Anchorage. IEEE, Alaska, USA, pp. 481–486.
controller for inteligent control of elevator group system.
5) Daniel M. Munoz Carlos H. Lianos, Mauricio Ayala-Rincon Rudi van
Table - III : Device Utilisation Summary Els, Renato P. Almeida, ―Implementation of Dispatching Algorithms for
Elevator Systems using Reconfigurable Architectures‖ IEEE Conference
No. of slices 1610 out of 4656 35 %
2007 February.
No. of slices flip flop 1415 out of 9312 15 %
No. of 4 input LUTS 1826 out of 9312 19 % 6) Xilinx ISE 10.1 Software manuals www.xilinx.com.
No. of Bonds IOBs 81 out of 232 35 % 7) Fuzzu Control System Design and Analysis : A Linear Matrix Inequality
No. of GCLK 1 out of 8 13 % Approach by Kazuo Tanaka, Hua O. Womg, John Wiley and Sons
Max. freuqncy, 35.75MHz Publicatins.
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ISBN:978-81-906109-7-1