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STLDMSE1Qn Paper

This document is a mid-semester examination paper for B.Tech III Semester students in ECE and IT at Kakatiya Institute of Technology & Science. It includes various questions related to Switching Theory and Logic Design, covering topics such as binary arithmetic, Hamming code, Boolean algebra, and logic gate circuits. The exam is scheduled for 2 hours and is worth a maximum of 30 marks.

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13 views2 pages

STLDMSE1Qn Paper

This document is a mid-semester examination paper for B.Tech III Semester students in ECE and IT at Kakatiya Institute of Technology & Science. It includes various questions related to Switching Theory and Logic Design, covering topics such as binary arithmetic, Hamming code, Boolean algebra, and logic gate circuits. The exam is scheduled for 2 hours and is worth a maximum of 30 marks.

Uploaded by

bopeb53912
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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URR-18 Write your Roll number

KAKATIYA INSTITUTE OF TECHNOLOGY & SCIENCE, WARANGAL


(An Autonomous Institute under Kakatiya University, Warangal)
FACULTY OF ENGINEERING AND TECHNOLOGY
B.Tech. III Semester ( ECE&IT)
Mid Semester Examination – I

U18EC306: Switching Theory and Logic Design


Time: 2 Hours] [Max. Marks : 30
Date:16.09.2023
Note:. Answer all the questions. Mar CDL CO
ks L
Find the base of the following 41/3=13. [1] [R] CO1
1. a.
Find the difference of
b. i. 74321–1594 using 9s complement.
ii. 15–18 using 1s complement. [1] [R] CO1
[1] [R] CO1
c. Find the Hexadecimal equivalent of (1011011.0110110)2.
(CRP)
Outline the advantages of power efficient synchronous counter. [1] [U]
CO2
d.
Interpret Half Subtractor using Universal gates. [1] [U] CO2
e.
Explain 4-bit parallel adder. [1] [U] CO2
f.

2.
Construct Hamming code for BCD code with even parity. [4] [Ap] CO1
a.
b. Simplify the following AB( D + C D) + B ( A + ACD ) using Boolean
theorems and postulates. [4] [An] CO1

c. Make use of K-map to identify the minimal SOP and POS forms for
f ( w, x, y , z ) =  (1, 4, 5, 6,11,12,13,14,15) .

d. Simplify the following ( XY + Z )(Y + XZ ) in Canonical SOP and POS


forms. [4] [Ap] CO1
Interpret Half Adder circuit using NAND Gates. [4] [U] CO2
3. a.
Construct Full-Adder using Half Adders. [4] [Ap] CO2
b.

Demonstrate Half Subtractor using Logic Gates. [4] [U] CO2


c.
Build full subtractor using Logic Gates. Identify the Boolean
expression for difference and barrow. [4] [Ap] CO2
d.
Course Coordinator Signature with Date:
Page 1 of 2
a. Solve the following using QM method.
f (v, w, x, y, z ) =  (13,15,17,18,19,20,21,23,25,27,29,31) +  (1,2,12,24 ). [4] [Ap] CO1
4.
b. Determine the Boolean functions to convert BCD Code to Excess-3
code and draw the logic diagram [4] [E] CO2

c. Solve the following.


i. Subtract 9217–1936 in BCD. [4] [Ap] CO1
Add 2349 and 4567 in Excess-3.
d. Evaluate the working of a BCD adder with one example. [4] [E] CO2

--- Question Paper Ends ---

Paper set by:


Faculty Name Signature Faculty Name Signature
Dr.G.Raghotham Reddy, Smt.A.Vijaya,
Professor Associate Professor
Dr.B.Rama Devi, Dr.R.Srikanth,
Professor Assistant Professor
Sri.E.Suresh,
Associate Professor

Course Coordinator Signature with Date:


Page 2 of 2

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