Fet (Field Effect Transistor)
Fet (Field Effect Transistor)
Introduction:
A transistor is a semiconductor device that controls current with the application of a
small electrical signal.
Transistors may be roughly grouped into two major families: bipolar and field effect.
BJT utilize a small current to control a large current. But, FET utilizing a small
voltage to control current.
FETs are unipolar rather than bipolar devices. That is, the main current through them
is comprised either of electrons through an N-type semiconductor (N-channel FET) or
holes through a P-type semiconductor (P channel FET).
In a JFET, the controlled current passes from Source to Drain, or from Drain to
Source as the case may be. The controlling voltage is applied between the Gate and
Source. Current flowing through this channel widely depends on the input voltage
applied to its Gate terminal.
FETs generally of two types: 1) JFET (Junction Field Effect Transistors) and 2)
MOSFET (Metal Oxide Semiconductor Field Effect Transistors).
Junction Field Effect Transistors: JFET is a voltage controlled three terminal uni-polar
semiconductor device. The three terminals namely, Source (S), Gate (G) and Drain (D).
As the voltage applied to the Gate with respect to the Source (V GS), controls the current
flowing between the Drain and the Source terminals. See fig.2.1. JFETs can be classified into
two types (i) n-channel JFET and (ii) p-channel JFET, depending on whether the current flow
is due to electrons or holes, respectively.
Components of FET:
1. Channel: This is the area in which majority charge carriers flow. When the majority
charge carriers are entered in FET, then with the help of this channel only they flow from
source to drain.
2. Source: Source is the terminal through which the majority charge carriers are introduced
in the FET.
3. Drain: Drain is the collecting terminal in which the majority charge carriers enter and thus
contribute in the conduction procedure.
4. Gate: Gate terminal is formed by diffusion of a type of semiconductor with another type of
semiconductor. It basically creates high impurity region which controls the flow of carrier
from source to drain.
Fig 2.1: Constructional details of a) N-channel JFET b) P-channel JFET
Working of N-channel JFET:
Case I: No voltage is applied to the device (VDS = 0 and VGS = 0).At this state, the device
will be idle and no current flows through it (I DS = 0).
Case-II: When VDS is applied and VGS = 0
As shown in fig.2.2 (a), the two PN junctions at the sides of the N channel establish depletion
layers. The electrons will flow from Source to Drain through a channel between the depletion
layers. The size of the depletion layers determines the width of the channel and hence current
IDS, conduction through the bar.
Case-III: When VDS is applied and VGS = - ve
The depletion region width increases, which results in reduces the width of conducting
channel, thereby increasing the resistance of n-type bar. Consequently, the current from
Source to Drain is decreased.
If more (-VGS ) is applied, further reduces the channel width until no current flows through
the channel. At this - voltage at which the JFET channel is called as pinched off voltage, VP.
At this state, the IDS current is restricted only by the channel-resistance. However, once the
pinch-off occurs (VDS = VP), the current IDS saturates at a particular level IDSS.
Ohmic Region: When VGS = 0 the depletion region of the channel is very
small and the JFET acts like a voltage controlled resistor.
Cut-off Region: This is also known as the pinch-off region were the Gate
voltage, VGS is sufficient to cause the JFET to act as an open circuit as the
channel resistance is at maximum.
Breakdown Region: The voltage between the Drain and the Source, (VDS) is
high enough to causes the JFET’s resistive channel to breakdown and pass
uncontrolled maximum current.
The characteristics curves for a P-channel junction field effect transistor are
the same as those above, except that the Drain current ID decreases with an
increasing positive Gate-Source voltage, VGS.
Fig 2.4 (a) JFET with VGS=0V and a variable VDS(VDD) b) The drain Characteristics curve for VGS=0
Showing pinch off voltage
The Drain current IDS is zero when VGS = VP. For normal operation, VGS
is biased to be somewhere between VP and 0. Then we can calculate the
Drain current, ID for any given bias point in the saturation or active region
as follows:
Drain current (ID) at the active region can be calculated as follows: ID lies
between (pinch-off) zero to IDSS.
Similarly, if we know drain source voltage Vds and drain current Id, we can
calculate the drain-source channel resistance.
Notice that the bottom end of the transfer characteristic curve is at a point
on the VGS axis equal to VGS(off), and the top end of the curve is at a point on
the ID axis equal to IDSS.
BJT JFET
Bipolar junction transistor Unipolar junction transistor
Input impedance is very less Input impedance is very large
Current control device, preferred Voltage controlled device, preferred
for low current applications for low voltage applications
More noisy Less noisy
Frequency variations effect its High frequency response
performance
Temperature dependent device Better heat stability
Cheaper than FET Costly than BJT
Bigger in size than FET Smaller in size than BJT
More gain Less gain
High output impedance because of Low output impedance because of
high gain less gain
High voltage gain Low voltage gain
Low current gain High current gain
Switching time is medium Switching time is fast
Consumes more power Consumes less power
Metal Oxide Semiconductor Field Effect transistor (MOSFET):
The MOSFET, different from the JFET, has no pn junction structure;
instead, the gate of the MOSFET is insulated from the channel by a silicon
dioxide (SiO2) layer shown in the fig.2.6.
Case I: When there is no Gate voltage (VGS = 0), as in fig. 2.7, maximum
current flows (ID = IS = IDSS).
Case II: When VGS = -ve with respect to the substrate, the Gate repels some
of the electrons out of the N-channel.
This creates a depletion region in the channel, as illustrated in fig.2.8, and,
therefore, increases the channel resistance and reduces the Drain current,
ID. The more negative the gate, the less the Drain current.
In this mode of operation, the device is referred to as a depletion-mode
MOSFET. Here too much negative Gate voltage can pinch-off the channel.
Then device is said to be OFF.
Fig.2.7 MOSFET in depletion mode with gate voltage zero
Case III: When VGS = +ve, Gate attracts the negative charge carriers from the
P substrate to the N-channel and thus reduces the channel resistance and
increases the drain current, ID. The more positive the Gate is made, the
more Drain current flows. In this mode of operation, the device is referred to
as an enhancement-mode MOSFET. This is depicted in the fig. 2.9.
(i) When VGS = 0 V, VDS = +ve: There is no channel induced between Source
and Drain. The p- substrate has only a few thermally produced free
electrons (minority carriers) so that drain current is almost zero. For this
reason, EMOSFET is normally OFF when VGS = 0V.
(ii) When VGS = VGS(th) = + ve, and VDS = + ve: The free electrons developed
next to the SiO2 layer and induced an N channel, as shown in the fig.2.11.
Now a Drain current ID starts flowing. E-MOSFET is turned ON. Beyond VGS
(th), if the value of VGS is increased, the induced N channel becomes wider,
resulting large ID. If the value of VGS decreases not less than VGS (th), the
channel becomes narrower and ID will decrease.
Fig. 2.11 MOSFET in enhancement mode with gate voltage positive Since the
conductivity of the channel is enhanced by the positive bias on the Gate, so
this device is also called the enhancement MOSFET or E- MOSFET.
Characteristics of E-MOSFET:
Drain Characteristics curve: fig.2.12 (b), have almost vertical and almost
horizontal parts. The vertical components of the curves correspond to the
ohmic region, and the horizontal components correspond to the saturation
region (constant current). Note the following worthy points:
i. When VGS < VGS(th), then ID =0. This is because under this state, the
channel will not be connecting between the drain and the source terminals.
This is called as cut-off region. (MOSFET off state). The transfer curves of
MOSFET is shown in the fig.2.13.
ii. When VGS > VGS(th),. then ID flows through the device, initially (Ohmic
region) and then saturates to a value (saturation region). That means, ID is
controlled by the Gate voltage, VGS.
iii. ID can be obtained by analytical expression:
ID = k (VGS - VGS(th))2
where
A/V2
Fig.2.13 Transfer characteristic of E – MOSFET
NUMERICALS