Field programmable Gate Array

(FPGA)
Old ways of implementing digital circuits:

Design Procedure
Given a problem statement:
Determine the number of inputs and
outputs
Derive the truth table
Simplify the Boolean expression for
each output
Produce the required circuit
Old ways of implementing digital circuits:
Half Adder
x S
Adds 1-bit plus 1-bit y
HA
C
Produces Sum and Carry
x
x y + y
C S
───
0 0 0 0 C S
0 1 0 1
1 0 0 1
x S
1 1 1 0

S = x'y+xy' = x  y y
C
C = xy
 Old ways of implementing digital circuits:(uses NAND and NOR)

Transistor Switches

We can still buy this chip with FOUR NAND gates in one package and
this is known as discrete logic. MOSFET has small size.
 Old ways of implementing digital circuits:

We generally do not use these any more. It is slow, expensive,

consumes lots of energy and very hard to use.
 Next Development
PLD(Programmable Logic device): It is implemented by logic gates. All
the input and their complement (NOT) are connected with gates. By
programming , we will define with which input line the gate is
connected for a particular function. It may be 2 types

(i)PAL(Programmable Array Logic): only Programmable AND array as

user need , but fixed OR array.

(ii)PLA(Programmable Logic Array):Programmable AND array &

Programmable OR array ; both are programmable as user need
PAL
PLA
Difference between PAL and PLA:
Early integrated circuits based on gate arrays
Early integrated circuits based on gate arrays
Logic Function

Un-programmed State
 Early integrated circuits based on gate arrays(program kore
previous output )
Programmed PLD

Sums

Product Terms
Early integrated circuits based on gate arrays

For a specific design, the gates are connect through metal lines in the
wiring channels. Therefore the customization is only in the wiring metal
layers and not the layers with transistors. This is known as “semi-
custom” application-specific integrated circuits (ASICs).
 Modern digital design- full custom IC

We can customize everything each transistor and each wiring

connected in a full-custom manner.
This drives rise of the Field Programmable Gate Array
(FPGA).
 What is FPGA ?

❑ A Field-Programmable Gate Array (FPGA) is an integrated

circuit that can be configured by the user to emulate any
digital circuit as long as there are enough resources.
❑ An FPGA can be seen as an array of Configurable Logic
Blocks (CLBs) connected through programmable
interconnect (Switch Boxes).
 Some Basics of Digital Logic Design
Mux: can implement any logic function & Look up table can also implement any logic
function. Mux is many to 1, 2^n input and n select line, 1 output

8-to-1
Mux

A0 A0
A1

0 A2
A3
0 Look up table
0
A4
A5
Input ? Output
A6
Address line A7
1 bit memory
Decoder M
Look up table (LUT): It is better than truth table.
Input line of truth table or select line of mux is taken at address line.
Output of truth table is taken at memory.
Look up table contain output of truth table in a 1 bit memory.
Lookup table is actually customized truth table.
Equivalent of truth table.
FPGA Structure (FPGA er basic structure bolle
ata)
FPGA Structure
Look up table contain output of truth table in a 1 bit memory.
For n input look up table will hold 2^n value.
For 2 input look up table will hold 4 value.
D Flip Flop is used to provide delay.
When mux select bit is 0 , then direct connection , no delay.
When mux select bit is 1 , then connection through D FF , delay.
FPGA Structure
 Programming of FPGA
Programming an FPGA is called “configuration”. In programming a
computer or microprocessor, we send to the computer instruction codes
as ‘1’s and ‘0’s. These are interpreted (or decoded) by the computer
which will follow the instruction to perform tasks. The microprocessor
needs to be fed these program codes continuously for it to function.

In FPGAs, you only need to configure the chip ONCE on power-up. You
download to the chip a BITSTREAM (also bits in ‘1’s and ‘0’s), which
determines the logic functions performed by the Logic Elements, and the
interconnecting switches in order to connect the different LEs together to
make up your circuit. Once the bit stream is received, the FPGA no
longer needs to read the 1’s and 0’s again, very unlike a microprocessor
which has to continually decoding the machine instructions. That’s why
we say that we configure an FPGA (instead of programming an FPGA,
although the two words are used interchangeably).
Example: 4-input AND gate(using CLB)
Example: Find the configuration bits for the
following circuit
Example: Find the configuration bits for the following circuit.
if S=0,select A0

0
0
0
1
1
0
1
1

If gate is not given , then find output(only using mux)

Example: Find the configuration bits for the
following circuit

0
0 0
0
1
0 1
0
0 1
1
1
1
0 0
1
1
Find configuration bit for 2 input AND gate

Note khata te example er maje dekho

Example: Determine the configuration bits for the following
circuit implementation in a 22 FPGA, with I/O constraints as
shown in the following figure. Assume 2-input LUTs in each
CLB.

Note khata
Example: Determine the configuration bits for the following
circuit implementation in a 22 FPGA, with I/O constraints as
shown in the following figure. Assume 2-input LUTs in each
CLB.
CLBs required
Placement: Select CLBs
Routing: Select path
 Configuration Bitstream
❖The configuration bitstream must include ALL CLBs and
SBs, even unused ones

▪ CLB0: 00011
▪ CLB1: xxxxx
▪ CLB2: 01100
▪ CLB3: ?????
▪ SB0: 000000
▪ SB1: 000010
▪ SB2: 000000
▪ SB3: 000000
▪ SB4: 000001
Application of FPGA
Defense
Video conferencing
Engineering
Medical
Cloud meeting
 FPGA Disadvantage
Internal Memory is limited
Analog interface is challenging
Power consumption is more
Difficult to program compared to Micro
Cost is more than micro cost
Not Suitable for small volume product
Learning to use or design Complex FPGA is more
challenging