CSC405 Microprocessor

Microprocessor Dr. Gauri Shukla 1

 8086 Microprocessor
Memory Segmentation & Banking

Microprocessor Dr. Gauri Shukla 2

8086- Architecture – Memory Segmentation

Memory Segmentation means dividing the memory

into logical segments.

Microprocessor Dr. Gauri Shukla 3

8086- Architecture – Memory Segmentation

 8086 has 20-bit address bus.  can access 220

memory locations i.e. 1 MB memory.

 Memory is divided into segments of max. size of

64 KB each.

 The programmer can define various segments.

 In 8086 we can access only 4 memory segments

at a time.

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Microprocessor Dr. Gauri Shukla
Memory Map for 8086

 Dedicated Locations
 Used for processing specific system interrupts and reset
function

Microprocessor Dr. Gauri Shukla 5

8086 – Memory Segmentation

 Within the 1 MB of memory space the 8086/88 defines four 64K-byte memory
blocks called

1. Code segment,
2. Stack segment,
3. Data segment,
4. Extra segment.

 Each of these blocks of memory is used differently by the processor.

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Microprocessor Dr. Gauri Shukla
8086 – Memory Segmentation

Extra Segemnt

Stack Segment

Code Segment

Data Segment

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Microprocessor Dr. Gauri Shukla
8086 – Memory Segmentation

• 8086 has 4 16 – bit registers

➢ CS; DS; SS; ES to hold the base address of the

segments.

• 8086 has 16 – bit offset registers

➢ SP,BP,SI,DI to hold the offset address for each of

the segments.

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Microprocessor Dr. Gauri Shukla
8086 – Memory Segmentation

• Eg: SP register has offset address for the Stack Segment

20 bit physical address = SP + (SS * 10H)

• SI holds the offset address for the Data Segment.

20 bit physical address = SI + (DS * 10H)

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Microprocessor Dr. Gauri Shukla
8086 – Memory Segmentation

 Programs obtain access to code & data in the code segment & data segment
by changing the segment register contents to point to the desired segments.

 All program instructions must be located in main memory – Code Segment

 pointed to by the 16-bit CS register with

 a 16-bit offset in the segment contained in the 16-bit instruction pointer (IP).

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Microprocessor Dr. Gauri Shukla
8086 – Memory Segmentation
• The BIU computes the 20-bit physical address internally by the provided
logical address (16-bit contents of CS and IP)

➢ CS - contains the base or start of the current code segment

➢ IP - contains the distance or offset from this address to the next

instruction byte to be fetched.

• It is done by logically shifting the contents of CS four bits to left and then
adding the 16-bit contents of IP.

• In other words, the CS is multiplied by 1610 or 1016 by the BIU for

computing the 20-bit physical address.

Physical Address = Segment Address x 10H+ IP

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Microprocessor Dr. Gauri Shukla
8086 – Memory Segmentation
Eg:
if [CS] = 348A16 & [IP] = 421416, then the 20-bit physical address
generated by the BIU is as follows:

Four times logically shifted [CS] to left = 348A016

+ [IP] as offset = 421416
-----------------------------------------------------------------------------------------------------------

20-bit physical address = 38AB416

The BIU always inserts four Zeros for the lowest 4-bits of the 20-bit
starting address (physical) of a segment.

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Microprocessor Dr. Gauri Shukla
8086- Compuation of Address

Top of the code segment

Segment Reg. in
BIU
CS 3 4 8 A
Code Segment contains code bytes
SS

DS 38AB4 Location containing the next code byte

H
IP 4 2 1 4

IP Reg contains 16
bit offset
Offset
4214 H
+

CS 3 4 8 A 0
IP + 4 2 1 4
20 bit Physical 3 8 A B 4 348A0
Start of the Code segment

address in DS H
MEMORY

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Microprocessor Dr. Gauri Shukla
8086 – Memory Segmentation

• The 20-bit Physical address is often represented as,

Segment Base : Offset
OR
• CS : IP [CS] = 348A16 & [IP] = 421416

CS 3 4 8 A 0

IP + 4 2 1 4

20 bit Physical 3 8 A B 4
address in DS

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Microprocessor Dr. Gauri Shukla
Segment Register Assignment

Microprocessor Dr. Gauri Shukla 19

8086 – Memory Segmentation
Advantages:

1. Allow the programmer to access1Mb memory using 16 - bit address.

2. It divides memory logically to store Instructions, Data & Stack separately.

3. Permits a program and/or its data to be put into different areas of

memory each time the program is executed.

4. Multitasking becomes easy.

5. Segmentation is very useful for multi-user environment.

6. It provides powerful memory management mechanism.

7. Modular software design

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Microprocessor Dr. Gauri Shukla
8086 – Memory Segmentation
Disadvantages:

1. Although the total memory is 16* 64KB, at a time only 4* 64 KB

memory can be accessed.

2. Any memory location needs to be expressed using 2 registers-

Base & Offset..

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Microprocessor Dr. Gauri Shukla
 8086 – Memory Banks

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Microprocessor Dr. Gauri Shukla
8086 – Memory Banks

 8086 has a 16-bit data bus  it can access 16- bit data in one
operation.

 But memory chips available are normally such that one

memory location has 8 bit (1 byte).

 1 Memory locations carries one byte- 8 bits.

 To access 16-bit data it needs to read 2 memory locations.

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Microprocessor Dr. Gauri Shukla
8086 – Memory Banks

 If both memory locations are consecutive in the same memory chip then
the address bus has to contain 2 addresses at the same time and hence
require double time. This is impossible.

 Therefore to solve this problem,the memory of 8086 is divided into 2 banks.

 Each bank provides 1byte or 8bits.

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Microprocessor Dr. Gauri Shukla
8086 – Memory Banks

 One bank contains all even addresses called “Even Bank”.

 The other bank contains all odd addresses called “Odd Bank”.

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Microprocessor Dr. Gauri Shukla
8086 – Memory Banks
1 MB

512 KB 512 KB

Odd Bank Even Bank

• Also called as “Higher Bank” • Also called as “Lower Bank”

• Address range • Address Range

00001H 00000H
00003H 00002H
00005H 00004H

FFFFFH FFFFEH
• Selected when BHE = 0 • Selected when A0 =0
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Microprocessor Dr. Gauri Shukla
8086 – Memory Banks

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Microprocessor Dr. Gauri Shukla
Microprocessor Dr. Gauri Shukla 28
8086 – Memory Banks
8086 Upper bank odd Lower bank even
Latches addressed byte addressed byte
A19
FFFFFH FFFFEH
–
A0
A1-A19 A1-A19
BHE
A0 A1
BHE
ALE 00005 00004
ALE
00003 00002

00001 CS 00000
CS

D15
.
D8 Higher Data Byte

D7
. Lower Data Byte
D0

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Microprocessor Dr. Gauri Shukla