Computer Evolution and Performance

Evolution of computer – Mechanical Era: Babbage’s

Difference Engine:
 Babbage’s Difference Engine
• Babbage's first computing machine, which he called the
Difference Engine
• It was intended to compute and print mathematical tables
automatically.
• Thereby avoiding the many errors occurring in tables by
Human.
• The Difference Engine performed only one arithmetic
operation: addition.
• Explain the example solved during lecture.
Structure of Babbage’s Analytical Engine
 Structure of Babbage’s Analytical Engine
• The main components of analytical engine are
• A memory called the store and an ALU called the mill.
• The ALU was designed to perform the four basic arithmetic
operations.
• To control the operation of the machine, Babbage proposed to
use punched cards.
• A program for the Analytical Engine was composed of two
sequences of punched cards
• operation cards used to select the operation to be performed by
the mill.
• variable cards to specify the locations in the store from which
inputs were to be taken or results sent
 Structure of Babbage’s Analytical Engine
• One of Babbage's key innovations was a mechanism to enable
a program to alter the sequence of Its operations automatically.
• i.e. conditional branch or if-then-else instructions
• They were to be implemented by testing the sign of a
computed number
• one course of action was taken if the sign were positive,
another if negative
• Babbage also designed a device to advance or reverse the flow
of punched cards to permit branching to any desired
instruction within a program.
• This type of conditional branching distinguishes the Analytical
Engine from the Difference Engine
 Electronic Era:
• The First Generation Computers used vaccum tubes.
• Electronic Numerical Integrator and Calculator(ENIAC).
• The ENIAC had a set of electronic memory units called
accumulators with a combined capacity of twenty 10-digit
decimal numbers.
The First Generation Computers
 IAS Computers
• A new stored-program electronic computer referred as IAS
computer (Institute for Advanced Studies).
 IAS Computers
The General structure it had –

A CPU for executing instructions

A main memory for storing active programs
A secondary memory for backup storage
Miscellaneous Input-Output equipments

IAS design have two key aspects:

CPU contains a small set of high-speed storage devices called registers which serves as implicit
storage locations for operands and results.
A program’s instructions are stored in main memory in approximately the sequence in which they are
executed. Hence, the address of the next instruction is usually that of the current instruction plus one.
One of the two main parts of CPU is responsible for fetching instructions from memory and
interpreting them, this part is known as program control unit (PCU) or I-unit (instruction unit).
The second major part of the CPU is responsible for executing instructions and is known as data
processing unit , the data path, or the E-unit (execution unit).
 IAS Computers
• PCU (Program Control Unit)
• Major components of PCU are:
Instruction register (IR), which stores the opcode that is currently being executed.
Program counter (PC) which automatically stores and keeps track of the address of
the next instruction to be fetched
IBR:IAS has feature of fetching two instructions at a time from main memory, it
contains a second register, the instruction buffer register (IBR) ,for holding a
second instruction.
Address register (AR) :PCU has 12-bit address register (AR) that holds the address
of a data operand to be fetched from or sent to main memory.

PCU has circuits to interpret opcodes and to issue control signals to the DPU,
main memory and other circuits involved in executing instructions.
PCU can modify the instruction execution sequence when required to do so by
branch instructions.
 IAS Computers
• DPU (Data Processing Unit)
Main components of DPU are the ALU, contains the circuits that perform
addition, subtraction, multiplication etc. as required by opcodes.
DPU contains the Data registers (DR) to store data words temporarily
during program execution.
IAS has two general-purpose 40-bit data registers :

AC (Accumulator)

Data register (DR)

DPU contains a Special-purpose data register MQ (Multiplier-quotient)

intended for use by multiply and divide instructions.
 Instruction set
• The IAS machine had around 30 types of instructions.
• To represent instructions, we will use a notation called a
hardware description language (HDL) or register-transfer
language(RTL) that approximates the assembly language.
• Elements of main memory M are denoted by appending to M an
address in parentheses. For example, M(X) .
• The transfer of information is denoted by the assignment symbol :=
• AC := MQ means transfer (copy) the contents of register MQ to
register AC without altering the con-tents of MQ.
• An IAS program to add two numbers stored in main memory
• AC := M(100) Load the contents of memory location 100 into the
accumulator.
• AC := AC + M(101) Add the contents of memory location 101 to the
accumulator.
• M(102) := AC Store the contents of the accumulator in memory
location 102.
 Instruction set
• Data Transfer
• AC := MQ=>Transfer contents of register MQ to register AC.
• AC := M(X)=>Transfer contents of memory location X to AC.
• Data processing
• AC := AC + M(X)=>Add M(X) to AC putting the result in AC.
• AC := AC + |M(X)|=>Add absolute value of M(X) to AC.
• Program control
• go to M(X, 0:19)=>Take next instruction from left half of M(X)
• go to M(X, 20:39)=>Take next instruction from right half of M(X).
 Instruction Execution
• The IAS fetches two instructions in each instruction cycle.
• One instruction has its opcode placed in the instruction register IR and its
address field (if any)placed in the address register AR.
• The other instruction is transferred to the IBR register for possible later
execution.
• Whenever the next instruction needed by the CPU is not in IBR, the program
counter PC is incremented to generate the next instruction address.
• Once the desired instruction has been loaded into the CPU, its execution phase
begins.
• The add instruction AC := AC + M(X) is executed by the following two
register-transfer operations:
• DR := M(AR);
• AC := AC + DR
• First, the contents of the memory location M(AR) specified by the address
register AR are transferred to the data register DR.
• Then the contents of DR and the accumulator AC are added via the DPU's
arithmetic-logic unit, and the result is placed in AC.
 Second Generation

• Transistors (serves as a high speed electronic switch for binary signals)

• More registers e.g. Index register(I)
• C(I)=A(I)+B(I)
• For large array
• I in CPU register not in program so no change in program
• Call and return –program control instructions
• Memory Technology is changed.
• Secondary Storage Magnetic tape.
• Floating point numbers
0.0000000709----7.09 * 10-8
• M Mantissa , Exponent E M * B-E
 Input-Output Operation, Programming Language
 I/O operations:
 I/O operations and performance
 Transfer between main memory and I/O takes place through
CPU(bottleneck)
• Programming language
– Higher language programming
– Compiler
• FORTRAN –by IBM group
• E.g Do 5 I=1 , 1000
5 C(I)=A(I)+B(I)
FORTRAN90
E.g C(1:1000)=A(1:1000)+B(1:1000)
Third generation
 VLSI Era-IC Circuits
• VLSI stands for very large scale Integration it is IC
manufacturing technology.
• The integrated circuit was invented in 1959 at Texas
Instruments and Fairchild Corporations.
• Quickly became the basic building block for computers of the
third and subsequent generations.
• An IC is an electronic circuit composed mainly of transistors
that is manufactured in a tiny-rectangle or chip of
semiconductor material.
• The IC is mounted into a protective plastic or ceramic
package, which provides electrical connection points called
pins or leads that allow the IC to be connected to other Ics.
 VLSI Era-IC Circuits
• IC density: It is defined as the number of transistors contained in the chip.
• The different IC integration technologies are
• Small-scale integration or SSI-Contains less than 100 transistors.
• Medium-scale integration or MSI-Contains hundred of transistors.
• Large-scale integration or LSI-Contains thousand of transistors.
• Very-Large Scale Integration or VLSI-contains millions of transistors.
 Performance Consideration and Measures
• Performance Consideration :
• Complex instruction set computers
• Reduced instruction set computers
• Performance Measures:
• A rough indication of CPU speed is the number of "basic" operations that it
can perform per unit of time.
• A typical basic operation is the fixed-point addition of the contents of two
registers Rl and R2, as in the symbolic instruction
Rl :=R1 +R2
• Such operations are timed by a regular stream of signals (ticks) issued by a
central timing signal, the system clock.
• The speed of the clock is its frequency, measured in millions of ticks per
second; the units for this are megahertz (MHz).
• Each tick of the clock triggers a basic operation; hence the time required to
execute the operation is 1/microseconds .
• This value is called the clock cycle or clock period T.
 Performance Measures:
• The CPU's processing of an instruction involves several steps, each of
which requires at least one clock cycle:
1. Fetch the instruction from main memory M.
2. Decode the instruction's opcode.
3. Load (read) from M any operands needed unless they are already in CPU
registers.
4. Execute the instruction via a register-to-register operation using an
appropriate functional unit of the CPU, such as a fixed-point adder.
5. Store (write) the results in M unless they are to be retained in CPU registers.
• The fastest instructions have all their operands in CPU registers and can be
executed by the CPU in a single clock cycle, so steps 1 to 3 all take one
clock cycle.
• The slowest instructions require multiple memory accesses and multiple
register-to-register operations to complete their execution.
 Speed up Techniques
• The following are the speed up techniques used to improve the
performance.
1) Cache memory.
2) Pipelining
3) Superscalar processing
Cache memory.
• A cache is a memory unit placed between the CPU and main memory M
and used to store instructions, data, or both.
• It has much smaller storage capacity than M, but it can be accessed more
rapidly and is often placed on the same chip as the CPU.
• The cache's effect is to reduce the average time required to access an
instruction or data word, typically to just a single clock cycle.
 Speed up Techniques
• Pipelining:
• Pipelining allows the processing of several instructions to be partially
overlapped.
• all the common steps involved in instruction processing by the CPU can be
pipelined:
• instruction fetching (IF),instruction decoding (ID), operand Fetch (OF),
execution (EX), and operand storing (OS).
• A pipelined system is often compared to an assembly line on which many
products are in various stages of manufacture at the same time.
• In sequential execution number of clock cycles required will be more.
 Pipelining:

• In pipeline, instruction execution can be overlapped as shown below which

helps to improve the performance.

Superscalar processing

• Superscalar To increase performance by allowing several instructions to be

processed be in parallel (full overlapping).
• Multiple (pipelined) units are provided for instruction processing
Instructions can issued simultaneously to each unit.
Difference between RICS and CISC