ARCHITECTURE OF 8086 MICROPROCESSOR

Microprocessor

Microprocessor is an integrated circuit that contains all the functions of a central

processing unit of a computer. It consist of ALU, control unit and an array of
registers

Features of 8086 Microprocessor:

 Intel 8086 was launched in 1978.
 It was the first 16-bit microprocessor.
 The ALU, internal registers & most of the instructions are designed to
work with 16 bits
 It is available as 40-pin Dual-Inline-Package (DIP).
 It has a 16 bit data bus. It can read/write either 8 or 16 bits at a time.
 It has 20 bit address bus. It can access 220 (1 MB) memory locations.

The 8086 CPU is divided into two independent functional units:

1. Bus Interface Unit (BIU)
2. Execution Unit (EU)
Bus Interface Unit (BIU)

BIU handles all data transfer operations

The function of BIU is to:
 Fetch the instruction or data from memory.
 Read data from the port.
 Read data from the memory.
 Write the data to memory.
 Write the data to the port.

Execution Unit (EU)

 The functions of execution unit are:

o To tell BIU where to fetch the instructions or data from.
o To decode the instructions.
o To execute the instructions.

 The EU contains the control circuitry to perform various internal

operations.
 A decoder in EU decodes the instruction fetched from the memory to
generate control signals required to perform the operation.
 EU has 16-bit ALU, which can perform arithmetic and logical operations
on 8-bit as well as 16-bit.
 EU also contains General Purpose Registers and other Pointer and Index
registers.

Instruction Queue

 To increase the execution speed, BIU fetches as many as six instruction

bytes ahead to time from memory.
 The BIU stores these prefetched instructions in a 6 byte register called the
instruction queue.
 When EU is ready for executing next instruction, it simply reads the
queue in the BIU.
 But in the case of JMP and CALL instructions, the queue must be
dumped and then reloaded starting from a new address.
 This prefetch-and-queue scheme greatly speeds up processing.
 Fetching the next instruction while the current instruction executes is
called pipelining.

General Purpose Registers of 8086

These registers can be used as 8-bit registers individually or can be used as 16-
bit in pair to have AX, BX, CX, and DX.
AX Register: AX register is also known as accumulator registers that
stores operands for arithmetic operations.
BX Register: This register is mainly used as a base register. It holds the
starting base location of a memory region within a data
segment.
CX Register: It is defined as a counter register. It is primarily used in
loop instruction to store loop counter.
DX Register: DX register is also known as data register. It is used to
contain I/O port address for I/O instruction.

Segment Registers
 Segment registers generate memory address when combined with other
registers in the microprocessor.

Memory Segments of 8086

In 8086 microprocessor, memory is divided into 4 segments

Code segment

 Code segment is used to hold program code.

 The CS register is used to hold the upper 16 bits of the starting address
of code segment.
 The processor uses CS segment for all accesses to instructions referenced
by instruction pointer (IP) register.
 CS register cannot be changed directly.
Stack segment

 The stack segment is that segment of memory, which is used to store

stack data.
 SS register is used for addressing stack segment of memory.
 SS Register is a 16-bit register that holds the upper 16 bits of the starting
address of stack segment.
 By default, the processor assumes that all data referenced by the stack
pointer (SP) and base pointer (BP) registers is located in the stack
segment.
 SS register can be changed directly using POP instruction.

Data segment

 DS contains most data used by the program.

 DS register is a 16-bit register containing address of 64KB segment with
program data.
 By default, the processor assumes that all data referenced by general
registers (AX, BX, CX, DX) and index register (SI, DI) is located in the
data segment.
 DS register can be changed directly using POP and LDS instructions.

Extra segment

 ES is additional data segment that is used by some of the string to hold

the destination data.
 ES register is a 16-bit register that holds the upper 16 bits of the starting
address of extra segment.
 By default, the processor assumes that the DI register references the ES
segment in string manipulation instructions.
 ES register can be changed directly using POP and LES instructions.

Instruction pointer (IP):

 IP contains the offset address of the next instruction to be fetched from

memory.

Flag (Status) Register of 8086

  Flag register is a 16-bit register.
 A flag indicates some condition produced by the execution of an
instruction or controls certain operations of the EU.
 Flag Register determines the current state of the processor.
 They are modified automatically by CPU after mathematical operations,
this allows to determine the type of the result, and to determine
conditions to transfer control to other parts of the program.

 8086 has 9 flags and they are divided into two categories:
1. Conditional Flags
2. Control Flags

Conditional Flags

Conditional flags represent the result of last arithmetic or logical instruction

executed. Conditional flags are as follows:

1.Carry Flag (CF):

 This flag indicates an overflow condition for unsigned integer arithmetic.
 It is also used in multiple-precision arithmetic.

2. Auxiliary carry Flag (AF):

 If an operation performed in ALU generates a carry/borrow from lower
nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), the AF flag is set.
 This is not a general-purpose flag, it is used internally by the processor to
perform Binary to BCD conversion.

3. Parity Flag (PF):

 This flag is used to indicate the parity of result.
 If the result contains even number of 1’s, the Parity Flag is set and for
odd number of 1’s, the parity flag is reset.

4. Zero Flag (ZF):

 It is set; if the result of arithmetic or logical operation is zero else it is
reset.

5. Sign Flag (SF):

 In sign magnitude format the sign of number is indicated by MSB bit.
  If the result of operation is negative, sign flag is set.

6. Overflow Flag (OF):

 It occurs when signed numbers are added or subtracted.
 An OF indicates that the result has exceeded the capacity of machine.

Control Flags

Control flags are set or reset to control the operations of the execution unit.
Control flags are as follows:

1. Trap Flag (TP):

 It is used for single step control.
 It allows user to execute one instruction of a program at a time for
debugging.
 When trap flag is set, program can be run in single step mode.

2. Interrupt Flag (IF):

 It is an interrupt enable/disable flag.
 If it is set, the maskable interrupt of 8086 is enabled and if it is reset, the
interrupt is disabled.
 It can be set by executing instruction STI and can be cleared by executing
CLI instruction.

3. Direction Flag (DF):

 It is used in string operation.
 If it is set, string bytes are accessed from higher memory address to lower
memory address.
 When it is reset, the string bytes are accessed from lower memory address
to higher memory address.
------------------------------------------------------------------------------------------------
MEMORY SEGMENTATION IN 8086

 In memory, data is stored as bytes.

o Each byte has a specific address.
o Intel 8086 has 20 lines address bus.
o With 20 address lines, the memory that can be addressed is 220
bytes.
 220 = 1,048,576 bytes (1 MB).
o 8086 can access memory with address ranging from 00000 H to
FFFFF H.
 A segment is an area in memory.
 The total memory size is divided into segments of various sizes.
  The lower 4-bits of the starting address of a segment is always zero.
 The maximum size possible for a segment is 216 = 65,535 bytes (64 KB)
o This is because all segment offsets are limited to 16-bits.
o The offset of the first location within the segment is 0000 H.
o The offset of the last location in the segment is FFFF H.
 In 8086, memory has four different types of segments.
o Code Segment: The Code segment contains the instructions of a
program.
o Data Segment: The Data segment provides a read/write memory in
which the data of a program can be stored.
o Stack Segment: The Stack segment is used for temporary storage
of addresses and data. It is in this segment that the
values of the IP register, the Flags register, and
other registers are stored whenever an Interrupt or
subroutine call occurs.
o Extra Segment: The Extra segment is usually used for data storage.
Some string operations use the Extra segment to
handle memory addressing.
 Each of these segments is accessed by an address stored in corresponding
segment register.
 Segment registers are 16 bits in size.
 Because the segment registers cannot store 20 bits, they only store the
upper 16 bits of the starting address of corresponding memory segment.
------------------------------------------------------------------------------------------------
PHYSICAL ADDRESS CALCULATION

 The 20-bit address of a byte is called its Physical Address.

 The complete physical address which is 20-bits long is generated using
segment and offset registers each of the size 16-bit.
 Offset is the displacement of the memory location from the starting
location of the segment.
 The content of a segment register is also called as segment address, and
content of an offset register is also called as offset address.
 A segmented memory address is identified with a segment and an offset
address
 The standard notation is Segment : Offset
 TheSegment : Offset is defined as Logical Address.
 To calculate the effective address of the memory, BIU uses the following
formula:
Effective Address = Starting Address of Segment + Offset
 o To find the starting address of the segment, BIU appends the
contents of Segment Register with 0H.
o Then, it adds offset to it.
 Segment Offset Registers Function
SEGMENT OFFSET REGISTERS FUNCTION
CS IP Address of next instruction
DS BX, DI, SI Address of data
ES BX, DI, SI Address of destination data( for
string operations
SS SP, BP Address in the stack

Example
 Find the physical ( effective) address of the data at location that has a
logical address specified as:2222 H : 0016 H
o the number 0016 H is the offset.
o 2222 H is the value of DS.
 To find the starting address of the segment, BIU appends the contents of
Segment Register with 0H.
Therefore: starting address=22220 H
 Then, it adds offset to it.
EA = 2 2 2 2 0 H +
0016H
------------
22236H
Question ?

The contents of the following registers are:

CS = 1111 H
DS = 3333 H
SS = 2526 H
IP = 1232 H
SP = 1100 H
DI = 0020 H
Calculate the corresponding physical addresses for the address bytes in CS, DS
and SS.

CS = 1111 H
The base address of the code segment is 11110 H.
Effective address of memory = 11110H + 1232H = 12342H.
DS = 3333 H
The base address of the data segment is 33330 H.
Effective address of memory = 33330H + 0020H = 33350H.
SS = 2526 H
The base address of the stack segment is 25260 H.
Effective address of memory = 25260H + 1100H = 26350H.
--------------------------------------------------------------------------------------------