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MICROPROCESSOR AND MICROCONTROLLER BASED

SYSTEMS (FOR CSE & IT)
UNIT 2

8085 INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING 9 Hrs. Instruction

classifications, Writing and executing simple programs - Arithmetic and logic operations - Data transfer -
Branching - Looping – Indexing - Counter and time delays - Writing subroutine - Conditional call and return
instruction, simple programs.

Instruction Set Classification

An instruction is a binary pattern designed inside a microprocessor to perform a specific function. The
entire group of instructions, called the instruction set, determines what functions the microprocessor can
perform. These instructions can be classified into the following five functional categories: data transfer
(copy) operations, arithmetic operations, logical operations, branching operations, and machine-
control operations.

1. Data Transfer (Copy) Operations

This group of instructions copy data from a location called a source to another location called a destination,
without modifying the contents of the source. In technical manuals, the term data transfer is used for this
copying function. However, the term transfer is misleading; it creates the impression that the contents of the
source are destroyed when, in fact, the contents are retained without any modification. The various types of
data transfer (copy) are listed below together with examples of each type:

Types Examples

1. Between Registers. 1. Copy the contents of the register B into

register D.

2. Specific data byte to a register or a 2. Load register B with the data byte 32H.
memory location.

3. Between a memory location and a 3. From a memory location 2000H to register

register. B.

4. Between an I/O device and the 4.From an input keyboard to the

accumulator. accumulator.
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Opcode Operand Description

Copy from source to destination
MOV Rd, Rs This instruction copies the contents of the source
M, Rs register into the destination register; the contents
Rd, M of the source register are not altere . If one of the
operands is a memory ocation, its ocation is
specified by the contents of the HL registers.
Example: MOV B, C or MOV B, M
Move immediate 8-bit
MVI Rd, data The 8-bit data is sto ed in the destination register
M, data or memory. If the ope and is a memo y ocation, its
location is specified by the contents of the HL
registers.
Example: MVI B, 57 MVI M, 57

Load accumulator
LDA 16-bit The c ntents f a mem ry location, specified by
address a16-bit address in the perand, are copied to the
accumulator. The contents of the source are not
altered.
Example: LDA 2034 or LDA XYZ

Load accumulator indirect

LDAX B/D Reg. The contents of the designated register pair point to a
pai memory location. This instruction copies the
contents of that memory location into the
accumulator. The contents of either the register

pair or the memory location are not altered.

Example: LDAX B
Store accumulator direct
SA 16-bit The contents of the accumulator are copied into the
address memory location specified by the operand.
This is a 3-byte instruction, the second byte
specifies the low-order address and the third byte
specifies the high-order address.
Example: STA 4350 or STA XYZ
Store accumulator indirect
S AX Reg. pair The contents of the accumulator are copied into the
memory location specified by the contents of the
operand (register pair). The contents of the
accumulator are not altered.
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2. Arithmetic Operations

These instructions perform arithmetic operations such as addition, subtraction, increment, and
decrement.

Addition - Any 8-bit number, or the contents of a register or the contents of a memory location can be
added to the contents of the accumulator and the sum is stored in the accumulator. No two other 8-bit
registers can be added directly (e.g., the contents of register B cannot be added directly to the contents
of the register C). The instruction DAD is an exception; it adds 16-bit data directly in register pairs.

Subtraction - Any 8-bit number, or the contents of a register, or the contents of a memory location can
be subtracted from the contents of the accumulator and the results stored in the accumulator. The
subtraction is performed in 2's compliment, and the results if negative, are expressed in 2's
complement. No two other registers can be subtracted directly.

Increment/Decrement - The 8-bit contents of a register or a memory location can be incremented or

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decrement by 1. Similarly, the 16-bit contents of a register pair (such as BC) can be incremented or
decrement by 1. These increment and decrement operations differ from addition and subtraction in an
important way; i.e., they can be performed in any one of the registers or in a memory location.
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3. Logical Operations

These instructions perform various logical operations with the contents of the accumulator.

AND, OR Exclusive-OR - Any 8-bit number, or the contents of a register, or of a memory location can be
logically ANDed, Ored, or Exclusive-ORed with the contents of the accumulator. The results are stored in
the accumulator.

Rotate- Each bit in the accumulator can be shifted either left or right to the next position.

Compare- Any 8-bit number, or the contents of a register, or a memory location can be compared for
equality, greater than, or less than, with the contents of the accumulator.

Complement - The contents of the accumulator can be complemented. All 0s are replaced by 1s and all 1s
are replaced by 0s.

Opcode Operand Description

Compare register or memory with accumulator
CMP R The contents of the operand (register or memory) are
M compared with the contents of the accumulator. Both
contents are preserved . The result of the comparison
is
shown by setting the flags of the PSW as follows:
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if (A) < (reg/mem): carry flag is set, s=1

if (A) = (reg/mem): zero flag is set, s=0
if (A) > (reg/mem): carry and zero flags are reset, s=0
Example: CMP B or CMP M
Compare immediate with accumulator
The second byte (8- bit data) is compared with the contents
CPI 8-bit data of
the accumulator. The values being compared remain
unchanged. The result of the comparison is shown by setting
the flags of the PSW as follows:

if(A) < data: carry flag is set, s=1

if (A) = data: zero flag is set, s=0

if (A) > data: carry and zero flags are reset, s=0
Example: CPI 89

Logical AND register or memory with accumulator

ANA R The contents of the accumulator are logically ANDed with
the contents of the operand (register or memory), and
M the
result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents
of
HL registers. S, Z, P are modified to reflect the result of
the operation. CY is reset. AC is set.
Example: ANA B or ANA M

Logical AND immediate with accumulator

ANI 8-bit data The contents of the accumulator are ogica y ANDe with
the 8-bit data (operand) and the esu t is p ace in the
ef ect the esult of
accumulator. S, Z, P are modified to the
operation. CY is reset. AC is set.
Example: ANI 86

Exclusive OR register or memory with accumulator

XRA R The contents f the accumulator are Exclusive ORed with
M the contents f the perand (register r memory), and the
result is placed in the accumulator. If the operand is a
n, its address is specified by the contents
memory locati of
HL registers. S, Z, P are modified to reflect the result of
the operation. CY and AC are reset.
Example: XRA B or XRA M

Logical OR register or memory with accumulator

ORA R The contents of the accumulator are logically ORed with
M the contents f the operand (register/memory), and the
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Examp e: JZ 2034 or JZ XYZ

Result is placed in the accumulator. If the operand is a
n, its address is specified by the contents
mem y cati of
HL registe s. S, Z, P are modified to reflect the result of the
World

operation. CY and AC are reset.

Example: ORA B or ORA M

Exclusive OR immediate with accumulator

XRI 8-bit data The contents of the accumulator are Exclusive ORed with the
8-bit data (operand) and the result is placed in the
accumulator. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: XRI 86

Logical OR immediate with accumulator

the contents of the accumulator are logically ORed with
ORI 8-bit data the
8-bit data (operand) and the result is placed in the
accumulator. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: ORI 86

Complement accumulator
The contents of the accumulator are complemented. No
CMA none flags
are affected.Example: CMA

Complement carry
CMC none The Carry flag is complemented. No other flags are affected.
Example: CMC
Set Carry
STC none The Carry flag is set to 1. No other flags are affected.
Example: STC

Branching Operations

This group of instructions alters the sequence of program execution either conditionally or
unconditionally.

Jump - Conditional jumps are an important aspect of the decision-making process in the
programming. These instructions test for a certain conditions (e.g., Zero or Carry flag) and alter the
program sequence when the condition is met. In addition, the instruction set includes an instruction
called unconditional jump.

Call, Return, and Restart - These instructions change the sequence of a program either by calling
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a subroutine or returning from a subroutine. The conditional Call and Return instructions also can
test condition flags.
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SAMPLE PROGRAMS

4. Machine Control Operations

These instructions control machine functions such as Halt, Interrupt, or do nothing.

The microprocessor operations related to data manipulation can be summarized in four functions:
1. copying data
2. performing arithmetic operations
3. performing logical operations
4. testing for a given condition and alerting the program sequence

Some important aspects of the instruction set are noted below:

1. In data transfer, the contents of the source are not destroyed; only the contents of the destination are
changed. The data copy instructions do not affect the flags.
2. Arithmetic and Logical operations are performed with the contents of the accumulator, and the results are
stored in the accumulator (with some expectations). The flags are affected according to the results.
3. Any register including the memory can be used for increment and decrement.
4. A program sequence can be changed either conditionally or by testing for a given data condition.

8. Instruction Format

An instruction is a command to the microprocessor to perform a given task on a specified data. Each

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instruction has two parts: one is task to be performed, called the operation code (opcode), and the second is
the data to be operated on, called the operand. The operand (or data) can be specified in various ways. It may
include 8-bit (or 16-bit ) data, an internal register, a memory location, or 8-bit (or 16-bit) address. In some
instructions, the operand is implicit.

Instruction word size

The 8085 instruction set is classified into the following three groups according to word size:

1. One-word or 1-byte instructions

2. Two-word or 2-byte instructions
3. Three-word or 3-byte instructions

In the 8085, "byte" and "word" are synonymous because it is an 8-bit microprocessor. However, instructions
are commonly referred to in terms of bytes rather than words.

One-Byte Instructions

A 1-byte instruction includes the opcode and operand in the same byte. Operand(s) are internal register and
are coded into the instruction.
For example:

Task Op Operand Binary Hex

code Code Code

Copy the contents of the accumulator in MOV C,A 0100 1111 4FH
the register C.

Add the contents of register B to the ADD B 1000 0000 80H

contents of the accumulator.

Invert (compliment) each bit in the CMA 0010 1111 2FH

accumulator.

These instructions are 1-byte instructions performing three different tasks. In the first instruction, both operand
registers are specified. In the second instruction, the operand B is specified and the accumulator is assumed.
Similarly, in the third instruction, the accumulator is assumed to be the implicit operand. These instructions are
stored in 8-bit binary format in memory; each requires one memory location.

MOV rd, rs
rd <-- rs copies contents of rs into rd.
Coded as 01 ddd sss where ddd is a code for one of the 7 general registers which is the destination of the
data, sss is the code of the source register.

Example: MOV A,B

Coded as 01111000 = 78H = 170 octal (octal was used extensively in instruction design of such
processors).

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ADD r
A <-- A + r

Two-Byte Instructions

In a two-byte instruction, the first byte specifies the operation code and the second byte specifies the
operand. Source operand is a data byte immediately following the opcode. For example:

Task Opcode Operand Binary Hex Code

Code

Load an 8-bit data MVI A, Data 3E First Byte

0011 1110
byte in the
accumulator. Data Second Byte

DATA

Assume that the data byte is 32H. The assembly language instruction is written as

Mnemonics Hex code

MVI A, 32H 3E 32H

The instruction would require two memory locations to store in memory.

MVI r,data r <-- data

Example: MVI A,30H coded as 3EH 30H as two contiguous bytes. This is an example of immediate
addressing.

ADI data
A <-- A + data

OUT port
where port is an 8-bit device address. (Port) <-- A. Since the byte is not the data but points directly to where it is
located this is called direct addressing.

Three-Byte Instructions

In a three-byte instruction, the first byte specifies the opcode, and the following two bytes specify the 16-bit
address. Note that the second byte is the low-order address and the third byte is the high-order address.
opcode + data byte + data byte

For example:

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Task Opcode Operand Binary code Hex Code

Transfer the JMP 2085H C3 First byte
program 1100 0011

sequence to 85 Second Byte

1000 0101
the memory
location 0010 0000 20 Third Byte

2085H.

This instruction would require three memory locations to store in memory.

Three byte instructions - opcode + data byte + data byte

LXI rp, data16

rp is one of the pairs of registers BC, DE, HL used as 16-bit registers. The two data bytes are 16-bit data in
L H order of significance.
rp <-- data16

Example:
LXI H,0520H coded as 21H 20H 50H in three bytes. This is also immediate addressing.

LDA addr

A <-- (addr) Addr is a 16-bit address in L H order. Example: LDA 2134H coded as 3AH 34H 21H. This is
also an example of direct addressing.

Looping:
The program is written in such a way that it executes certain set of instructions repeatedly to execute a certain
task for a number of times. Example: to perform multiplication of two numbers. This is nothing but repeated
addition.

Counting: The program has a track of how many times the instruction or a set of instructions are executed. Eg:
When division operation is performed a register is used to count the number of times the subtraction is done. The
content of that register will give the quotient.

Indexing: it allows the user to point or refer the data stored in a sequential memeory location one by one.

Sample Programs

Write an assembly program to multiply a number by 8

Program

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MVI A, 30H
RRC
RRC
RRC
OUT PORT1
HLT

ADDITION OF TWO 8 BIT NUMBERS

PROGRAM:

MVI C, 00 Initialize C register to 00

LDA 4150 Load the value to Accumulator.
MOV B, A Move the content of Accumulator to B register.
LDA 4151 Load the value to Accumulator.
ADD B Add the value of register B to A
JNC LOOP Jump on no carry.
INR C Increment value of register C
LOOP: STA 4152 Store the value of Accumulator (SUM).
MOV A, C Move content of register C to Acc.
STA 4153 Store the value of Accumulator (CARRY)
HLT Halt the program.

OBSERVATION:

Input: 80 (4150)
80 (4251)
Output: 00 (4152)
01 (4153)

SUBTRACTION OF TWO 8 BIT NUMBERS

PROGRAM:

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MVI C, 00 Initialize C to 00
LDA 4150 Load the value to Acc.
MOV B, A Move the content of Acc to B register.
LDA 4151 Load the value to Acc.
SUB B
JNC LOOP Jump on no carry.
CMA Complement Accumulator contents.
INR A Increment value in Accumulator.
INR C Increment value in register C
LOOP: STA 4152 Store the value of A-reg to memory address.
MOV A, C Move contents of register C to Accumulator.
STA 4153 Store the value of Accumulator memory
HLT Terminate the program.

OBSERVATION:

Input: 06 (4150)
02 (4251)
Output: 04 (4152)
01 (4153)

MULTIPLICATION OF TWO 8 BIT NUMBERS

PROGRAM:

MVI D, 00 Initialize register D to 00

MVI A, 00 Initialize Accumulator content to 00
LXI H, 4150
MOV B, M Get the first number in B - reg
INX H
MOV C, M Get the second number in C- reg.
LOOP: ADD B Add content of A - reg to register
JNC NEXT B.
Jump on no carry to NEXT.
INR D Increment content of register D
NEXT: DCR C Decrement content of register C.
JNZ LOOP Jump on no zero to address
STA 4152 Store the result in Memory

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MOV A, D
STA 4153 Store the MSB of result in Memory
HLT Terminate the program.

OBSERVATION:

Input: FF (4150)
FF (4151)
Output: 01 (4152)
FE (4153)

DIVISION OF TWO 8 BIT NUMBERS

PROGRAM:

LXI H, 4150
MOV B, M Get the dividend in B – reg.
MVI C, 00 Clear C – reg for qoutient
INX H
MOV A, M Get the divisor in A – reg.
NEXT: CMP B Compare A - reg with register
JC LOOP Jump on carry to LOOP
SUB B Subtract A – reg from B- reg.
INR C Increment content of register
JMP NEXT C.
Jump to NEXT
LOOP: STA 4152 Store the remainder in
MOV A, C Memory
STA 4153 Store the quotient in memory
HLT Terminate the program.

OBSERVATION:

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Input: FF (4150)
FF (4251)

Output: 01 (4152) ---- Remainder

FE (4153) ---- Quotient

LARGEST NUMBER IN AN ARRAY OF DATA

PROGRAM:

LXI H,4200 Set pointer for

MOV B,M array Load the
INX H Count
MOV A,M Set 1st element as largest data
DCR B Decrement the count
LOOP: INX H
CMP M If A- reg > M go to AHEAD
JNC AHEAD
MOV A,M Set the new value as largest
AHEAD: DCR B
JNZ LOOP Repeat comparisons till count =
STA 4300 Store the largest value at 4300
HLT

OBSERVATION:

Input: 05 (4200) ----- Array Size

0A (4201)
F1 (4202)
1F (4203)
26 (4204)
FE (4205)

Output: FE (4300)

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SMALLEST NUMBER IN AN ARRAY OF DATA

PROGRAM:

LXI H,4200 Set pointer for

MOV B,M array Load the
INX H Countst
MOV A,M Set 1 element as largest data
DCR B Decrement the count
LOOP: INX H
CMP M If A- reg < M go to AHEAD
JC AHEAD
MOV A,M Set the new value as smallest
AHEAD: DCR B
JNZ LOOP Repeat comparisons till count =
STA 4300 Store the largest value at 4300
HLT

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OBSERVATION:

Input: 05 (4200) ----- Array Size

0A (4201)
F1 (4202)
1F (4203)
26 (4204)
FE (4205)

Output: 0A (4300)

ARRANGE AN ARRAY OF DATA IN ASCENDING ORDER

ALGORITHM:

1. Initialize HL pair as memory pointer

2. Get the count at 4200 into C – register
3. Copy it in D – register (for bubble sort (N-1) times required)
4. Get the first value in A – register
5. Compare it with the value at next location.
6. If they are out of order, exchange the contents of A –register and Memory
7. Decrement D –register content by 1
8. Repeat steps 5 and 7 till the value in D- register become zero
9. Decrement C –register content by 1
10. Repeat steps 3 to 9 till the value in C – register becomes zero

PROGRAM:

LXI H,4200
MOV C,M
DCR C
REPEAT: MOV D,C
LXI H,4201
LOOP: MOV A,M
INX H
CMP M
JC SKIP
MOV B,M

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MOV M,A
DCX H
MOV M,B
INX H
SKIP: DCR D
JNZ LOOP
DCR C
JNZ REPEAT
HLT

OBSERVATION:

Input 4200 05 (Array Size)

4201 05
4202 04
4203 03
4204 02
4205 01

Output: 4200 05(Array Size)

4201 01
4202 02
4203 03
4204 04
4205 05

ARRANGE AN ARRAY OF DATA IN DESCENDING ORDER

PROGRAM:

LXI H,4200
MOV C,M
DCR C
REPEAT: MOV D,C
LXI H,4201
LOOP: MOV A,M
INX H

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CMP M
JNC SKIP
MOV B,M
MOV M,A
DCX H
MOV M,B
INX H
SKIP: DCR D
JNZ LOOP
DCR C
JNZ REPEAT
HLT

OBSERVATION:

Input 4200 05 (Array Size)

4201 01
4202 02
4203 03
4204 04
4205 05

Output: 4200 05(Array Size)

4201 05
4202 04
4203 03
4204 02
4205 01

BCD TO HEX CONVERSION

PROGRAM:

LXI H,4150
MOV A,M Initialize memory
ADD A pointer
MSD X 2
MOV B,A Store MSD X 2

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ADD A MSD X 4
ADD A MSD X 8
ADD B MSD X 10
INX H Point to LSD
ADD M Add to form HEX
INX H
MOV M,A Store the result
HLT

OBSERVATION:

Input: 4150 : 02 (MSD)

4151 : 09 (LSD)

Output: 4152 : 1D H

HEX TO BCD CONVERSION

PROGRAM:

LXI H,4150 Initialize memory pointer

MVI D,00 Clear D- reg for Most significant
XRA A Clear Accumulator
MOV C,M Get HEX data
LOOP2: ADI 01 Count the number one by one
DAA Adjust for BCD count
JNC LOOP1
INR D
LOOP1: DCR C
JNZ LOOP2
STA 4151 Store the Least Significant Byte
MOV A,D
STA 4152 Store the Most Significant Byte
HLT

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OBSERVATION:

Input: 4150 : FF

Output: 4151 : 55 (LSB)

4152 : 02 (MSB)

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HEX TO ASCII CONVERSION

PROGRAM:

LDA 4200 Get Hexa Data

MOV B,A
ANI 0F Mask Upper Nibble
CALL SUB1 Get ASCII code for upper nibble
STA 4201
MOV A,B
ANI F0 Mask Lower Nibble
RLC
RLC
RLC
RLC
CALL SUB1 Get ASCII code for lower nibble
STA 4202
HLT
SUB1: CPI 0A
JC SKIP
ADI 07
SKIP: ADI 30
RET

OBSERVATION:

Input: 4200 E4(Hexa data)

Output: 4201 34(ASCII Code for 4)

4202 45(ASCII Code for E)

ASCII TO HEX CONVERSION

PROGRAM:
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LDA 4500
SUI 30
CPI 0A
JC SKIP
SUI 07
SKIP: STA 4501 HLT

OBSERVATION:

Input: 4500 31

Output: 4501 0B

SQUARE OF A NUMBER USING LOOK UP

TABLE
ALGORITHM:

1. Initialize HL pair to point Look up table

2. Get the data .
3. Check whether the given input is less than 9.
4. If yes go to next step else halt the program
5. Add the desired address with the accumulator content
6. Store the result

PROGRAM:

LXI H,4125 Initialsie Look up table

LDA 4150 Get the data
CPI 0A Check input > 9
JC AFTER if yes error
MVI A,FF Error Indication
STA 4151
HLT
AFTER: MOV C,A Add the desired Address
MVI B,00
DAD B
MOV A,M
STA 4151 Store the result
HLT Terminate the program
SEC1312 MICROPROCESSOR AND MICROCONTROLLERBASED SYSTEMS
UNIT 2 PREPARED BY: U. ANITHA & P.GRACE KANMANI PRINCE

LOOKUP TABLE:

4125 01
4126 04
4127 09
4128 16
4129 25
4130 36
4131 49
4132 64
4133 81

OBSERVATION:

Input: 4150: 05

Output: 4151 25 (Square)

Input : 4150: 11

Output: 4151: FF (Error Indication)

RESULT:

Thus the program to find the square of the number from 0 to 9 using a Look up table was executed