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Lecture 6

محاضرات ملهاش لازمة

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0% found this document useful (0 votes)
4 views

Lecture 6

محاضرات ملهاش لازمة

Uploaded by

kotch80002
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Computer Architecture and Organization

CSE 1612
Level#1

DR. SAMAR A. SAID


2024/2025
CU design
Points to be covered:
Hardwired control unit design.
Microprogrammed control unit design.

2
The basic components of any digital
computer
Digital
Computer

I/O devices CPU Memories

Processor
Control unit
Unit

Micro Internal
Hardwired ALU Registers
programmed Buses

AU LU
Logic design of a digital system

The logic design of a digital system can be divided into two distinct parts.
◦ First part is concerned with the design of the digital circuits that performs the data processing operations.
◦ Second part is concerned with the design of the control circuit that supervises the operations and
determines the sequence in which they are executed.

The relationship between the control logic and the data processor subsystems in a digital system is
shown in Figure.
CU design
Control
Organization

Hardwired Micro programmed

In the hardwired organization, the control logic is implemented with gates and
flip-flops similar to a sequential circuit. It has the advantage that it can be
optimized to produce a fast mode of operation.

In the microprogrammed organization, the control information such as control


functions or control words are stored as 1's and 0's in a special memory.
Comparison between Hardwired
and Microprogrammed Control
unit
Hardwired Control unit Microprogrammed Control unit

the control logic is implemented the control information such as


with gates and flip-flops similar control functions or control words are
to a sequential circuit stored as 1's and 0's in a special
memory.

Fast Slow

High cost Low cost

Complex design Simple design

Any change are difficult to do Any change are simple to do by


changing content of control memory
Hardwired Control unit
The design of a hardwired control unit involves various complex tradeoffs
between:
1. The amount of hardware used.
2. The speed of operation.
3. The cost of the design process itself.

Because of the large number of control signals used in a typical CPU and their
dependence on the particular instruction set being implemented, the design
methods employed in practice are often hard in nature, and therefore cannot
easily be formalized.

Therefore

we consider one simplified approaches to the design of hardwired controllers.


Hardwired Control unit
These methods are representative of those used in practice, but by themselves
are suitable only for small control units such as might be encountered in
Reduced Instruction Set Computer (RISC) processors.

Hardwired control unit

Sequence Counter

A related method that uses


counters which call sequencer
counters for timing purpose
Sequence counter method
Sequence counter method used a modulo-K sequence counter to generate the clock
k-pulse signals [ɸi] to control the sequence of execution of a program.

• First, we will explain how the modulo-K sequence counter operates internally.

• Second, we will show how to use it to control the sequence of execution of a


program.
Sequence counter method
Consider the following circuit which shows how the modulo-K sequence counter
operates internally.

• If the count enable input is connected to a clock source, the counter cycles
continually through its k-states.

• The decoder generates k-pulse signals [ɸi], on its output lines.

• Two additional input lines and a flip-flop are provided for turning the counter on
and off.
Sequence counter method
Basic operations:

• To start S=1, R=0, Reset=0,


clk exists. So Q= 1 and 𝑸 =0.
• Then the enable will be
active and Module-k counter
operates

• To stop S=0, R=1, Reset =0,


clk exists. So Q= 0 and 𝑸 =1.
• Then the enable will not be S R Q
active and Module-k counter
0 0 nochange
don't operates 0 1 0
1 0 1
1 1 initial
Sequence counter method

• We will show how to use the modulo-K sequence counter to control the sequence of execution of a
program.

Example : Consider the hypothetical CPU, simple accumulator based CPU before. Assuming that it is
required to execute the set of eight one address instructions listed below, show how to design a simple
control unit to perform the following program using Sequence counter method.
Sequence counter method

Transfer PC to memory address Register AR


• As discussed before
to execute any instruction
we need to two main cycles'
fetch and decode Fetch the instruction from main memory

Fetch Cycle
1. AR PC
2. Read M Increment PC and decode the instruction
3. PC PC+1
IR DR(OP)
Execution Cycle Transfer the Operand address to memory
4. AR DR(ADR) address Register
5. Read M
6. Execute
Fetch the operand from memory
• We take two memory
cycle(clks) for each read or
write from memory. Perform the Operation specified in the
• We take one memory cycle instruction
(clk) for other operations
Sequence counter method
• Flow chart of program execution for any
of 8 instructions
Sequence counter method
• Flow chart of program execution for any
of 8 instructions

𝐶 ɸ

𝐶 ɸ ,

𝐶 ɸ
𝐶 ɸ

𝐶 ɸ 𝐶 ɸ 𝐶 ɸ 𝐶 ɸ

𝐶 ɸ , 𝐶 ɸ 𝐶 ɸ , 𝐶 ɸ ,

𝐶 ɸ 𝐶 ɸ , 𝐶 ɸ 𝐶 ɸ 𝐶 ɸ 𝐶 ɸ 𝐶 ɸ 𝐶 ɸ
Sequence counter method
• The microperations in this flowchart determine the control signals and control points needed in the CPU.
• The following table lists a suitable set of control signals and their functions.

Control signal Operation controlled


𝑪𝟏 AR <- PC
𝑪𝟐 DR <-M(AR) (Read M)
𝑪𝟑 PC<- PC+1
𝑪𝟒 IR <- DR (OP) , Decode OP
𝑪𝟓 AR<- DR (ADR)
𝑪𝟔 AC <- DR
𝑪𝟕 DR <- AC
𝑪𝟖 M (AR) <- DR (Write M)

𝑪𝟗 AC <- AC+DR

𝑪𝟏𝟎 AC <- AC^DR

𝑪𝟏𝟏 PC <- DR (ADR)

𝑪𝟏𝟐 AC <- 𝑨𝑪

𝑪𝟏𝟑 Right shift AC


Sequence counter method
• The general structure of a simple hardwired control unit
Sequence counter method
• Now lets show how to design the combinational circuit.

In general, each control Ci can be defined by a logic equation of the form:


𝑪𝒊 = ∑𝒋(ɸ𝒋 ∑𝒊 𝑰𝒊 )

For example, C2, which causes a memory read operation to take place, is
defined by the following logic equation:

𝑪𝟐 = ɸ𝟐,𝟑 + ɸ𝟔,𝟕 (𝑳𝑶𝑨𝑫 + 𝑨𝑫𝑫 + 𝑨𝑵𝑫)

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Sequence counter method
• Flow chart of program execution for any of 8 instructions

𝑪𝟐 = ɸ𝟐,𝟑 + ɸ𝟔,𝟕 (𝑳𝑶𝑨𝑫 + 𝑨𝑫𝑫 + 𝑨𝑵𝑫)

𝐶 ɸ

𝐶 ɸ ,

𝐶 ɸ
𝐶 ɸ

𝐶 ɸ 𝐶 ɸ 𝐶 ɸ 𝐶 ɸ

𝐶 ɸ , 𝐶 ɸ 𝐶 ɸ , 𝐶 ɸ ,

𝐶 ɸ 𝐶 ɸ , 𝐶 ɸ 𝐶 ɸ 𝐶 ɸ 𝐶 ɸ 𝐶 ɸ 𝐶 ɸ
Task
Design a Hardwired control unit that performs the following
operations:
M[x] AC + M[x]

Solution
1.ADD x --- AC  AC + M[x]
2.Store x --- M[x]  AC

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Task
Design a Hardwired control unit that performs the following
operations:
1.Store x --- M[x]  AC
2.ADD x --- AC  AC + M[x]
3.AND x --- AC  AC ^ M[x]
4.COMP --- AC  𝑨𝑪

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Task

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Task

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Task
Design a Hardwired control unit that performs the following
operations:
R1 SHR(R2+R3)

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