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The document discusses charge sharing in dynamic circuits, focusing on a specific circuit's behavior during precharge and evaluate phases. It calculates voltage drops on output Vo based on changes in inputs A and B, taking into account the body effect and charge conservation principles. Additionally, it determines the maximum number of transistors that can be connected in series without the output falling below a specified voltage during the evaluate phase.

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kanha dd
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10 views2 pages

New

The document discusses charge sharing in dynamic circuits, focusing on a specific circuit's behavior during precharge and evaluate phases. It calculates voltage drops on output Vo based on changes in inputs A and B, taking into account the body effect and charge conservation principles. Additionally, it determines the maximum number of transistors that can be connected in series without the output falling below a specified voltage during the evaluate phase.

Uploaded by

kanha dd
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Exercise 2: Charge Sharing in Dynamic Circuits

Given the following circuit, assuming that all inputs of the circuit
shown in Figure 1 below are initially 0 during the precharge phase
and that all internal nodes are at 0V:
a. Calculate the voltage drop on Vo, if A changes to 1 (VDD=2.5V)
during the evaluate phase. It is given that Vtn0=0.5V,
2φF=0.6V and γ=0.4V0.5.
Hint: Don’t forget the body effect.
b. Now calculate the voltage drop on Vo if both A and B change to 1
(under the above conditions).
c. What is the maximum number of transistors that can be connected
in series to M1 and M2 (including M1 and M2, excluding M0) if the
output should not fall below 0.9V during the evaluate phase? Assume
that each one of the new transistors has the same intrinsic capacitance
(to ground) as M1 and M2 (C=10fF).

Solution
a. Assuming that ΔVout  Vtn , the capacitor C1 is charged to a voltage VS , which is the
maximum voltage for which M1 conducts. VS is calculated using the equation that is valid at
the edge of conduction and cut-off:

VGS  Vtn  VGS  Vtn 0  γ  2φF  VSB  2φF 


Since the bulk of the NMOS transistors is connected to ground, the previous equation
can be rewritten as:

VG  VS  Vtn 0  γ  2φF  VS  2φF  VG  VS  Vtn 0  γ 2φF  γ  2φF  VS 



 VG  VS  Vtn 0  γ 2φF   γ 2φ
2
2
F  VS   VS2  4.78VS  5.234  0
4.78V  1.38V
 VS   1.7V
2
(We accept only the lower solution of the quadratic equation, since after reaching this
voltage the transistor doesn’t conduct and can’t thus reach the higher value).
Hence, charge conservation yields:
CLVDD  CLVo  C1VS  CL ΔVo  C1VS  ΔVo  C1VS / CL  0.44V
Since VG  VS  Vtn , Vtn  0.8V .

Hence, our assumption about ΔVo  Vtn  0.8V was correct.

b. Similarly to (a), capacitors C1 and C 2 will be charged to a final voltage of 1.7V.


Hence, charge conservation gives: CL ΔVo  C1VS  C2VS  ΔVo  0.88V  Vtn

Hence, our assumption that ΔVout  Vtn doesn’t hold anymore and ΔVo is calculated as
Cs
follows: ΔVo  VDD , where Cs  C1  C2 .
Cs  CL
20
Hence, ΔVo  2.5V  0.83V
20  40
c. The final value of Vo  0.9V corresponds to ΔVo  1.6V  Vtn . Hence, the following
equation is valid:
Cs
ΔVo  VDD (1)
Cs  CL
where C s the total intrinsic capacitance to be charged.

The worst case is when all of the connected transistors conduct and thus Cs  NC
(where N the number of the transistors). In this case (1) gives:
ΔVo ( NC  CL )  VDD NC
 NC(VDD  ΔVo )  ΔVo CL
1.6V  40 fF
N  7.1 , hence N = 7.
0.9V  10 fF

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