Microprocessor & Microcontroller
Microprocessor & Microcontroller
INTERNAL ARCHITECTURE
8085
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1.The register which keeps track of the sequence of instruction
execution:
ES
2.In 8085 microprocessor the value of the most significant bit
of the result following the execution of any automatic or
Boolean instruction is stored in the:
SS
a. Carry status flag
b. Auxiliary carry status flag
c. Sign status flag
LA
d. Zero status flag
ans-C
C
E
a. Accumulator
b. Program counter
R
c. Stack pointer
d. Instruction register
SI
ans-B
ES
5.The address bus of Intel 8085 is 16 bits and hence the
memory which can be accessed by this address bus is:
SS
a. 1 K byte b. 16 k byte ans-D
c. 32 k byte d. 64 k byte
LA
6.Which one of the following interrupt is both level and edge
sensitive?
c. TRAP d. INTR
ans-C
E
JE
RST 0
The software interrupts are:
SI
a. 0030H b. 0005H
c. 0028H d. 0024H ans-C
9. In a microprocessor, wait states are used to:
ES
d. Interface slow peripherals to the processor.
ans-A
10. In a microprocessor, when a CPU is interrupted, it:
SS
a. Stop the execution of instruction.
b. Acknowledges interrupt and branches of subroutine.
c. Acknowledges interrupt and continues.
LA
d. Acknowledges interrupt and waits for the next instruction
from the interrupting device.
ans-D
C
E
JE
a. 1 b. 4 ans-C
c.5 d. 13
13. In the 8085 microprocessor the RST 6 instruction transfers
the program execution to the following location.
ES
a. 30H b. 24H
c. 48H d. 60H
ans-A
SS
14. In microprocessor system the stack is used for:
LA
a. Storing the program return address whenever a subroutine
jump instruction is executed.
b. Transmitting and receiving input output data.
c. Storing call important CPU register contents whenever an
C
interrupt is to be serviced.
d. Storing program instruction for interrupt service routines.
E
ans-D
JE
R
SI
ES
SS
17. Instruction used to set the carry flag in a computer can be
classified as:
LA
a. Data transfer b. arithmetic
c. Logical d. program control ans-C
C
a. 6800 b. 68000
ans-C
ES
c. 8080 d. 8000
SS
a. It is level triggered.
b. It is negative edge triggered
c. It is positive edge triggered
LA
d. It is both positive edge triggered and level triggered.
ans-D
C
E
ans-D
24. In 8085 Microprocessor system the direct addressing
instruction is:
ES
25. Fetching, decoding and executing of an instruction involving
one or more clock pulse is called:
a. Instruction cycle.
SS
b. Machine cycle.
c. Process cycle.
d. None of the above.
LA
ans-A
C
ans-C
a. 32K b. 64k
c. 256k d. 512 k
ans-B
ES
SS
29. The mnemonics used in writing a program is called:
a. Assembly language.
b. Fetch cycle
LA
ans-A
c. Microinstruction
d. Object program
C
c. Bidirectional.
d. Mixed direction (some lines into microprocessor and some
other out of microprocessor).
R
ans-C
SI
32. A Stack is a:
a. 8 bit register in the microprocessor.
b. 16 bit register in the microprocessor.
c. set of memory location in the read write memory reserved
for storing information temporary during the execution of a
program.
d. A 16 bit memory address stored in the program counter.
ES
ans-C
SS
33. The number of output pins of 8085 microprocessor are:
LA
a. 40 b. 27 ans-B
c. 21 d. 19
because:
E
ans-B
SI
ans-C
ES
SS
37. Output of assembler in machine codes is referred to as:
LA
a. Object program
b. Source program
c. Macro instruction
d. Symbolic addressing ans-A
C
a. TRAP b. INTR
JE
ans-B
R
SI
ans-B
40. An interrupt in which the external device supplies its
address as well as the interrupt request is known as:
a. Vectored interrupt
b. Maskable interrupt
c.Polled interrupt
d.Non maskable interrupt
ES
ans-A
SS
41.Every microProcessor must necessary have:
LA
a. Data bus
b. Data bus and address bus
c. Control bus
C
ans-B
43
ans-B
44
ans-B
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lecture-20
lecture-21
lecture-22
lecture-24
lecture-23
lecture-24
lecture-25
lecture-26
lecture-27
lecture-28
set-1
1.
2.
3.
ans c
4
.
ans c
5.
6.
same as 3.
same as 4.
7.
ans a
8.
ans a
9.
ans d
10.
ans b
11.
ans c
12.
ans a
MICROPROCESSOR QUESTIONS
SIRJEE CLASSES
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SIRJEE CLASSES
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SIRJEE CLASSES
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SIRJEE CLASSES
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SIRJEE CLASSES
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SIRJEE CLASSES
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SIRJEE CLASSES
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Microcontroller
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