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Microprocessor & Microcontroller

The document contains a series of questions and answers related to the internal architecture of the 8085 microprocessor. It covers various aspects such as registers, instruction execution, interrupts, and memory addressing. The content is structured as a quiz format, providing correct answers for each question.

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santleshkkumar99
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0% found this document useful (0 votes)
2 views

Microprocessor & Microcontroller

The document contains a series of questions and answers related to the internal architecture of the 8085 microprocessor. It covers various aspects such as registers, instruction execution, interrupts, and memory addressing. The content is structured as a quiz format, providing correct answers for each question.

Uploaded by

santleshkkumar99
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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MICROPROCESSOR

INTERNAL ARCHITECTURE
8085
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1.The register which keeps track of the sequence of instruction
execution:

a)Memory address register


b)Memory buffer register
c)Stack pointer ans-D
D)Program counter

ES
2.In 8085 microprocessor the value of the most significant bit
of the result following the execution of any automatic or
Boolean instruction is stored in the:

SS
a. Carry status flag
b. Auxiliary carry status flag
c. Sign status flag
LA
d. Zero status flag
ans-C
C
E

3.In a microprocessor, the register which holds the address of


the next instruction to be fetched is:
JE

a. Accumulator
b. Program counter
R

c. Stack pointer
d. Instruction register
SI

ans-B

4.Consider the following statement regarding the RESET


instruction of 8085 microprocessor:
a. PC Content become 0000H
b. All interrupts are enabled
c. RESET OUT pin is at logic 0
Which of the following statement is correct?
a. 1 only b. 2 only
c. 1 & 2 only d. 2 & 3 only
ans-A

ES
5.The address bus of Intel 8085 is 16 bits and hence the
memory which can be accessed by this address bus is:

SS
a. 1 K byte b. 16 k byte ans-D
c. 32 k byte d. 64 k byte
LA
6.Which one of the following interrupt is both level and edge
sensitive?

a. RST 7.5 b. RST 5.5


C

c. TRAP d. INTR
ans-C
E
JE

7. Consider the following 8085 interrupt:


TRAP, INTR, RST 6, RST 7.5
R

RST 0
The software interrupts are:
SI

a. 1 & 3 only b. 2 & 5 only ans-C


c. 3 & 5 only d. 1, 2 ,3,4 & 5

8.In 8085 microprocessor after the execution of RST 5


instruction, the program control shift to:

a. 0030H b. 0005H
c. 0028H d. 0024H ans-C
9. In a microprocessor, wait states are used to:

a. Make the processor wait during a DMAoperation.


b. Make the processor wait during an interrupt processing.
c. Make the processor wait during a power shutdown.

ES
d. Interface slow peripherals to the processor.
ans-A
10. In a microprocessor, when a CPU is interrupted, it:

SS
a. Stop the execution of instruction.
b. Acknowledges interrupt and branches of subroutine.
c. Acknowledges interrupt and continues.
LA
d. Acknowledges interrupt and waits for the next instruction
from the interrupting device.

ans-D
C
E
JE

11. An I/O processor controls the flow of information between:

a. Cache memory and I/O devices.


R

b. Main memory and I/O devices


c. Two I/O devices. ans-B
SI

d. Cache and main memory.

12. The number of hardware interrupts


(which require an external signal to interrupt) present in an
8085 microprocessor is:

a. 1 b. 4 ans-C
c.5 d. 13
13. In the 8085 microprocessor the RST 6 instruction transfers
the program execution to the following location.

ES
a. 30H b. 24H
c. 48H d. 60H
ans-A

SS
14. In microprocessor system the stack is used for:
LA
a. Storing the program return address whenever a subroutine
jump instruction is executed.
b. Transmitting and receiving input output data.
c. Storing call important CPU register contents whenever an
C

interrupt is to be serviced.
d. Storing program instruction for interrupt service routines.
E

ans-D
JE
R
SI

15. In a microrocessor, the register which holds the address of


the next instruction to be fetched is.

a. Accumulator b. program counter


c. Stack pointer d. instruction register
ans-B
16. An assembler for a microprocessor is used for:
a. Assembly of processes in a production line.
b. Creation of a new program using different moduls.
c. Translation of a program from assembly language to machine
language.
d. Translation of a higher level language into English text.
ans-C

ES
SS
17. Instruction used to set the carry flag in a computer can be
classified as:
LA
a. Data transfer b. arithmetic
c. Logical d. program control ans-C
C

18. Cache memory is logically positioned:


E

a. Between CPU and main memory


b. Between main memory and secondary memory.
JE

c. Inside the CPU


d. Inside the I/O processor
ans-C
R
SI

19. The stack pointer in the 8085 microprocessor is a:

a. 16 bit register that point to the stack memory location.


b. 16 bit accumulator.
c. Memory location in the stack.
d. Flag register used for the stack.
ans-A
20. Microprocessor 8085 is the enhanced version of:

a. 6800 b. 68000
ans-C

ES
c. 8080 d. 8000

21. Which of the following is true about interrupt TRAP:

SS
a. It is level triggered.
b. It is negative edge triggered
c. It is positive edge triggered
LA
d. It is both positive edge triggered and level triggered.
ans-D
C
E

22. In generic microprocessor instruction cycle time is:


JE

a. Shorter than machine cycle time.


b. Larger than machine cycle time. ans-D
c. Exactly double the machine cycle time.
R

d. Exactly the same as the machine cycle time.


SI

23. Highest priority of the interrupt in 8085 microprocessor is:

a. RST 7.5 b. RST 6.5


c. INTR d. TRAP

ans-D
24. In 8085 Microprocessor system the direct addressing
instruction is:

a. MOV A, C b. MOV B, 0AH


c. MOV C, M d. STA addr ans-D

ES
25. Fetching, decoding and executing of an instruction involving
one or more clock pulse is called:

a. Instruction cycle.

SS
b. Machine cycle.
c. Process cycle.
d. None of the above.
LA
ans-A
C

26. The capacity of a memory unit is Defined by the number of


words multiplied by the number of bits/ word. how many
E

separate address and data lines are needed for a memory of 4K


×16:
JE

a. 10 address, 16 data lines


b. 11 address, 8 data lines
R

c. 12 address, 16 data lines


d. 12 address, 12 data lines
SI

ans-C

27. To put the 8085 microprocessor in the wait state:

a. Lower the HOLD input.


b. Lower the READY input.
c. Raise the HOLD.
ans-B
d. Raise the READY input.

28. What is the memory word addressing capability of 8085:

a. 32K b. 64k
c. 256k d. 512 k
ans-B

ES
SS
29. The mnemonics used in writing a program is called:

a. Assembly language.
b. Fetch cycle
LA
ans-A
c. Microinstruction
d. Object program
C

30. What is the direction of the data bus?


E

a. Unidirectional into the microprocessor.


b. Unidirectional out of microprocessor.
JE

c. Bidirectional.
d. Mixed direction (some lines into microprocessor and some
other out of microprocessor).
R

ans-C
SI

31. Which of the following interrupts has lowest priority:

a. RST 5.5 b. RST 7.5


c. TRAP d. INTR ans-D

32. A Stack is a:
a. 8 bit register in the microprocessor.
b. 16 bit register in the microprocessor.
c. set of memory location in the read write memory reserved
for storing information temporary during the execution of a
program.
d. A 16 bit memory address stored in the program counter.

ES
ans-C

SS
33. The number of output pins of 8085 microprocessor are:
LA
a. 40 b. 27 ans-B
c. 21 d. 19

34. The program counter in a Microprocessor is a 16 bit register


C

because:
E

a. It count 16 bits at time.


b. There are 16 address lines.
JE

c. It facilitates the user storing 16 bit data temporary.


d. It has to fetch two 8 bit data at a time.
R

ans-B
SI

35. A Microprocessor is ALU:

a. And control unit on a single chip.


b. And memory on a single chip.
c. Register unit and input output device on a single chip.
d. Register Unit and control unit on a single chip.
ans-D
36. In 8085 microprocessor ALE signal is made high to:

a. Enable the data bus to be used as low order address bus.


b. To latch data Do-D7 from data bus.
c. To disable the data bus.
d. To achieve all the functions listed above.

ans-C

ES
SS
37. Output of assembler in machine codes is referred to as:
LA
a. Object program
b. Source program
c. Macro instruction
d. Symbolic addressing ans-A
C

38. Which one of the following is not a vectored interrupt:


E

a. TRAP b. INTR
JE

c. RST 3 d. RST 7.5

ans-B
R
SI

39. Which one of the following is a software interrupt of 8085


microprocessor:

a. RST 7.5 b. RST 7


c. TRAP d. INTR

ans-B
40. An interrupt in which the external device supplies its
address as well as the interrupt request is known as:

a. Vectored interrupt
b. Maskable interrupt
c.Polled interrupt
d.Non maskable interrupt

ES
ans-A

SS
41.Every microProcessor must necessary have:
LA
a. Data bus
b. Data bus and address bus
c. Control bus
C

d. Address bus, data bus and control bus.


ans-D
E
JE
R
SI
42

ans-B

43

ans-B
44

ans-B
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lecture-20
lecture-21
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set-1

1.

2.
3.

ans c

4
.
ans c

5.
6.

same as 3.

same as 4.
7.

ans a

8.

ans a

9.

ans d
10.

ans b

11.

ans c

12.

ans a
MICROPROCESSOR QUESTIONS
SIRJEE CLASSES

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SIRJEE CLASSES

24.
Microcontroller

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