Central Processing Unit:

INTRODUCTION
 GENERAL REGISTER ORGANIZATION
• memory locations are needed for storing pointers,
counters, return addresses, temporary results, and partial
products.
• Having to refer to memory locations for such applications is
time consuming because memory access is the most
time-consuming operation.
• It is more Control Register set Arithmetic Logic unit (ALU)
Major components of CPU.
• convenient and more efficient to store these intermediate
values in processor registers.
• When a large number of registers are included in the CPU, it
is most efficient to connect them through a common bus
system
• A bus organization for seven CPU registers is shown in Fig.
• The output of each register is connected to two
multiplexers (MUX) to form the two buses A and B.
• The selection lines in each multiplexer select one register or
the input data for the particular bus.
• The A and B buses form the inputs to a common arithmetic
logic unit (ALU).
• The operation selected in the ALU determines the
arithmetic or logic micro-operation that is to be performed.
• The result of the micro-operation is available for output
data and also goes into the inputs of all the registers.
• The register that receives the information from the output
bus is selected by a decoder.
• The decoder activates one of the register load inputs, thus
providing a transfer path between the data in the output
bus and the inputs of the selected destination register.
• For example, to perform the operation.
• R1 ← R2 + R3
• the control must provide binary selection
variables to the following selector inputs:
• 1. MUX A selector (SELA): to place the content of
R2 into bus A.
• 2. MUX B selector (SELB): to place the content of
R3 into bus B.
• 3. ALU operation selector (OPR): to provide the
arithmetic addition A + B.
• 4. Decoder destination selector (SELD): to
transfer the content of the output bus into R1.
CONTROL WORD
There are 14 binary selection inputs in the unit, and their combined value
specifies a control word.
It consists of four fields.
Three fields contain three bits each, and one field has five
bits.
The three bits of SELA select a source register for the A
input of the ALU.
The three bits of SELB select a register for the B input of
the ALU.
The three bits of SELD select a destination register using
the decoder and its seven load output.
The five bits of OPR select one of the operations in the ALU
EXAMPLE OF MICRO OPERATIONS
• R1 ← R2 − R3
• Field : SELA SELB SELD OPR
• Symbol : R2 R3 R1 SUB
• Control word: 010 011 001 00101
 STACK ORGANIZATION
• A useful feature that is included in the CPU of
most computers is a stack or last-in, first-out
(LIFO) list.
• A stack is a storage device that stores information
in such a manner that the item stored last is the
first item retrieved.
• The operation of a stack can be compared to a
stack of trays.
• The last tray placed on top of the stack is the first
to be taken off.
• The stack in digital computers is essentially a
memory unit with an address register
• The register that holds the address for the stack is
called a stack pointer (SP) because its value
always points at the top item in the stack
• The two operations of a stack are the insertion
and deletion of items.
• The operation of insertion is called push (or
push-down).
• The operation of deletion is called pop (or
pop-up).
• These operation are simulated by incrementing or
decrementing the stack pointer register.
REGISTER STACK
REGISTER STACK
• A stack can be placed in portion of a large memory or it can
be organized as a collection of a finite number of memory
words or registers.
• Figure shows the organization of a 64-word register stack.
• The stack pointer register SP contains a binary number
whose value is equal to the address of the word that is
currently on top of the stack.
• Three items are placed in the stack: A, B, and C, in that
order.
• Item C is on top of the stack so that the content of SP is now
3.
• To remove the top item, the stack is popped by reading the
memory word at address 3 and decrementing the content
of SP
• Item B is now on top the stack since SP holds address 2.
• To insert a new item, the stack is pushed by incrementing SP and
writing a word in the next-higher location in the stack
• In a 64-word stack, the stack pointer contains 6 bits because 26 =
64.
• Since SP has only six bits, it cannot exceed a number greater than
63 (111111 in binary).
• When 63 is incremented by 1, the result is 0 since 111111 + 1 =
1000000 in binary, but SP can accommodate only the six least
significant bits.
• Similarly, when 000000 is decremented by 1, the result is 111111.
• The one bits register FULL is set to 1 when the stack is full, and the
one-bit register EMTY is set to 1 when the stack is empty of items.
• DR is the data register that holds the binary data to be written into
or read out of the stack. .
• push operation: Initially, SP is cleared to 0,
EMTY is set to 1, and FULL is cleared to 0, so
that SP points to the word at address 0 and
the stack is marked empty and not full.
• If the stack is not full (if FULL = 0), a new item
is inserted with a push operation.
• The push operation is implemented with the
following sequence of microoperations:
• The stack pointer is incremented so that it
points to the address of the next-higher word.
• A memory write operation inserts the word
form DR into the top of the stack.
• Note that SP holds the address of the top of
the stack and that M[SP] denotes the memory
word specified by the address presently
available in SP.
• The pop operation: A new item is deleted
from the stack if the stack is not empty (if
EMTY = 0). The pop operation consists of the
following sequence of microoperations:

The top item is read from the stack into DR. the stack
pointer is then decremented. If its value reaches zero, the
stack is empty, so EMTY is set to 1
• A stack can exist as a stand-alone unit or can be
implemented in a random-access memory
• portion of computer memory partitioned into
three segments: program, data, and stack.
• The program counter PC points at the address of
the next instruction in the program.
• The address register AR points at an array of data.
• The stack pointer SP points at the top of the stack
• PC is used during the fetch phase to read an
instruction. AR is used during the execute phase
to read an operand. SP is used to push or pop
items into or & from the stack.
• We assume that the items in the stack
communicate with a data register DR . A new
item is inserted with the push operation as
follows:
SP <- SP - 1
M[SP] <- DR
• A new item is deleted with a pop operation as
follows:
• DR <-M[SP]
• SP <- SP + 1
 Reverse Polish Notation
• A stack organization is very effective for
evaluating arithmetic expressions
• The common arithmetic expressions are written in
infix notation
• Eg A*B + C *D
• The Polish mathematician Lukasiewicz showed
that arithmetic expressions can be represented in
– prefix notation -(Polish notation), places the operator
before the operands.
– The postfix notation, ( reverse Polish notation (RPN)),
places the operator after the operands.
• The following examples demonstrate the
three representations
– A+ B Infix notation
– + AB Prefix or Polish notation
– AB + Postfix or reverse Polish notation
The reverse Polish notation is in a form suitable for
stack manipulation.
The expression A*B + C *D is written in reverse
Polish notation as AB * CD* +
Evaluation of Arithmetic Expressions
• The following numerical example may clarify
this procedure.
• Consider the arithmetic expression
• (3 * 4) + (5 * 6)
• In reverse Polish notation, it is expressed as
34*56*+
 Data Transfer and Manipulation
• Most computer instructions can be classified
into three categories:
– Data transfer instructions-transfer of data from
one location to another
– Data manipulation instructions -perform
arithmetic, logic, and shift operations.
– Program control instructions -provide
decision-making capabilities and change the path
of the program when executed in the computer.
 Data Transfer Instructions
• The most common transfers are between
– memory and processor registers
– between processor registers and input or output
– between the processor registers themselves.

list of eight data transfer instructions

• load - data transfer from memory to a processor
register, usually an accumulator.
• store - data transfer from a processor register into
memory.
• Move - data transfer from one register to
another. Or between CPU registers and memory
or between two memory words.
• exchange - swaps information between two
registers or a register and a memory word.
• input and output instructions transfer data
among processor registers and input or output
terminals.
• push and pop instructions transfer data between
processor registers and a memory stack.
 Data Manipulation Instructions
• Data manipulation instructions perform
operations on data and provide the
computational capabilities for the computer.
• The data manipulation instructions are divided
into three basic types:
– Arithmetic instructions
– Logical and bit manipulation instructions
– Shift instructions
Arithmetic Instructions
• The four basic arithmetic operations are
addition, subtraction, multiplication, and
division
• The increment instruction adds 1 to the value
stored in a register or memory word. One
common characteristic of the increment
operations when executed in processor
registers is that a binary number of all 1' s
when incremented produces a result of all 0' s.
• The decrement instruction subtracts 1 from a
value stored in a register or memory word. A
number with all 0's, when decremented,
produces a number with all 1's.
• The add, subtract, multiply, and divide
instructions may be available for different
types of data
• The instruction "add with carry" performs the
addition on two operands plus the value of
the carry from the previous computation.
• the "subtract with borrow" instruction
subtracts two words and a borrow which may
have resulted from a previous subtract
operation.
• The negate instruction forms the 2' s
complement of a number, effectively
reversing the sign of an integer when
represented in the signed-2's complement
form.
Logical and Bit Manipulation Instructions
• Logical instructions perform binary operations
on strings of bits stored in registers
• The logical instructions consider each bit of
the operand separately and treat it as a
Boolean variable
• The clear instruction causes the specified operand
to be replaced by 0's.
• The complement instruction produces the 1's
complement by inverting all the bits of the
operand.
• The AND, OR, and XOR instructions produce the
corresponding logical operations on individual bits
of the operands.
• Individual bits such as a carry can be cleared, set,
or complemented with appropriate instructions.
• Another example is a flip-flop that controls the
interrupt facility and is either enabled or disabled
by means of bit manipulation instructions.
Shift Instructions
• Shifts are operations in which the bits of a
word are moved to the left or right

• The logical shift inserts 0 to the end bit position.

The end position is the leftmost bit for shift right
and the rightmost bit position for the shift left.
• Arithmetic shifts The arithmetic shift-right
instruction must preserve the sign bit in the
leftmost position. The sign bit is shifted to the
right together with the rest of the number,
but the sign bit itself remains unchanged.
• The arithmetic shift-left instruction inserts 0
to the end position and is identical to the
logical shift-left instruction. For this reason
many computers do not provide a distinct
arithmetic shift-left instruction when the
logical shift-left instruction is already
available.
• The rotate instructions produce a circular
shift. Bits shifted out at one end of the word
are not lost as in a logical shift but are
circulated back into the other end.
• The rotate through carry instruction treats a
carry bit as an extension of the register whose
word is being rotated.
• Thus a rotate-left through carry instruction
transfers the carry bit into the rightmost bit
position of the register, transfers the leftmost
bit position into the carry, and at the same
time, shifts the entire register to the left.
 Program Control
• program control instructions specify
conditions for altering the content of the
program counter.
• it provides control over the flow of program
execution and a capability for branching to
different program segments.
• The branch and jump instructions are used interchangeably
to mean the same thing, but sometimes they are used to
denote different addressing modes.
• It is written in assembly language as BR ADR, where ADR is a
symbolic name for an address.
• When executed, the branch instruction causes a transfer of
the value of ADR into the program counter. Since the program
counter contains the address of the instruction to be
executed, the next instruction will come from location ADR
• Branch and jump instructions may be conditional or
unconditional.
• An unconditional branch instruction causes a branch to the
specified address without any conditions.
• The conditional branch instruction specifies a condition ,If the
condition is met, the program counter is loaded with the
branch address and the next instruction is taken from this
address
• The skip instruction does not need an address field
and is therefore a zero-address instruction.
• A conditional skip instruction will skip the next
instruction if the condition is met
• The call and return instructions are used in
conjunction with subroutines.
• The compare and test instructions do not change the
program sequence directly
• The compare instruction performs a subtraction
between two operands, but the result of the operation
is not retained. However, certain status bit conditions
are set as a result of the operation.
• Similarly, the test instruction performs the logical AND
of two operands and updates certain status bits
without retaining the result or changing the operands