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MPC Question Bank

This document is a question bank for the course EE3011 on Multilevel Power Converters for the academic year 2024-2025. It includes various questions categorized by units covering topics such as multilevel topologies, cascaded H-bridge inverters, diode clamped multilevel inverters, flying capacitor multilevel inverters, and multilevel converters with reduced switch count. Each question is tagged with its corresponding Course Outcome (CO) and Bloom's Taxonomy (BT) level, indicating the expected cognitive skills required to answer them.

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0% found this document useful (0 votes)
188 views10 pages

MPC Question Bank

This document is a question bank for the course EE3011 on Multilevel Power Converters for the academic year 2024-2025. It includes various questions categorized by units covering topics such as multilevel topologies, cascaded H-bridge inverters, diode clamped multilevel inverters, flying capacitor multilevel inverters, and multilevel converters with reduced switch count. Each question is tagged with its corresponding Course Outcome (CO) and Bloom's Taxonomy (BT) level, indicating the expected cognitive skills required to answer them.

Uploaded by

22eee017
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Electrical and electronics Engineering

Academic Year 2024 – 2025


Question Bank
Course Code / Name: EE3011/Multilevel Power Converter

Year / Sem. / Sec : III/ VI / A

UNIT – I – Multilevel Topologies

PART – A

D.L
Q.No Questions CO BT
(E/M/D)
1 What is multilevel Inverter? CO1 R E
2 State basic cell in a generalized topology. CO1 R E
3 What are the features of multilevel Inverter? CO1 R E
4 Define a generalized topology for multilevel Inverters. CO1 U E
5 List the characteristics of generalized topologies. CO1 U M

6 Mention the application of multilevel Inverter. CO1 R E

7 Write the disadvantage of multilevel Inverter. CO1 U E


8 Give the classification common multilevel topologies. CO1 U E

9 How many capacitors are needed for an m-level inverter? CO1 U M


10 Make the state diagram of a four-level diode-clamped converter. CO1 AP M

11 Give the conditions needed for the structure of multilevel inverter? CO1 U E

12 Write the operation of n-level DCMC topology. CO1 R M


13 Mention the drawbacks of multilevel inverter. CO1 U E

14 Draw the circuit diagram of a five-level CCMC symmetric topology. CO1 AP E


What are the challenges and limitations of implementing symmetric
15 topologies? CO1 U M

How can symmetric topologies be used to achieve higher voltage


16 levels? CO1 U M

17 Define Diode-Clamped topology. CO1 R E


What are the applications of asymmetric multilevel inverters in power
18 systems? CO1 R E

19 Write the challenges in asymmetric multilevel inverters. CO1 U M


Write the necessity of multilevel power converters over traditional two-
20 level converters. CO1 U M
PART – B

D.L *
Q.No Questions M CO* BT*
(E/M/D)
With circuit diagram and waveform explain the operation of five level
1 16 CO1 U E
flying capacitor multilevel inverter.
Explain the symmetric topologies without a common DC link with
2 16 CO1 U E
necessary circuits and state diagrams.

3 Draw and explain basic concept of multilevel inverter. 16 CO1 AP E

With neat sketch explain the operation of diode clamped multilevel


4 16 CO1 U E
inverter.
a) Discuss the characteristics of generalized topology.
8
5 CO1 R M
b) Design a three-level generalized topology with graphic
8
r representation of converter states and voltage levels.
Explain the operation of a basic cell and parallel connection of basic cell
6 16 CO1 U M
in detail with neat diagram and states.

7 Explain hybrid asymmetric topologies with the resultant voltage levels . 16 CO1 U E

a) Describe the application of multilevel inverter for reactive power


6
compensation.
8 CO1 R M
b) What is multilevel inverter? List the different types of multilevel
10
inverter and its operation.
What is asymmetric multilevel inverter? Explain the operation of
9 16 CO1 U E
cascade asymmetric multilevel converter.

10 Compare symmetric and asymmetric multilevel inverter topologies. 16 CO1 U M


UNIT – II – Cascaded H-Bridge Multilevel Inverter

PART – A

D.L
Q.No Questions CO BT
(E/M/D)
1 What is cascaded H-bridge inverter? CO2 R E
List the merits and demerits of cascaded H bridge multilevel
2 CO2 U M
inverters.
3 What are features of multilevel inverter? CO2 R E

4 Write the disadvantage of cascaded multilevel inverter. CO2 R E

5 Draw the basic circuit diagram of an H-bridge inverter. CO2 AP E

6 Define unipolar pulse with modulation. CO2 U M


What are the advantages of using equal DC voltages in a CHB
7 CO2 R M
inverter?
8 List the different modulation methods for multilevel inverter. CO2 U M

9 Compare PS-PWM and LS-PWM. CO2 U E

10 What is the purpose of using the modulation index? CO2 R E


How can carrier-based PWM techniques be used to control
11 CO2 U E
multilevel inverters?
12 Define phase-shifted multicarrier modulation. CO2 U M

13 Write the principle of level-shifted multicarrier modulation. CO2 R E


How can the switching angles calculated for harmonic elimination
14 CO2 U M
in the seven-level CHB inverter?
15 Write the application of cascaded multilevel inverter. CO2 R E
How can the maximum fundamental frequency found in seven-level
16 inverter. CO2 U M

What are the advantages of staircase modulation compared to


17 CO2 R M
carrier-based PWM schemes?
18 What is the principle of staircase modulation? CO2 R E
19
Give the switching state of two level CHB inverter. CO2 R M
How staircase modulation works in a cascaded H-bridge multilevel
20 CO2 U M
inverter.
PART – B

D.L *
Q.No Questions M CO* BT*
(E/M/D)
Explain the working principal of operation of H-bridge inverter with
1 16 CO2 U E
neat schematic diagram and waveform of harmonic spectrum .
a) With the voltage level switching states, explain five-level cascaded
10
H-Bridge inverter.
2 CO2 AP E
b) Draw the per-phase diagram of CHB inverters with unequal dc
6
voltage and its switching state.

3 Explain the various carrier based pulse with modulation. 16 CO2 U E

4 Give the comparison of phase shifted and level shifted PWM schemes. 16 CO2 U E

Write the third harmonic injection method? Explain the phase shifted
5 16 CO2 R M
multicarrier modulation with proper waveform and equations.
Explain the level shifted multicarrier modulation in carrier based PWM
6 16 CO2 U E
scheme.
Explain the staircase pulse with modulation fifth and seventh harmonic
7 16 CO2 U M
elimination expression and its waveform.
What are the advantage of cascaded inverter? Write the concept of
8 16 CO2 R E
2cell ,3cell CHB and its application.

9 Explain in detail bipolar pulse with modulation and its advantage. 16 CO2 U E

10 With neat waveform explain unipolar pulse with modulation. 16 CO2 AP E


UNIT – III – Diode Clamped Multilevel Inverter

PART – A

D.L
Q.No Questions CO BT
(E/M/D)
1 Define diode-clamped multilevel inverter. CO3 R E

2 What are the devices required for a m-level inverter in DCMLI? CO3 R M

3 Write the different multilevel modulators. CO3 R E


Draw the vector map for a three level diode clamped multilevel
4 converter. CO3 AP E

5 Define space vector modulation. CO3 R E


Write the equation for space vector representation of three phase
6 quantities with space distribution of 1200 . CO3 R E

7 How do you compute 𝑇1, 𝑇2, 𝑇0 and 𝑇7 in space vector modulation? CO3 U M

8 Compare between SVM and SPWM. CO3 U E


Draw the 3D and projection of the coordinate axes and the
9 reference vector over the plane X+Y+Z=0. CO3 AP E

What are the main stages involved in the space vector modulation
10 CO3 R E
algorithm using the hexagonal coordinate system?
11 Why is voltage balance control important in DCMLC? CO3 R M
Draw the implementation of level-shifted carrier PWM scheme for
12 a five level diode clamped multilevel inverter. CO3 AP E

13 List Different techniques for optimizing voltage balance in DCMLC. CO3 U E


What are the three necessary and sufficient condition to ensure
14 the balance for an n-level DCMC? CO3 R E

Define flow diagram with the allowed switching sequence


15 equation. CO3 U M

16 What factors limit the effectiveness of voltage balancing in DCMC? CO3 R E

17 What are the features of diode clamped multilevel inverter? CO3 R E


Draw the waveform for a)PF=0 b)PF<0 in current entering the
18 internal nodes of the DC bus at different phase shift between o/p CO3 AP M
current and leg voltage.

19 What is the main disadvantage of diode clamped multilevel


inverter? CO3 R E

20 What advantage of diode clamped multilevel inverter? CO3 R E


PART-B

D.L *
Q.No Questions M CO* BT*
(E/M/D)
Explain the five-level switching logic in diode clamped multilevel
1 16 CO3 U E
inverter with neat sketch and waveform.
With the transformation matrix P expression explain the hexagonal
2 16 CO3 U E
coordinate system.
Derive the expression for
3 a) nearest three vector identification and 8 CO3 U M
b) duty cycle calculation. 8
Explain the capacitor voltage calculation with neat sketch and
4 16 CO3 U E
derivation.
What is flow diagram? Derive the expression for voltage balance
5 16 CO3 R E
optimization.

6 Demonstrate the balancing theorem with neat theorem proof sketch. 16 CO3 U E

What is space vector modulation? Explain two and three-level


7 16 CO3 R E
multilevel space vector modulation with proper output voltage vector.
Explain the coupling inductor in performance results with draw the
8 16 CO3 U M
converter line voltage and converter line current waveform.
a) How is the three vectors coordinate transformation matrix P derived 12
9 from hexagonal coordinate system? CO3 U M
b) What is the application of diode clamed multilevel inverter? 4
Explain the single phase load effectiveness boundary voltage
10 16 CO3 U E
balancing in DCMC converters.
UNIT – IV – Flying Capacitor Multilevel Inverter

PART – A

D.L
Q.No Questions CO BT
(E/M/D)
1 What are the advantage of flying capacitor multilevel inverter? CO4 R E

2 Draw the carriers in phase shifted PWM. CO4 AP E

3 Write the basic structure and operation of a 3-level FCMLC. CO4 R E

4 Define natural balancing in FCMLC. CO4 R E

5 Define forced balancing in FCMLC. CO4 R M

6 State tuned balancing network. CO4 R E

7 How load conditions affect capacitor voltage distribution? CO4 U M


Write down the role of PWM techniques in maintaining capacitor CO4
8 voltage balance. R M

9 What is the disadvantage of flying capacitor multilevel inverter. CO4 R E

10 How PSPWM generate switching signals for an FCMLC? CO4 U M

11 What are the limitations of natural charge balancing with PSPWM? CO4 R M
Can Phase Shifted PWM provide natural charge balancing in an CO4
12 FCMLC? Explain. U E

Write the operation of Phase-Shifted Carrier Pulse Width CO4


13 Modulation . R E

14 State dynamic model. CO4 R E


What factors should be considered when developing a dynamic CO4
15 model for an FCMLC? R E

Draw the level shifted pulse with modulation schemes for a five- CO4
16 level DCMC with compensator. AP M

Write the operation of four-level flying capacitor multilevel inverter CO4


17 topology. R E

Give the differential equation of the initial values of voltage and CO4
18 current in the balancing network. U E

19 Draw the steady-state and transient components of 𝑉𝑖𝑁 and𝑖𝑟𝑏 CO4


AP E
Write the operation of the given image. CO4

20 R E
PART-B

D.L *
Q.No Questions M CO* BT*
(E/M/D)
16 CO4
1 Derive the expression for tuned balancing network with neat diagram. AP M

16 CO4
2 Explain the phase shifted carrier based pulse with modulation . U M

What is dynamic voltage balance in FCMC? Derive the expression for 16 CO4
3 R E
dynamic model.
Explain the flying capacitor topology and charge balance on the flying 16 CO4
4 U E
capacitors.
What is flying capacitor multilevel inverter? 16 CO4
5 How does the phase shifted carrier modulation technique contribute to R E
the voltage balance of flying capacitor in steady state?
How can the root locus method be used to predict the transient 16 CO4
6 U M
response of FCMC?
Write any one of the dynamic voltage balance model with derivation in 16 CO4
7 R E
flying capacitor MLI.
Compare Flying Capacitor with other multilevel inverter topologies such 16 CO4
8 as cascaded H-bridge and diode-clamped converters. U M

16 CO4
9 Explain the principle of operation of flying capacitor multilevel inverter. U E

With one leg of three-level circuit diagram and waveform explain an n- 16 CO4
10 U E
level FCMC naturally maintains the charge balance in flying capacitor.
UNIT – V – Multilevel Converter with Reduced Switch

PART – A

D.L
Q.No Questions CO BT
(E/M/D)
What are the advantages of reducing the switch count in multilevel
1 inverters? CO5 R E

2 Define traditional multilevel inverter. CO5 R E

3 List the common traditional multilevel inverters topologies? CO5 U E

4 Classify symmetric with H-bridge in reduced switch count MLI. CO5 U E


Give the comparison of component necessities per leg of three CO5
5 multilevel converters. U M

What is the advantage and disadvantage for fixed-time step CO5


6 control scheme for a staircase in MLI? R E

Draw a Envelop T-type of asymmetric MIL without H-bridge CO5


7 diagram. AP M

8 What are the features of cascaded multilevel inverter? CO5 R E


Draw a square T-type of asymmetric MIL without H-bridge CO5
9 diagram. AP M

10 State reverse voltage MIL topology. CO5 R E

11 What are the different reduced switch multilevel topologies? CO5 R E


How can selective harmonic elimination techniques be used in CO5
12 these topologies? U M

13 Write the necessity of reduced switch MLI. CO5 R E


What are the advantages of using asymmetric multilevel inverters CO5
14 without H-bridges? R M

15 Write the merits of modulation techniques. CO5 R E

16 State diode clamped MLI in traditional multilevel inverter. CO5 R E


Classify the fundamental switching frequency in modulation CO5
17 technique. U M

State the phase opposition disposition method in multilevel carrier CO5


18 modulation. R E

19 What is space vector control? CO5


R E
Write the phase voltage Fourier series expression in selective CO5
20 harmonic elimination technique. R M
PART-B

D.L *
Q.No Questions M CO* BT*
(E/M/D)
16 CO5
1 Explain the different types of traditional multilevel inverters. U E

a) Write the necessity of reduced multilevel inverter. 8 CO5


b) Give the classification of the different topologies of reduced 4
2 multilevel inverter. R M
c) Make the tabulation of requirement of components for traditional 4
multilevel topologies.
With neat sketch explain the different symmetric multilevel inverter with 16 CO5
3 U M
H-bridge.
16 CO5
4 With neat diagram explain the asymmetric multilevel without H-bridge. U E

16 CO5
5 Explain multilevel inverter and modulation schemes in details. U E

Give the expression and explain the selective harmonic techniques in 16 CO5
6 U M
multilevel inverter.
a) With switching states and neat diagram explain the cascaded H- 8 CO5
7 bridge multilevel DC link inverter. U E
b) Explain switched series, parallel sources multilevel inverters. 8
a) What is reference based pulse with modulation? explain different 10 CO5
methods of multiple carrier modulation.
8 R M
b) Write the periodical representation of modulation technique. 6
16 CO5
9 Explain topologies of reduced switch count multilevel inverter. U E

What is multilevel inverter? Write the advantages and disadvantages of 16 CO5


10 R E
multilevel inverter and its application.

Faculty HoD Dean-Academics Principal

*M – Marks CO – Course Outcome *BT – Blooms Taxonomy Level


*D.L – Difficulty Level (E- Easy, M-Medium, D-Difficult)

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