EE1672-EMBEDDED SYSTEMS (Integrated Lab) Department of EEE/EIE 2023-2024

Unit- II- INTRODUCTION TO EMBEDDED PROCESSORS

1. Provide an in-depth explanation of the internal architecture of the PIC 16F877A microcontroller,
including its CPU core, memory organization, and key functional blocks?

ARCHITECTURE
The PIC16FXX is a family of low-cost, high-performance, CMOS, fully-static, 8-bit
microcontrollers. All PIC microcontrollers employ an advanced RISC architecture. The
PIC16FXX microcontroller family has enhanced core features, eight-level deep stack, and
multiple internal and external interrupt sources. The two-stage instruction pipeline allows all
instructions to execute in a single cycle, except for program branches (which require two
cycles). A total of 35 instructions (reduced instruction set) are available. Also, a large register
set helps to achieve a very high performance.
The PIC 16FXX uses Harvard architecture, in which, program and data are accessed
from separate memories using separate buses. This improves bandwidth over traditional Von
Neumann architecture where program and data may be fetched from the same memory using
the same bus. Separating program and data buses further allows instructions to be sized
differently than 8-bit wide data words. Instruction opcodes are 14-bits wide making it possible
to have all single word instructions. A 14-bit wide program memory access bus fetches a 14-
bit instruction in a single cycle. A two-stage pipeline overlaps fetch and execution of
instructions. Consequently, all instructions execute in a single cycle (200 ns@ 20MHz) except
for program branches.
The PIC 16F87X devices have a 13-bit program counter capable of addressing an
8KX14 program memory space.The PIC 16FF876/877 devices have 8Kx 14 words of Flash
program memory .The RESET vector is at 0000h and the Interrupt vector is at 0004h.

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Block diagram of PIC 16F87X Microcontroller

Memory organization:
The memory module of the PICcontroller has three memory blocks.
a) Program memory
b) Data memory and
c) Stack
a) Program Memory:
The PIC 16F8XX has 4k x14 program memory space (0000H-0FFFH).It has a 13 bit
Program counter(PC) to access any address (213=4k). This PIC family uses 13-bit program
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counter allowing the controllers to an 8k-program memory without changing the CPU
structure.

Two addresses in the program memory address space are treated in a special way by
the CPU. The first address H’ 000’ being a go to mainline instruction the second special
address, H’ 004’ being a ‘go to in service’ instruction can be assigned to this address to make
the CPU to jump to the beginning of the Interrupt Service routine located elsewhere in the
memory space.

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When we deal with tables, they are assigned to addresses in the range H’005 – H’0FF’
because for most of the applications this space is sufficient. The main line program begins
after the tables.
DATA MEMORY
The data memory of PIC 16F8XX is partitioned into multiple banks which contain the general
purpose registers and the Special function Registers (SFRs).The bits RP1 and RP0 bits of the
status register are used to select these banks. Each bank extends upto 7FH (128 Bytes).The
lower bytes of the each bank are reserved for the Special Function Registers. Above the SFRs
are general purpose registers implemented as static RAM.

2. Describe the memory hierarchy within the PIC 16F877A, including the types
of memory (RAM, Flash, EEPROM) and their respective sizes, and how they are
used in program execution and data storage.
Memory of the PIC16F877 divided into 3 types of memories:
 Program Memory - A memory that contains the program (which we had written), after
we've burned it. As a reminder, Program Counter executes commands stored in the program
memory, one after the other.
 Data Memory – This is RAM memory type, which contains a special registers like SFR
(Special Faction Register) and GPR (General Purpose Register). The variables that we store in
the Data Memory during the program are deleted after we turn of the micro.
These two memories have separated data buses, which makes the access to each one of them
very easy.
 Data EEPROM (Electrically Erasable Programmable Read-Only Memory) - A
memory that allows storing the variables as a result of burning the written program.
Each one of them has a different role. Program Memory and Data Memory two memories that
are needed to build a program, and Data EEPROM is used to save data after the microcontroller
is turn off.
Program Memory and Data EEPROM they are non-volatile memories, which store the
information even after the power is turn off. These memories called Flash Or EEPROM. In
contrast, Data Memory does not save the information because it needs power in order to
maintain the information stored in the chip.
PIC16F87XA Program Memory
The PIC16F87XA devices have a 13-bit program counter capable of addressing an 8K word x
14 bit program memory space. This memory is used to store the program after we burn it to the
microcontroller. The PIC16F876A/877A devices have 8K words x 14 bits of Flash program
memory that can be electrically erased and reprogrammed. Each time we burn program into
the micro, we erase an old program and write a new one.

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PIC16F876A/877A program memory map and stack

Program Counter (PC) keeps track of the program execution by holding the address of the
current instruction. It is automatically incremented to the next instruction during the current
instruction execution.
The PIC16F87XA family has an 8-level deep x 13-bit wide hardware stack. The stack space is
not part of either program or data space and the stack pointer is not readable or writable. In the
PIC microcontrollers, this is a special block of RAM memory used only for this purpose.
The CALL instruction is used to jump to a subroutine, which must be terminated with the
RETURN instruction. CALL has the address of the first instruction in the subroutine as its
operand. When the CALL instruction is executed, the destination address is copied to the PC.
The PC is PUSHed onto the stack when a CALL instruction is executed, or an interrupt causes
a branch. The stack is POP’ed in the event of a RETURN, RETLW or a RETFIE instruction
execution.
The stack operates as a circular buffer. This means that after the stack has been PUSHed eight
times, the ninth push overwrites the value that was stored from the first push. The tenth push
overwrites the second push (and so on).
Each time the main program execution starts at address 0000 - Reset Vector. The address 0004
is “reserved” for the “interrupt service routine” (ISR).
If we plan to use an interrupt, our program will begin after the Interrupt Vector; and if not we
can start to write from the beginning of the Reset Vector.

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PIC16F87XA Data Memory Organization

The data memory is partitioned into multiple banks which contain the General Purpose
Registers and the Special Function Registers. Number of banks may vary depending on the
microcontroller; for example, micro PIC16F84 has only two banks.
Each bank extends up to 7Fh (128 bytes). The lower locations of each bank are reserved for
the Special Function Registers. Above the Special Function Registers are General Purpose
Registers, implemented as static RAM. While program is being executed, it is working with
the particular bank. The default bank is BANK0.
To access a register that is located in another bank, one should access it inside the program.
There are special registers which can be accessed from any bank, such as STATUS register.

3. How is the instruction set architecture (ISA) of the PIC 16F877A designed, and what are some
examples of instructions commonly used in programming this microcontroller?
INSTRUCTION SET
While writing the instructions the following guidelines are followed.
a) Write the instructions mnemonics in lower case (example: xorwf)
b) Write special Register names, RAM variable names and bit names in upper case (example:
STATUS, RPO….)
c) Write instruction and subroutine labels in mixed case (example: Mainline, LoopTime..)

The instruction set of PIC is divided into Three basic categories. They are
(a) Byte oriented Instructions
(b) Bit oriented Instructions
(c) Literal and Control Instructions

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Byte Oriented Instructions

In a byte oriented Instructions f represents a file register and d represents destination
register.The destination specifies where the result of operation is to be placed. If D= 0 the result
is placed in W register(Accumulator) and if d = 1 , the result is placed in the file register
specified in the instruction.
ADDWF f, d ; Add W and f
CLRF f ; Clear f
MOVWF f ,d ; Move f
NOP ; No operation
SUBWF f ,d ; Subtract W from f

Bit Oriented Instruction

In bit oriented instructions, b represents a bit field designator which selects the number of the
bit affected by the operation and f represents the number of the file in which the bit is located.

BCF f , b ; Bit clear f

BSF f, b ; Bit set f
BTFSC f,b ; Bit test f ,skip if set

Literal and Control Instrucrtions

In literal and control instructions K represents an 8 or 11 bit constant or literal value.

ADDLW k ; Add literal and W

ANDLW k ; AND literal with W
CALL k ; Call subroutine
MOVLW k ; Move literal to W
SUBLW k ; Subtract W from literal
Based on the type of operation PIC supports various Instructions. They are explained below.
CLASSIFICATION OF INSTRUCTIONS
All the instructions of the PIC microcontroller are classified into nearly 9 groups. They are
given below with examples.
(i).Arithmetic Operations :
ADDLW k ; Add literal value k to W

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ADDWF f, d ; The contents of the W register are added with the register f.
SUBWF f ,d ; the contents of W register are subtracted from register f
(ii).Logical Instructions :
ANDLW k ; The contents of W register are ANDED with the 8-bit litweral k .The result
is stored in the W register.
IORLW k ;Inclusive OR the literal value into W register
XORWF f,d ; The contents of W register are XORed with register f and the result is stored
in W or f.
COMF f, d ; Complement f .
(iii).Increment/Decrement Instructions
INCF f ,d ; Increment contents of f register by 1
DECF f , d ; Decrement f by 1
(iv).Data Transfer instructions :
MOVF f,d ; Move f to W i.e The contents of register f is moved to a destination depending
on d
MOVLW k ; Move literal k to W
MOVWF f ; Move W to f
(v) Clear Instructions
CLRF ;Clear file f
CLR W ; Clear the contents of W register and zero bit is set
CLRWDT ; Clear Watch dog timer
BCF ; Clear bit b of register f.
(vi)Rotate Instructions
RLF ; Rotate Left f through carry
RRF ; Rotate Right f through carry
(vii). Branch Instructions : There are two types of Branch instructions.(i)Conditional Branch
and (ii) Un conditional Branch instructions.
(i) Conditional Branch Instructions
BTFSC f , b ; Bit Test skip if clear
BTFSS f , b ; Bit test f , skip if set
If bit B in register f is zero ,then the next instruction is executed, otherwise next
instruction is discarded and a NOP is executed.
DECFSZ f,d ; Decrement f ,skip if zero.
INCFSZ f,d ;Increment f ,skip if zero

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(ii) Unconditional Instructions

CALL k ; Call the subroutine k unconditionally
GOTO k ; Unconditional k branch
RETURN ; Return from subroutine
REETLW k ; Return with literal in W register.
(viii Miscellaneous
BSF f,b ; Set bit b of register f
SLEEP ; Go into stand by mode
NOP ; No operation i.e Do nothing , wait one clock cycle.
The various instructions used in PIC are presented in the Table below.
Single-bit manipulation Operation
bcf PORTB, 0 ;Clear bit 0 of PORTB
bsf STATUS, C ;Set the carry bit
Clear/move
Clrw ;Clear the working register, W
clrf TEMP1 ;Clear temporary variable TEMP1
movlw 5 ;Load 5 into W
movlw 10 ;Load D ‘10’ or H ‘10’ into W
;depending upon default representation
movwf TEMP1 ;Move W into TEMP1
movwf TEMP1, F ;Incorrect syntax
movf TEMP1, W ;Move TEMP1 into W
swapf TEMP1, F ;Swap 4-bit nibbles of TEMP1
swapf TEMP1, W ;Move TEMP1 to W, swapping nibbles
;and leave TEMP1 unchanged
Increment/decrement/complement
incf TEMP1, F ;Increment TEMP1
incf TEMP1, W ;W < - TEMP1 + 1; TEMP1 unchanged
decf TEMP1, F ;Decrement TEMP1
comf TEMP1, F ;Change 0s to 1s and 1s to 0s
Multiple-bit manipulation

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andlw B’00000111’ ;Force upper 5 bits of W to zero

andwf TEMP1, F ;TEMP1 < - TEMP1 and W
andwf TEMP1, W ;W < - TEMP1 AND W
iorlw B’00000111’ ;Force lower 3 bits of W to one
iorwf TEMP1, F ;TEMP1 < - TEMP1 or W
xorlw B’00000111’ ;Complement lower 3 bits of W
xorwf TEMP1, W ;W < - TEMP1 XOR W
Addition/Subtraction
addlw 5 ;Add 5 to W
addwf TEMP1, F ;TEMP1 < - TEMP1 + W
sublw 5 ;W < - 5 – W (not W < - W – 5!)
subwf TEMP1, F ;TEMP1 < - TEMP1 – W
Rotate
rlf TEMP1, F ;Nine-bit left rotate through C
;(C < - TEMP1, 7; TEMP1, I+1 < - TEMP1, I
; TEMP1, 0 < - C)
rrf TEMP1, W ; Leave TEMP1 unchanged
;copy to W and rotate W right through C
Conditional branch
btfsc TEMP1, 0 ;Skip the next instruction if bit 0 of
;TEMP1 equals zero
btfss STATUS, C ;Skip if C = 1
decfsz TEMP1 , F ;Decrement TEMP1; skip if zero
incfsz TEMP1, W ;Leave TEMP1 unchanged; skip if
;TEMP1 = H’FF’; W< - TEMP1 + 1
Goto/call/return/return from interrupt
goto There ;Next instruction to be executed is
; labeled “There”
call Task1 ;Pushed return address; next instruction
;to be executed is labeled “Task1”
return ;Pop return address off of stack
retlw 5 ;Pop return address; W < -5
retfie ;Pop return address; reenable interrupts

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Miscellaneous
Clrwdt ;If watchdog timer is enabled, this; instruction will
reset it (before it,;resets the CPU)
sleep ;Stop clock; reduce power; wait,;for watchdog timer
or external signal;to begin program execution again
nop ;
Do nothing; wait one clock cycles

4. Explain the role of special function registers (SFRs) in the PIC 16F877A's architecture,
and provide examples of SFRs that are crucial for controlling and configuring the
microcontroller's behaviour.
Special Function Registers (SFRs) in the PIC 16F877A play a pivotal role in controlling and
configuring the microcontroller's behavior. SFRs are memory-mapped registers that provide a
means for the software to interact with and control various hardware features of the
microcontroller. These registers are crucial for managing I/O ports, configuring peripherals,
and setting up the overall operation of the microcontroller. Here are some examples of key
SFRs in the PIC 16F877A:

1. TRISx - Data Direction Registers:

 Role:
 Determines whether a specific I/O port pin is configured as an input or output.
 Examples:
 TRISA: Data Direction Register for Port A.
 TRISB: Data Direction Register for Port B.
2. PORTx - Port Registers:
 Role:
 Holds the values of output data for each corresponding I/O port.
 Allows the software to read or write data to specific pins.
 Examples:
 PORTA: Port Register for Port A.
 PORTB: Port Register for Port B.
3. LATx - Latch Registers:
 Role:
 Holds the last value written to the port, allowing read-modify-write operations.
 Provides atomic access to I/O pins.
 Examples:
 LATA: Latch Register for Port A.
 LATB: Latch Register for Port B.
4. ANSELx - Analog Select Registers:
 Role:
 Configures the analog or digital mode of each I/O pin.
 Examples:
 ANSELA: Analog Select Register for Port A.
 ANSELB: Analog Select Register for Port B.

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5. OPTION_REG - Option Register:

 Role:
 Configures various options related to the microcontroller's operation, such as the
prescaler and pull-up resistor enable.
 Example:
 OPTION_REG: Option Register.
6. INTCON - Interrupt Control Register:

 Role:
 Controls the overall behavior of interrupts.
 Enables or disables individual interrupt sources.
 Example:
 INTCON: Interrupt Control Register.
7. TMRx - Timer Registers:
TIMER 1 control Register:

T2CON:

 Role:
 Configures and holds the value of the timers used in the microcontroller.
 Allows control over timer modes, prescaler settings, and interrupt flags.
 Examples:
 TMR0: Timer 0 Register.
 TMR1: Timer 1 Register.
8. PIEx - Peripheral Interrupt Enable Registers:
 Role:
 Enables or disables specific peripheral interrupts.
 Examples:
 PIE1: Peripheral Interrupt Enable Register 1.
 PIE2: Peripheral Interrupt Enable Register 2.
9. PIRx - Peripheral Interrupt Request Registers:
 Role:
 Flags indicate whether specific peripheral interrupts are pending.
 Examples:
 PIR1: Peripheral Interrupt Request Register 1.
 PIR2: Peripheral Interrupt Request Register 2.
10. TXx and RCx - USART Transmit and Receive Registers:
 Role:
 Hold data to be transmitted or received via the USART (serial communication).
 Examples:
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 TXREG: USART Transmit Register.

 RCREG: USART Receive Register.
11. SSPx - SPI Status and Control Register:
 Role:
 Configures and controls the Serial Peripheral Interface (SPI) module.
 Example:
 SSPSTAT: SPI Status Register.
12. CCPx - Capture/Compare/PWM Registers:
 Role:
 Configures and holds values for the Capture/Compare/PWM modules.
 Examples:
 CCP1CON: CCP1 Control Register.
 CCPR1L and CCPR1H: CCP1 Period Registers.
13. EECONx - EEPROM Control Registers:
 Role:
 Controls operations related to EEPROM (Electrically Erasable Programmable Read-
Only Memory).
 Example:
 EECON1: EEPROM Control Register 1.
14. ADCONx - Analog-to-Digital Converter Control Registers:
 Role:
 Configures and controls the Analog-to-Digital Converter (ADC) module.
 Examples:
 ADCON0: ADC Control Register 0.
 ADCON1: ADC Control Register 1.
Importance of SFRs:
1. Hardware Configuration:
 SFRs allow the software to configure various hardware features, such as I/O ports,
timers, and peripherals, to suit the specific requirements of the application.
2. Interrupt Control:
 SFRs related to interrupts allow the software to control and respond to various
interrupt sources, facilitating efficient handling of asynchronous events.
3. Data Control:
 SFRs related to ports and latches enable the software to read and write data to specific
pins, controlling the flow of information to and from the microcontroller.
4. Timer and PWM Control:
 SFRs associated with timers and PWM modules allow the software to control timing-
related operations and generate pulse-width modulation signals.
5. Analog Configuration:
 SFRs related to analog functions enable the software to configure and control
analog features, such as the ADC and analog comparators.
Understanding and effectively using these SFRs is crucial for developing embedded software
for the PIC 16F877A, as they provide the means to configure and control the microcontroller's
behavior according to the specific needs of the application.

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5. What role do the bit manipulation instructions play in the PIC 16F877A's instruction
set, and in what scenarios are they particularly useful?
Bit manipulation instructions in the PIC 16F877A's instruction set play a crucial role in
efficiently manipulating individual bits within registers. These instructions provide a means to
set, clear, toggle, or test specific bits without affecting the rest of the bits in the register. The
bit manipulation instructions are particularly useful in scenarios where precise control over
individual bits is required, such as in managing I/O ports, configuring control registers, and
handling various flags and status bits. Here are the key bit manipulation instructions in the PIC
16F877A and their common use cases:
1. BSF - Bit Set File:
 Operation:
 Sets a specified bit in the destination register or memory location.
 Syntax:
assemblyCopy code
BSF register, bit
 Use Cases:
 Setting a specific flag or control bit to enable a particular feature.
 Activating an output pin to drive a connected device.
2. BCF - Bit Clear File:
 Operation:
 Clears a specified bit in the destination register or memory location.
 Syntax:
assemblyCopy code
BCF register, bit
 Use Cases:
 Turning off a particular flag or control bit to disable a feature.
 Deactivating an output pin to stop driving a connected device.
3. BTFSC - Bit Test File Skip on Clear:
 Operation:
 Tests a specified bit in the destination register or memory location. If the bit is clear,
the next instruction is skipped; otherwise, it is executed.
 Syntax:
assemblyCopy code
BTFSC register, bit
 Use Cases:
 Conditional branching based on the status of a specific flag or condition.
 Checking if an input status bit is clear before proceeding with specific operations.
4. BTFSS - Bit Test File Skip on Set:
 Operation:
 Tests a specified bit in the destination register or memory location. If the bit is set, the
next instruction is skipped; otherwise, it is executed.
 Syntax:
assemblyCopy code
BTFSS register, bit
 Use Cases:
 Conditional branching based on the status of a specific flag or condition.
 Checking if an input status bit is set before proceeding with specific operations.

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5. SWAPF - Swap Nibbles in File Register:

 Operation:
 Swaps the high and low nibbles of the destination register.
 Syntax:
assemblyCopy code
SWAPF register, d
 Use Cases:
 Reordering bits within a byte for processing or data exchange.
6. RLF - Rotate Left through Carry:
 Operation:
 Rotates the bits in the destination register or memory location to the left through the
carry flag.
 Syntax:
assemblyCopy code
RLF register, d
 Use Cases:
 Circular shifting of bits within a byte.
 Implementing circular buffers or queues.
7. RRF - Rotate Right through Carry:
 Operation:
 Rotates the bits in the destination register or memory location to the right through the
carry flag.
 Syntax:
assemblyCopy code
RRF register, d
 Use Cases:
 Circular shifting of bits within a byte.
 Implementing circular buffers or queues.
8. BIT Manipulation for I/O Ports:
 Bit manipulation instructions are frequently used for managing individual bits of I/O ports:
 Setting or clearing specific bits to control the state of connected devices.
 Testing the status of input pins for conditional branching or decision-making.
9. Configuration Register Settings:
 Bit manipulation instructions are useful for configuring control registers, setting or clearing
specific bits to enable or disable features, and controlling the behavior of the microcontroller.
10. Status Flags Handling:
 Bit manipulation is commonly employed for checking and modifying status flags, enabling the
software to respond to specific conditions or events.
Benefits of Bit Manipulation Instructions:
1. Code Efficiency:
 Bit manipulation instructions offer a concise and efficient way to perform operations
on individual bits, reducing the number of instructions needed for specific tasks.
2. Memory Conservation:
 Bit manipulation allows precise control over bits within registers, optimizing memory
usage by avoiding unnecessary read-modify-write operations.
3. Improved Performance:

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 Bit manipulation operations are often faster than more complex operations, contributing
to improved overall performance of the microcontroller.
4. I/O Control and Configuration:
 Bit manipulation is crucial for managing I/O ports, enabling the configuration of pins
for specific functionalities, and controlling external devices.
5. Status Flag Handling:
 Bit manipulation instructions facilitate efficient handling of status flags, allowing the
software to respond to various conditions and events.
In summary, bit manipulation instructions in the PIC 16F877A's instruction set provide a
powerful and efficient means to control, configure, and test individual bits within registers.
They are particularly useful in scenarios where precise bit-level control is required, such as
managing I/O ports, configuring control registers, and handling status flags.

6. Elaborate on the stack-related instructions in the PIC 16F877A and how they support
subroutine calls and nested execution.

The PIC16F87XA family has an 8-level deep x 13-bit wide hardware stack. The stack space
is not part of either program or data space and the stack pointer is not readable or writable. In
the PIC microcontrollers, this is a special block of RAM memory used only for this purpose.
The CALL instruction is used to jump to a subroutine, which must be terminated with the
RETURN instruction. CALL has the address of the first instruction in the subroutine as its
operand. When the CALL instruction is executed, the destination address is copied to the PC.
The PC is PUSHed onto the stack when a CALL instruction is executed, or an interrupt causes
a branch. The stack is POP’ed in the event of a RETURN, RETLW or a RETFIE instruction
execution.
The stack operates as a circular buffer. This means that after the stack has been PUSHed eight
times, the ninth push overwrites the value that was stored from the first push. The tenth push
overwrites the second push (and so on).
Each time the main program execution starts at address 0000 - Reset Vector. The address
0004 is “reserved” for the “interrupt service routine” (ISR).
If we plan to use an interrupt, our program will begin after the Interrupt Vector; and if not we
can start to write from the beginning of the Reset Vector.

7. How does the PIC 16F877A's instruction set handle input and output operations, such
as reading from sensors or sending data to external devices?
Reading from sensors and sending data to external devices on the PIC 16F877A involves a
combination of general-purpose I/O operations, special function registers (SFRs), and
possibly the use of specific peripherals such as analog-to-digital converters (ADCs) and
communication modules. Here's a general overview of how these operations are handled:

 Reading from Sensors:

 Analog-to-Digital Conversion (ADC): The PIC 16F877A has an integrated ADC that can
convert analog signals from sensors into digital values.
 Configure the ADC using the ADCON0 and ADCON1 registers.
 Start the conversion using the GO/DONE bit in ADCON0.
 Retrieve the digital result from the ADRESH and ADRESL registers.
 Example code snippet for reading from an analog sensor:
; Configure ADC
BSF STATUS, RP0 ; Bank 1

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MOVLW B'00000000' ; Configure AN0 as analog input

MOVWF ADCON1
BCF STATUS, RP0 ; Bank 0

; Start ADC conversion

BSF ADCON0, GO/DONE

; Wait for conversion to complete

BTFSC ADCON0, GO/DONE
GOTO $-1

; Retrieve result
MOVF ADRESH, W
MOVWF Result_HighByte
MOVF ADRESL, W
MOVWF Result_LowByte
 Sending Data to External Devices:
 General-Purpose I/O (GPIO): Use GPIO pins to send digital signals to external devices.
 Configure the appropriate pins as outputs using the TRISx registers.
 Set or clear the pins using instructions like BSF (Bit Set File) or BCF (Bit Clear File).
 Serial Communication (USART): If you need to send data serially to external devices,
you can use the USART module.
 Configure the USART module by setting the TXEN (Transmitter Enable) bit in TXSTA
and SPEN (Serial Port Enable) bit in RCSTAx.
 Load the data into the TXREG register to initiate transmission.
 Example code snippet for sending data using USART:
; Configure USART
BSF STATUS, RP0 ; Bank 1
MOVLW B'00100000' ; Set TXEN and SPEN
MOVWF TXSTA
BCF STATUS, RP0 ; Bank 0

; Send data
MOVF DataToSend, W ; Load data into W register
MOVWF TXREG ; Move data to TXREG to initiate transmission
These examples are in assembly language, but similar operations can be performed in
higher-level languages like C. Keep in mind that the specific details may vary based on
the exact requirements of your project, the sensors or devices you are interfacing with,
and the peripherals available on the PIC 16F877A.

8. What considerations should programmers keep in mind when selecting specific

addressing modes for their applications, and how do these choices impact code
efficiency and memory usage?
When programming for a microcontroller like the PIC 16F877A, selecting appropriate
addressing modes is crucial for optimizing code efficiency and memory usage. Addressing
modes define how operands are specified in instructions, influencing how data is accessed and
manipulated. Here are considerations programmers should keep in mind when selecting
specific addressing modes and how these choices impact code efficiency and memory usage:

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1. Register vs. Memory Addressing:

Consideration:
 Use register addressing modes when working with data stored in registers for faster access.
 Use memory addressing modes when dealing with variables stored in RAM or constants stored
in program memory (Flash).
Impact:
 Register addressing is faster but limited in quantity.
 Memory addressing provides more storage space but may have slightly longer access times.
2. Immediate vs. Direct vs. Indirect Addressing:
Consideration:
 Immediate addressing is suitable for constants or small values.
 Direct addressing is used for accessing variables at fixed memory locations.
 Indirect addressing is beneficial when the address is stored in a register or memory location.
Impact:
 Immediate addressing is space-efficient but may limit the range of values.
 Direct addressing is straightforward but may lead to hard-coded addresses.
 Indirect addressing provides flexibility but introduces additional instruction overhead.
3. Indexed Addressing:
Consideration:
 Use indexed addressing for efficient array or table access.
 Consider the range and size of the index.
Impact:
 Improves code readability and maintainability.
 Enhances data structure handling but may require extra instructions for index manipulation.
4. Auto-Increment and Auto-Decrement:
Consideration:
 Auto-increment is useful for iterating through arrays or data structures.
 Auto-decrement can be beneficial for stack operations.
Impact:
 Simplifies code for certain operations but requires careful management to avoid unintended
side effects.
 May improve code efficiency by reducing the number of instructions.
5. Bit Addressing:
Consideration:
 For bit manipulation, consider using bit-specific instructions.
 Bit addressing allows working directly with individual bits within registers.
Impact:
 Provides fine-grained control over bits.
 Reduces the need for separate bit manipulation instructions, enhancing code efficiency.
6. Code Readability and Maintainability:
Consideration:
 Choose addressing modes that improve code readability and maintainability.
 Consider the ease of understanding for other developers who might work on the code.
Impact:
 Clear and readable code is easier to debug, maintain, and enhance.
 Improves collaboration among team members.

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7. Resource Constraints:
Consideration:
 Be mindful of resource constraints such as the number of available registers and memory space.
 Choose addressing modes that make efficient use of available resources.
Impact:
 Optimizes resource usage, reducing the likelihood of running out of available resources.
8. Instruction Set Utilization:
Consideration:
 Understand the capabilities of the instruction set and leverage specific addressing modes
supported by the microcontroller.
Impact:
 Efficient use of available addressing modes can result in shorter and faster code.
9. Performance Requirements:
Consideration:
 Evaluate the performance requirements of the application.
 Consider trade-offs between code size and execution speed.
Impact:
 Optimize for the specific needs of the application, balancing speed and memory usage.
10. Compiler Optimizations:
Consideration:
 Be aware of how different addressing modes may be optimized by the compiler.
 Review the generated assembly code to ensure it aligns with your optimization goals.
Impact:
 Compiler optimizations can significantly impact code efficiency and may influence addressing
mode choices.
Selecting the appropriate addressing modes involves a trade-off between code efficiency,
memory usage, and code readability. Programmers should carefully consider the specific
requirements of their applications, resource constraints, and performance goals. A well-
thought-out choice of addressing modes can lead to more efficient, readable, and maintainable
code on microcontrollers like the PIC 16F877A. It's essential to strike a balance that aligns
with the needs of the application and the capabilities of the target hardware.

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9. Elaborate a comprehensive overview of the ARM Cortex processor architecture,

including its key components, such as the CPU core, memory hierarchy, and functional
blocks?

The ARM is having different variants available in the commercial market, but the ARM
Cortex family which developed by the ARMv7 architecture. This is again divided into 3
subfamilies as:
 ARM-Cortex Ax-series.
 ARM-Cortex Rx-series.
 ARM-Cortex Mx-series.
ARM Cortex-M3 MCU Architecture
The Cortex-M3 processor is a high performance low-cost 32-bit processor. The ARM is a
“Harvard Architecture” based processor that offer’s the separate Data and instruction line for

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communicating with RAM, ROM, etc. This is having consists 3-stage pipeline to fetch, decode,
and execute the instructions sequentially. The Cortex series processors are the cost-sensitive
device which is used to reduce the processor area and has extensive NVIC interrupt handling,
and system debugs capability.

ARM – M3 CORTEX architecture

The Cortex-M3 ARM processors are implemented by the THUMB instruction sets based
on THUMB-2 technology. Therefore, it ensures high code density and reduces the program
memory requirement. The Cortex-M3 instruction set provides excellent performance due to
modern 32-bit architecture. The ARM processor core-m3 is closely integrated to Nested
Vector Interrupt Controller (NVIC) to provide a good interrupt performance.

If I will continue the history and all I think it will be difficult to complete and I don’t want to
make it difficult. So instead of discussing these concepts better Let’s go take ARM family
microcontroller and will discuss it and we will do the coding and projects. Since nowadays we
are mostly acquainted with the 32-bit microcontroller, hence let’s take a 32-bit microcontroller
as an LPC-2148 microcontroller.

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ARM7 REGISTERS:
The ARM-7 is a load and store architecture, where if you want to perform any data processing
instructions, then first the data has to move from a memory store into a set of central registers,
the data processing instruction has to be executed and then the data again stored back into the
memory.

The central set of registers are a bank of 16 registers from R0 – R15. Each of these registers is
having 32-bit wide whereas R0 – R12 are user registers and R13 – R15 having some special
functions. Where the R13 is called a Stack Pointer (SP), R14 is called Linked Register (LR),
and the R15 is the Program Counter (PC).

STACK POINTER (SP-R13):The stack pointer is a register called Stack inside the processor
which stores the address of the next instruction in the which is going to be executed.
STACK: A stack is a special temporary buffer which stores the data from top-down.
LINKED REGISTER (LR-R14):The R14 is the linked register which stores the return
information for subroutines, function calls, and exceptions. On reset, the processor sets the LR
value to 0xFFFFFFFF.

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PROGRAM COUNTER (PC-R15):The program counter is the R15 register in ARM-7

which contains the current address of the instruction which is executing. On reset, the processor
loads the PC with the value of the reset vector, which is at address0x00000004. Bit[0] of the
value is loaded into the EPSR T-bit at reset and must be 1.

10. How does the memory hierarchy in ARM Cortex processors, which includes caches, RAM,
and flash memory, impact the performance and efficiency of these processors?

A typical computer memory hierarchy comprises several levels, each level having a
characteristic size and speed. • The processor registers can be viewed as the top of the memory
hierarchy. A RISC processor will typically have around thirty-two 32-bit registers making a
total of 128 bytes, with an access time of a few nanoseconds. • On-chip cache memory will
have a capacity of eight to 32 Kbytes with an access time around ten nanoseconds. • High-
performance desktop systems may have a second-level off-chip cache with a capacity of a few
hundred Kbytes and an access time of a few tens of nanoseconds. • Main memory will be
megabytes to tens of megabytes of dynamic RAM with an access time around 100
nanoseconds. • Backup store, usually on a hard disk, will be hundreds of Mbytes up to a few
Gbytes with an access time of a few tens of milliseconds. Note that the performance difference
between the main memory and the backup store is very much greater than the difference
between any other adjacent levels, even when there is no secondary cache in the system. The
data which is held in the registers is under the direct control of the compiler or assembler
programmer, but the contents of the remaining levels of the hierarchy are usually managed
automatically. The caches are effectively invisible to the application program, with blocks or
'pages' of instructions and data migrating up and down the hierarchy under hardware control.
Paging between the main memory and the backup store is controlled by the operating system,
and remains transparent to the application program. Since the performance difference between
the main memory and the backup store is so great, much more sophisticated algorithms are
required here to determine when to migrate data between the levels.
ON-CHIP RAM:
In many embedded systems simple on-chip RAM is preferred to cache for a number benefits
of reasons: • It is simpler, cheaper, and uses less power. We will see in the following sections
that cache memory carries a significant overhead in terms of the logic that is required to enable
it to operate effectively. It also incurs a significant design cost if a suitable off-the-shelf cache
is unavailable. • It has more deterministic behaviour. Cache memories have complex
behaviours which can make difficult to predict how well they will operate under particular
circumstances. In particular, it can be hard to guarantee interrupt response time. The drawback
with on-chip RAM vis-d-vis cache is that it requires explicit management by the programmer,
whereas a cache is usually transparent to the programmer. Where the program mix is well-
defined and under the control of the programmer, on-chip RAM can effectively be used as a
software-controlled cache. Where the application mix cannot be predicted this control task
becomes very difficult. Hence a cache is usually preferred in any general-purpose system where
the application mix is unknown. One important advantage of on-chip RAM is that it enables
the programmer to allocate space in it using knowledge of the future processing load. A cache
left to its own devices has knowledge only of past program behaviour, and it can therefore

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never prepare in advance for critical future tasks. Again, this is a difference which is most
likely to be significant when critical tasks must meet strict real time constraints.

RAM (Random Access Memory):

 Impact on Performance:
 RAM serves as the main working memory for the processor, storing data and code during
program execution.
 Fast access times to RAM are crucial for quick data retrieval and efficient execution.
 Efficient use of RAM can reduce the frequency and impact of accessing slower flash memory
or other non-volatile storage.
 Impact on Efficiency:
 Optimizing the use of RAM is critical for energy efficiency.
 Minimizing unnecessary read and write operations to RAM conserves power.
 Efficient data placement and access patterns in RAM can reduce overall system power
consumption.
CACHES:
Caches can be built in many ways. At the highest level a processor can have one of the
following two organizations: • A unified cache. This is a single cache for both instructions and
data, as illustrated in Figure 10.1 on page 273. • Separate instruction and data caches. This
organization is sometimes called a modified Harvard architecture as shown in Figure 10.2 on
page 274. Both these organizations have their merits. The unified cache automatically adjusts
the proportion of the cache memory used by instructions according to the current program
requirements, giving a better performance than a fixed partitioning. On the other hand the
separate caches allow load and store instructions to execute in a single clock cycle.

UNIFIED AND INSTRUCTION CACHE

Since the processor can operate at its high clock rate only when the memory items it requires
are held in the cache, the overall system performance depends strongly on the proportion of
memory accesses which cannot be satisfied by the cache. An access to an item which is in the
cache is called a hit, and an access to an item which is not in the cache is a miss. The proportion
of all the memory accesses that are satisfied by the cache is the hit rate, usually expressed as a
percentage, and the proportion that are not is the miss rate. The miss rate of a well-designed
cache should be only a few per cent if a modern processor is to fulfil its potential. The miss

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rate depends on a number of cache parameters, including its size (the number of bytes of
memory in the cache) and its organization.
Cache:
 Impact on Performance:
 Maintains data consistency across multiple caches in a multicore system.
 Prevents data inconsistencies that could arise from simultaneous updates by
different cores.
 Helps avoid unnecessary cache flushes and stalls.
 Impact on Efficiency:
 Ensures efficient and reliable operation in multicore systems.
 Minimizes the performance impact of cache synchronization mechanisms.

Flash Memory:
 Impact on Performance:
 Flash memory is non-volatile storage used for storing program code and persistent data.
 Access times to flash memory are slower compared to RAM.
 Efficient caching and prefetching mechanisms help mitigate the impact of slower flash
memory access on performance.
 Impact on Efficiency:
 Flash memory is energy-efficient for storing non-volatile data.
 Optimized access patterns and usage help minimize the energy consumption associated
with accessing flash memory.

11. Describe the pin diagram of a typical ARM Cortex processor, specifying the functions
and usage of each pin.

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12. Elaborate on the process of setting up an embedded development environment using

the Micro-C compiler and Keil IDE? What are the essential components and
configurations required for a successful setup?
Setting up an embedded development environment using the Micro-C compiler and Keil IDE
involves several steps, including the installation of necessary software components and
configurations. Below is a general guide to help you set up the development environment:

1. Install Keil IDE:

 Download the Keil MDK (Microcontroller Development Kit) from the official Keil website.
 Run the installer and follow the on-screen instructions.
 During installation, you can choose the components you want to install, including the Keil
µVision IDE, debugger, and other tools.
2. Install Micro-C Compiler:
 Keil MDK typically comes with the ARM Compiler integrated, so a separate installation of the
Micro-C compiler might not be necessary.
 Verify the installed toolchain versions in Keil to ensure compatibility with your target
microcontroller.
3. Configure Keil µVision:
 Open Keil µVision IDE.
 Configure the IDE settings:
 Select the target microcontroller device: Project -> Manage -> Device.
 Configure target options like the oscillator frequency, memory model, etc.: Project ->
Options for Target.
 Set up the debug interface: Debug -> Settings.
 Specify the output directory and file names: Project -> Options for Target -> Output.
4. Create a New Project:
 Create a new project: Project -> New µVision Project.
 Choose a project name and location.
 Select your microcontroller device from the list.
5. Configure Project Settings:
 Configure the project settings:
 Set up C/C++ compiler options: Project -> Options for Target -> C/C++.
 Specify include paths, defines, and other compiler options.
 Configure linker options: Project -> Options for Target -> Linker.
 Specify memory regions, stack/heap sizes, etc.
6. Write and Import Code:
 Write your embedded C code or import existing source files into the project.
 Add source files to the project: Project -> Add Files to Project.
7. Build the Project:
 Build the project: Project -> Build Target or use the toolbar icon.
 Check the build output window for any errors or warnings.
8. Debugging:
 Configure and start the debugger:
 Set breakpoints, watch variables, and configure other debugging options.
 Debug -> Start/Stop Debug Session.

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9. Flash Programming:
 If you have a target board with a debugger or flash programmer, configure flash programming
settings.
 Program the microcontroller: Flash -> Download.
10. Verify and Debug:
 Verify the code execution on the target hardware.
 Use the debugging features to inspect variables, step through code, and diagnose issues.
Additional Tips:
 Ensure that you have the appropriate device support pack installed for your microcontroller.
Keil provides these packs for various microcontroller families, and you can download and
install them through the Pack Installer.
 Refer to the specific documentation for your microcontroller and Keil version for any platform-
specific considerations or configurations.
Common Issues and Troubleshooting:
 Compiler/Toolchain Issues:
 Ensure the Micro-C compiler and Keil MDK versions are compatible.
 Check for updates and patches on the Keil website.
 Target Hardware Connection:
 Ensure that your target hardware is properly connected to the debugger.
 Check the device and connection settings in Keil.
 Memory Configuration:
 Verify that the memory regions and sizes are correctly configured in the project
settings.
 Include Paths and Libraries:
 Confirm that the necessary include paths and libraries are specified in the project
settings.
 Startup Code and System Initialization:
 Check the correctness of the startup code and system initialization in your project.

13. Outline the typical workflow for developing and deploying embedded C applications
using Micro-C and Keil compilers?
Developing and deploying embedded C applications using Micro-C and Keil compilers
involves a series of steps, from writing code to flashing the program onto the target
microcontroller. Below is a typical workflow for embedded C application development with
Micro-C and Keil compilers:

1. Project Setup:
 Create a new project in Keil µVision IDE.
 Select the target microcontroller device for your project.
 Configure project settings, including memory model, stack size, and peripheral configurations.
2. Write Embedded C Code:
 Write the embedded C code for your application using the Keil µVision IDE.
 Organize code into source files, and include any necessary libraries.
 Implement initialization routines for peripherals, system clocks, and other hardware-specific
configurations.
3. Configure Compiler Options:
 Set compiler options in Keil µVision for your project:

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 Specify include paths for header files.

 Define preprocessor macros and constants.
 Configure compiler optimization levels.
4. Build the Project:
 Build the project to compile the source code into machine code:
 Click on Project -> Build Target or use the toolbar icon.
 Check the build output window for any errors or warnings.
5. Debugging and Testing:
 Configure the debugger settings:
 Set up breakpoints and watchpoints.
 Configure variable and memory views.
 Start a debug session to test and debug your application:
 Click on Debug -> Start/Stop Debug Session.
 Use debugging features like stepping through code, inspecting variables, and
monitoring peripherals.
6. Flash Programming:
 Configure flash programming settings to specify the programming algorithm and memory
regions.
 Connect the debugger to the target hardware.
 Program the microcontroller with the compiled code:
 Click on Flash -> Download or use the appropriate programming command.
7. Verify Operation on Hardware:
 Power up the target hardware with the flashed code.
 Verify the correct execution of the application on the hardware.
 Use debugging features to troubleshoot and fix any issues encountered during runtime.
8. Optimization and Refinement:
 Fine-tune your code for performance and efficiency.
 Optimize critical sections of code.
 Refactor and improve code structure and readability.
9. Documentation:
 Document your code, including comments and explanations of key functions.
 Create a README file detailing the project, hardware setup, and any specific instructions for
other developers or users.
10. Version Control:
 Use a version control system (e.g., Git) to track changes in your project.
 Commit code changes with meaningful messages.
11. Release and Deployment:
 Package your embedded C application for deployment:
 Ensure that all necessary files (binary, configuration files, etc.) are ready.
 Create a release build if necessary, ensuring that optimizations are applied.
12. Testing in Different Environments:
 If applicable, test your embedded C application on various hardware configurations or
environments.
 Ensure compatibility with different microcontroller models and configurations.
13. Documentation and User Guides:
 Provide comprehensive documentation for your embedded C application.
 Include user guides, installation instructions, and troubleshooting tips.

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14. Maintenance and Updates:

 Monitor your project for bug reports and user feedback.
 Address issues and release updates as needed.
15. Collaboration and Teamwork:
 If working in a team, collaborate through version control and communicate effectively.
 Share knowledge and best practices among team members.
Note:
 The specifics of the workflow may vary based on the project requirements, the microcontroller
architecture, and the features provided by the Keil µVision IDE.

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