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CO Unit 3b Processor Organization

The document outlines the functions and organization of a processor, emphasizing its role in executing machine-language instructions and coordinating computer activities. It discusses performance enhancement techniques such as pipelining and superscalar operation, and details the steps involved in fetching and executing instructions using the program counter and instruction register. Additionally, it describes the phases of instruction fetch and execution, including operations performed on memory and processor registers.

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0% found this document useful (0 votes)
8 views20 pages

CO Unit 3b Processor Organization

The document outlines the functions and organization of a processor, emphasizing its role in executing machine-language instructions and coordinating computer activities. It discusses performance enhancement techniques such as pipelining and superscalar operation, and details the steps involved in fetching and executing instructions using the program counter and instruction register. Additionally, it describes the phases of instruction fetch and execution, including operations performed on memory and processor registers.

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24095a3403
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Processor Organization

Functions of processing unit:


 It executes machine-language instructions and coordinates the activities of other units in a
computer.
 It performs the tasks of fetching, decoding, and executing instructions.
 It is often called the central processing unit (CPU) or processor.
To achieve high performance:
 Various functional units of a processor are to be operated in parallel.
 Such processors have a pipelined organization, where the execution of an instruction is started
before the execution of the preceding instruction is completed.
 Another approach is superscalar operation, is to fetch and start the execution of several
instructions at the same time.
Some Fundamental Concepts:
A typical computing task consists of a series of operations specified by a sequence of machine-language
instructions that constitute a program. The processor fetches one instruction at a time and performs the
operation specified. Instructions are fetched from
successive memory locations until a branch or a jump instruction is encountered. The processor uses
the program counter, PC, to keep track of the address of the next instruction to be fetched and executed.
After fetching an instruction, the contents of the PC are updated to point to the next instruction in
sequence. A branch instruction may cause a different value to be loaded into the PC.
When an instruction is fetched, it is placed in the instruction register, IR, from where it
is interpreted, or decoded, by the processor’s control circuitry. The IR holds the instruction until its
execution is completed.
How a processor executes an instruction?
To execute an instruction, the processor has to perform the following steps:
1. Fetch the contents of the memory location pointed to by the PC. The contents of this
location are the instruction to be executed; hence they are loaded into the IR. In register transfer notation,
the required action is IR←[[PC]]
2. Increment the PC to point to the next instruction. Assuming that the memory is byte
addressable, the PC is incremented by 4; that is PC←[PC] + 4
3. Carry out the operation specified by the instruction in the IR.
Instruction fetch phase:
Fetching an instruction and loading it into the IR is usually referred to as the instruction
fetch phase.
Instruction execution phase:
Performing the operation specified in the instruction constitutes the instruction execution phase.
operation specified by an instruction:
• Read the contents of a given memory location and load them into a processor register.
• Read data from one or more processor registers.
• Perform an arithmetic or logic operation and place the result into a processor register.
• Store data from a processor register into a given memory location.
Execution of Complete instruction:-
Multiple bus organization:-

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