MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

General Description Features

The MAX17047/MAX17050 incorporate the Maxim ●● Accurate Battery-Capacity and Time-To-Empty
ModelGauge™ m3 algorithm that combines the excellent Estimation
short-term accuracy and linearity of a coulomb counter • Temperature, Age, and Rate Compensated
with the excellent long-term stability of a voltage-based fuel • Does Not Require Empty, Full, or Idle States to
gauge, along with temperature compensation to provide Maintain Accuracy
industry-leading fuel-gauge accuracy. ModelGauge m3 ●● Precision Measurement System
cancels offset accumulation error in the coulomb counter, • No Calibration Required
while providing better short-term accuracy than any purely
voltage-based fuel gauge. Additionally, the ModelGauge ●● ModelGauge m3 Algorithm
• Long-Term Influence by Voltage Fuel Gauge
m3 algorithm does not suffer from abrupt corrections that
Cancels Coulomb-Counter Drift
normally occur in coulomb-counter algorithms, since tiny
• Short-Term Influence by Coulomb Counter
continual corrections are distributed over time.
Provides Excellent Linearity
The device automatically compensates for aging, temper- • Adapts to Cell Characteristics
ature, and discharge rate and provides accurate state of
●● External Temperature-Measurement Network
charge (SOC) in mAh or %, as well as time-to-empty over
• Actively Switched Thermistor Resistive Divider
a wide range of operating conditions. The device provides
Reduces Current Consumption
two methods for reporting the age of the battery: reduction
in capacity and cycle odometer. ●● Low Quiescent Current
The device provides precision measurements of current, • 25μA Active, < 0.5μA Shutdown
voltage, and temperature. Temperature of the battery ●● Alert Indicator for SOC, Voltage, Temperature, and
pack is measured using an external thermistor supported Battery Removal/Insertion Events
by ratiometric measurements on an auxiliary input. A
●● AtRate Estimation of Remaining Capacity
2-wire (I2C) interface provides access to data and control
registers. The MAX17047 is available in a lead(Pb)-free, ●● 2-Wire (I2C) Interface
3mm x 3mm, 10-pin TDFN package. The MAX17050 is ●● Tiny, Lead(Pb)-Free, 3mm x 3mm, 10-Pin TDFN
available in a 0.4mm pitch 9-bump WLP package. Package or Tiny 0.4mm Pitch 9-Bump WLP Package
Applications
●● Smartphones, Tablets ●● Medical Devices
●● Health and Fitness ●● Handheld Computers Ordering Information appears at end of data sheet.
Monitors and Terminals
●● Digital Still, Video and ●● Wireless Speakers
Action Cameras
Simple Fuel-Gauge Circuit Diagram
BATTERY PACK SYSTEM

PK+ VTT
VBATT (MAX17047 ONLY)
THRM ALRT

OPTIONAL SDA HOST

MAX17047 µP
10kΩ
T AIN MAX17050 SCL
REG
OPTIONAL
PROTECTION 10kΩ OPTIONAL CSP EP CSN
NTC 0.1µF 0.1µF
10nF 10mΩ
THERMISTOR
RSNS
PK-

ModelGauge is a trademark of Maxim Integrated Products, Inc.

19-6008; Rev 7; 11/16

MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Absolute Maximum Ratings

VBATT, SDA, SCL, ALRT to CSP.............................-0.3V to +6V Continuous Power Dissipation (TA = +70°C)
REG to CSP..........................................................-0.3V to +2.2V TDFN (derate 24.4mW/°C above +70°C)................1951.2mW
VTT to CSP...............................................................-0.3V to +6V WLP (derate 11.9mW/°C above +70°C)....................952.0mW
THRM, AIN to CSP.....................................-0.3V to (VTT + 0.3V) Operating Temperature Range............................ -40°C to +85°C
CSN to CSP................................................................-2V to +2V Junction Temperature.......................................................+150°C
Continuous Sink Current (VTT)...........................................20mA Storage Temperature Range............................. -55°C to +125°C
Continuous Sink Current (SCL, SDA, ALRT)......................20mA Lead Temperature (soldering 10s)...................................+300°C
Soldering Temperature (reflow)........................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.

Package Thermal Characteristics (Note 1)

TDFN WLP
Junction-to-Ambient Thermal Resistance (θJA)...........41°C/W Junction-to-Ambient Thermal Resistance (θJA)...........84°C/W
Junction-to-Case Thermal Resistance (θJC)..................9°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.

Electrical Characteristics
(VBATT = 2.5V to 4.5V, TA = -20°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Supply Voltage VBATT (Note 3) 2.5 4.5 V
IDD0 Shutdown mode, TA ≤ +50°C 0.5 2
Supply Current µA
IDD1 Active mode, average current 25 42
REG Regulation Voltage VREG 1.5 1.9 V
TA = +25°C -7.5 +7.5
Measurement Error, VBATT VGERR mV
-20 +20
Measurement Resolution, VBATT VLSb 0.625 mV
VBATT Measurement Range VFS 2.5 4.98 V
Input Resistance CSN, AIN 15 MΩ
Ratiometric Measurement
TGERR -0.5 +0.5 %
Accuracy, AIN
Ratiometric Measurement % Full
TLSb 0.0244
Resolution, AIN Scale
Current Register Resolution ILSb 1.5625 µV
Current Full-Scale Magnitude IFS ±51.2 mV
Current Offset Error IOERR ±1.5 µV
% of
Current Gain Error IGERR -1 +1
Reading
VDD = 3.6V at TA = +25°C -1 +1
Time-Base Accuracy tERR TA = 0°C to +50°C -2.5 +2.5 %
TA = -20°C to +70°C -3.5 +3.5

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Electrical Characteristics (continued)

(VBATT = 2.5V to 4.5V, TA = -20°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

THRM Output Drive IOUT = 0.5mA VTT - 0.1 V
THRM Precharge Time tPRE 8.48 ms
SDA, SCL, ALRT Input
VIH 1.5 V
Logic High
SDA, SCL, ALRT Input Logic Low VIL 0.5 V
SDA, ALRT Output Logic Low VOL IOL = 4mA 0.4 V
SDA, ALRT Pulldown Current IPD Active mode, VSDA = 0.4V, VALRT = 0.4V 0.05 0.2 0.4 µA
ALRT Leakage 1 µA
THRM Operating Range 2.5 VTT V
Battery-Removal Detection
VDETR VTHRM - VAIN 40 125 200 mV
Threshold—VAIN Rising
Battery-Removal Detection
VDETF VTHRM - VAIN 70 150 230 mV
Threshold—VAIN Falling

VAIN step from 70% to 100% of VTHRM to

Battery-Removal Detection
tTOFF ALRT falling; Alrtp = logic 0; 100 µs
Comparator Delay
EnAIN = logic 1; FTHRM = logic 1
External AIN Capacitance RTHM = 10kΩ NTC 100 nF

Electrical Characteristics (2-Wire Interface)

(2.5V ≤ VBATT ≤ 4.5V, TA = -20°C to +70°C.) (Note 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SCL Clock Frequency fSCL (Note 4) 0 400 kHz
Bus Free Time Between a STOP
tBUF 1.3 µs
and START Condition
Hold Time (Repeated)
tHD:STA (Note 5) 0.6 µs
START Condition
Low Period of SCL Clock tLOW 1.3 µs
High Period of SCL Clock tHIGH 0.6 µs
Setup Time for a Repeated
tSU:STA 0.6 µs
START Condition
Data Hold Time tHD:DAT (Notes 6, 7) 0 0.9 µs
Data Setup Time tSU:DAT (Note 6) 100 ns
Rise Time of Both SDA and SCL 20 +
tR 300 ns
Signals 0.1CB

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Electrical Characteristics (2-Wire Interface) (continued)

(2.5V ≤ VBATT ≤ 4.5V, TA = -20°C to +70°C.) (Note 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Fall Time of Both SDA and SCL 20 +
tF 300 ns
Signals 0.1CB
Setup Time for STOP Condition tSU:STO 0.6 µs
Spike Pulse Widths
tSP (Note 8) 0 50 ns
Suppressed by Input Filter
Capacitive Load for Each Bus
CB (Note 9) 400 pF
Line
SCL, SDA Input Capacitance CBIN 60 pF
Note 2: Specifications are 100% tested at TA = +25°C. Limits over the operating range are guaranteed by design and
characterization.
Note 3: All voltages are referenced to CSP.
Note 4: Timing must be fast enough to prevent the device from entering shutdown mode due to bus low for a period > 45s minimum.
Note 5: fSCL must meet the minimum clock low time plus the rise/fall times.
Note 6: The maximum tHD:DAT has only to be met if the device does not stretch the low period (tLOW) of the SCL signal.
Note 7: This device internally provides a hold time of at least 100ns for the SDA signal (referred to the minimum VIH of the SCL
signal) to bridge the undefined region of the falling edge of SCL.
Note 8: Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant.
Note 9: CB—total capacitance of one bus line in pF.

I2C Bus Timing Diagram

SDA

tF
tF tSP tR tBUF
tSU:DAT
tLOW tR tHD:STA

SCL

tHD:STA tSU:STA tSU:STO

tHD:DAT
S Sr P S

Figure 1. I2C Bus Timing Diagram

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)

SHUTDOWN CURRENT VOLTAGE ADC ERROR vs. TEMPERATURE

vs. SUPPLY VOLTAGE ACTIVE CURRENT vs. SUPPLY VOLTAGE AND SUPPLY VOLTAGE
0.8 35 10

MAX17047 toc02
MAX17047 toc01

MAX17047 toc03
TA = +70°C TA = +70°C
0.7 8
30 TA = +25°C
6 TA = -20°C

VOLTAGE ADC ERROR (mV)

SHUTDOWN CURRENT (uA)

0.6
ACTIVE CURRENT (uA)
25 4 TA = +70°C
0.5 2
TA = +25°C 20
0.4 0
15 TA = -20°C
0.3 -2
10 -4 TA = +25°C
0.2
TA = -20°C -6
5
0.1 -8
0 0 -10
0 1 2 3 4 5 0 1 2 3 4 5 2.2 2.7 3.2 3.7 4.2
VBATT (V) VBATT (V) VBATT (V)

CURRENT ADC ERROR AUXILIARY INPUT ADC ERROR

vs. TEMPERATURE vs. TEMPERATURE
15 1.0

MAX17047 toc05
MAX17047 toc04

0.8
AUXILIARY INPUT ADC ERROR (%)

10 0.6
CURRENT ADC ERROR (mA)

TA = -20°C 0.4
5
0.2 TA = +70°C

0 0
-0.2 TA = +25°C
-50 TA = +25°C TA = +70°C -0.4 TA = -20°C
-0.6
-10
-0.8
-15 -1.0
-2 -1 0 1 2 0 10 20 30 40 50 60 70 80 90 100
CURRENT FORCED (A) AIN RATIO TO VTT (%)

RESPONSE TO TEMPERATURE TRANSIENT

AT CONSTANT-CURRENT LOAD END OF CHARGE DETECTION
100 4.4 8 4.7
FULLCAP VALID END-OF-CHARGE
MAX17047 toc07
MAX17047 toc06

90 4.2 7 DETECTION EVENT 4.5

VCELL RISES WITH
CAPACITY (mAh); CURRENT (mA)

6 4.3
SOC (%), TEMPERATURE (°C)

80 TEMPERATURE DURING 4.0 REMCAPREP

70 CONSTANT LOAD 3.8 5 VCELL 4.1
60 3.6 4 NEAR-FULL FALSE 3.9
VCELL (V)
VCELL (V)

50 3.4 3 CHARGE TERMINATION 3.7

EMPTY VOLTAGE EVENTS REJECTED
40 SOCAV 3.2 2 3.5
30 SOCREP 3.0 1 3.3
FUEL GAUGE CHANGES
20 TRAJECTORY AFTER 2.8 0 3.1
TEMPERATURE CHANGE -1 2.9
10 2.6
TEMPERATURE CURRENT
0 2.4 -2 2.7
0 1 2 3 0 2 4 6 8
TIME (Hr) TIME (Hr)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)

COLD DISCHARGE (0°C) DISCHARGE AT +40°C

100 10 100 10

MAX17047 toc08

MAX17047 toc09
90 8 90 8
C/4 DISCHARGE
80 REFERENCE 6 80 6
C/7 DISCHARGE
STATE OF CHARGE (%)

STATE OF CHARGE (%)

70 SOC 4 70 4
C/9 DISCHARGE
60 2
ERROR (%)
60 2

ERROR (%)
ERROR ERROR
50 0 50 0
40 -2 40 -2
REFERENCE
30 -4 30 SOC -4
20 SOCREP -6 20 -6
10 -8 10 SOCREP -8
0 -10 0 -10
0 2 4 6 8 10 0 2 4 6 8 10
TIME (Hr) TIME (Hr)

CHARGE AND DISCHARGE IN

CHARGE AND DISCHARGE AT +20°C ACTUAL SYSTEM
MAX17047 toc10 MAX17047 toc11
STATE OF CHARGE (%) OR TEMPERATURE (°C)

100 10 100 4.2

90 8 90 4.1
80 C/2 DISCHARGE 6 80 4.0
SOCREP
STATE OF CHARGE (%)

70 4 70 3.9
REFERENCE VCELL
60 2 60 3.8
ERROR (%)

VCELL (V)
SOC ERROR
50 0 50 3.7
TEMPERATURE
40 -2 40 3.6
30 -4 30 3.5
C/4 DISCHARGE SOCREP (%)
20 -6 20 3.4
C/7 DISCHARGE REFERENCE SOC (%)
10 C/9 DISCHARGE -8 10 3.3
0 -10 0 3.2
0 5 10 15 0 5 10
TIME (Hr) TIME (Hr)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Pin/Bump Configurations

MAX17050
TOP VIEW
1 2 3
+
VTT 1 + 10 VBATT A AIN SCL CSN

AIN 2 9 THRM
B VBATT
SCL 3 8 ALRT ALRT REG
MAX17047
SDA 4 7 REG
C SDA THRM CSP
EP
CSN 5 6 CSP

WLP
TDFN

Pin/Bump Descriptions
PIN BUMP
NAME FUNCTION
TDFN WLP
Supply Input for Thermistor Bias Switch (MAX17047 Only.) VTT is connected internally to VBATT
1 — VTT on the MAX17050. Connect to supply for ratiometric AIN pin-voltage measurements. In most
applications, connect VTT to VBATT.

Auxiliary Voltage Input. Auxiliary voltage input from external thermal-measurement network. AIN also
2 A1 AIN
provides battery insertion/removal detection. Connect to VBATT, if not used.
3 A2 SCL Serial Clock Input. 2-wire clock line. Input only.
4 C1 SDA Serial Data Input/Out. 2-wire data line. Open-drain output driver.
5 A3 CSN Sense Resistor Connection. System ground connection and sense resistor input.
6 C3 CSP Chip Ground and Sense Resistor Input
7 B3 REG Voltage Regulator Bypass. Connect a 0.1µF capacitor from REG to CSP.
Alert Indication. An open-drain n-channel output used to indicate specified condition thresholds have
8 B2 ALRT been met. A 200kΩ pullup resistor to power rail is required for use as an output. Alternatively, ALRT
can operate as a shutdown input with the output function disabled.

Thermistor Bias Connection. Supply for thermistor resistor-divider. Connect to the high side of the
9 C2 THRM
thermistor/resistor-divider. THRM connects internally to VTT during temperature measurement.
Power-Supply and Battery Voltage-Sense Input. Kelvin connect to positive terminal of battery pack.
10 B1 VBATT
Bypass with a 0.1µF capacitor to CSP.
— — EP Exposed Pad (TDFN Only). Connect to CSP.

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Block Diagram

VBATT
ALRT
PK+ IN
32kHz OSCILLATOR
0.1µF ModelGauge m3
2V LDO
ALGORITHM
PK- REG OCV CALCULATION
OUT
VTT CSP
0.1µF (MAX17047 ONLY)
PK+
PK- MAX17047
P MAX17050
REF
THRM
VTHRM - VDETR/VDETF
BATTERY
REMOVAL VBATT
DETECT SDA
REF ADC
AIN I 2C
MUX 12-BIT ADC
INTERFACE SCL
10nF
CSP CSN

10mΩ
RSNS
PK-
PK- SYSTEM GROUND

Detailed Description pack is measured using an external thermistor supported

The MAX17047/MAX17050 incorporate the Maxim by ratiometric measurements on an auxiliary input. A
ModelGauge m3 algorithm that combines the excellent 2-wire (I2C) interface provides access to data and control
short-term accuracy and linearity of a coulomb counter registers. The MAX17047 is available in a 3mm x 3mm,
with the excellent long-term stability of a voltage-based 10-pin TDFN package. The MAX17050 is available in a
fuel gauge, along with temperature compensation to pro- 0.4mm pitch 9-bump WLP package.
vide industry-leading fuel-gauge accuracy. ModelGauge
m3 cancels offset accumulation error in the coulomb
ModelGauge m3 Algorithm
counter, while providing better short-term accuracy than The ModelGauge m3 algorithm combines a high-accura-
any purely voltage-based fuel gauge. Additionally, the cy coulomb counter with a voltage fuel gauge (VFG) as
ModelGauge m3 algorithm does not suffer from abrupt represented in Figure 2.
corrections that normally occur in coulomb-counter algo- Classical coulomb-counter-based fuel gauges have
rithms, since tiny continual corrections are distributed excellent linearity and short-term performance. However,
over time. they suffer from drift due to the accumulation of the offset
The device automatically compensates for aging, tem- error in the current-sense measurement. Although the
perature, and discharge rate and provides accurate offset error is often very small, it cannot be eliminated,
state-of-charge (SOC) in mAh or % over a wide range of causes the reported capacity error to increase over time,
operating conditions. The device provides two methods and requires periodic corrections. Corrections are usually
for reporting the age of the battery: reduction in capacity performed at full or empty. Some other systems also use
and cycle odometer. the relaxed battery voltage to perform corrections. These
systems determine the SOC based on the battery voltage
The device provides precision measurements of current,
after a long time of no current flow. Both have the same
voltage, and temperature. Temperature of the battery
limitation: if the correction condition is not observed over

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

VOLTAGE FUEL GAUGE

VOLTAGE CURRENT
OCV CALCULATION OCV TABLE LOOKUP COULOMB COUNTER
OCV TEMPERATURE- OCV OUTPUT % REMAINING OUTPUT mAh OUTPUT
RELAXED TIME
COMPENSATION LEARN
CELL
DETECTION

CAPACITY LEARN
mAh PER %

MIXING ALGORITHM
EMPTY mAh OUTPUT
DETECTION
RemCapMIX
SOCMIX

CURRENT
APPLICATION
EMPTY
COMPENSATION
TEMPERATURE
APPLICATION CELL CHEMISTRY
OUTPUTS: OUTPUTS:
SOCREP OCV
RemCapREP CYCLES
END-OF-CHARGE SOCAV RCELL
DETECTION RemCapAV FullCAPNom
TTE AGE
FullCAP

Figure 2. ModelGauge m3 Overview

time in the actual application, the error in the system is combined result eliminates the weaknesses of both the
boundless. The performance of classic coulomb coun- coulomb counter and the VFG, while providing the
ters is dominated by the accuracy of such corrections. strengths of both. A mixing algorithm combines the VFG
Classical voltage-measurement-based SOC estimation capacity with the coulomb counter and weighs each
has poor accuracy due to inadequate cell modeling, but result so that both are used optimally to determine the
does not accumulate offset error over time. battery state. In this way, the VFG capacity result is used
to continuously make small adjustments to the battery
The device includes an advanced VFG, which estimates state, canceling the coulomb-counter drift.
open-circuit voltage (OCV), even during current flow, and
simulates the nonlinear internal dynamics of a lithium-ion The ModelGauge m3 algorithm uses this battery state
(Li+) battery to determine the SOC with improved accu- information and accounts for temperature, battery current,
racy. The model considers the time effects of a battery age, and application parameters to determine the remain-
caused by the chemical reactions and impedance in the ing capacity available to the system.
battery to determine SOC based on table lookup. This SOC The ModelGauge m3 algorithm continually adapts to the
estimation does not accumulate offset error over time. cell and application through independent learning rou-
The ModelGauge m3 algorithm combines a high-accu- tines. As the cell ages, its change in capacity is monitored
racy coulomb counter with a VFG. The complementary and updated and the VFG dynamics adapt based on cell-
voltage behavior in the application.

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

OCV Estimation and Coulomb-Count Mixing The resulting output from the mixing algorithm does
The core of the ModelGauge m3 algorithm is a mixing not suffer drift from current measurement offset error
algorithm that combines the OCV state estimation with and is more stable than a stand-alone OCV estimation
the coulomb counter. After power-on reset of the IC, algorithm; see Figure 4. Initial accuracy depends on the
coulomb-count accuracy is unknown. The OCV state relaxation state of the cell. The highest initial accuracy is
estimation is weighted heavily compared to the coulomb- achieved with a fully relaxed cell.
count output. As the cell progresses through cycles in the Fuel-Gauge Empty Compensation
application, coulomb-counter accuracy improves and the
As the temperature and discharge rate of an application
mixing algorithm alters the weighting so that the coulomb-
changes, the amount of charge available to the appli-
counter result is dominant. From this point forward, the IC
cation also changes. The ModelGauge m3 algorithm
switches to servo mixing. Servo mixing provides a fixed
distinguishes between remaining capacity of the cell
magnitude continuous error correction to the coulomb
(RemCapMIX) and remaining capacity of the application
count, up or down, based on the direction of error from
(RemCapAV) and reports both results to the user.
the OCV estimation. This allows differences between
the coulomb count and OCV estimation to be corrected Fuel-Gauge Learning and Age Support
quickly. See Figure 3. The device periodically makes internal adjustments to cell
characterization and application information to remove
100% initial error and maintain accuracy as the cell ages. These
adjustments always occur as small undercorrections to
prevent instability of the system and prevent any notice-
OCV AND COULOMB-COUNT

able jumps in the fuel-gauge outputs. Learning occurs

automatically without any input from the host. To main-
MIXING RATIO

COULOMB-COUNT INFLUENCE SERVO MIXING tain learned accuracy through power loss, the host must
periodically save learned information and then restore
after power is returned. See the Power-Up and Power-On
Reset section for details:
OCV • Full Capacity Available to Application (FullCAP).
INFLUENCE This is the total capacity available to the application
0%
0 0.50 1.00 1.50 2.00 at full. FullCAP is updated near the end of charging
CELL CYCLES when termination is detected. See the End-of-Charge
Detection section.
Figure 3. ModelGauge m3 OCV and Coulomb-Count Mixing

TYPICAL OCV ESTIMATION

ERROR AS CELL IS CYCLED
MAXIMUM COULOMB-COUNTER ERROR
STATE-OF-CHARGE ERROR

(SHADED AREA)
ModelGauge m3
OCV + COULOMB-COUNT MIXING
MAXIMUM ERROR RANGE

TIME

Figure 4. ModelGauge m3 Algorithm Mixing Conceptual Illustration

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

• Cell Capacity (FullCapNom). This is the total cell Typical Operating Circuit
capacity at full, according to the VFG. This includes The device is designed to mount outside the cell pack
some capacity that is not available to the application that it monitors. Voltage of the battery pack is measured
at high loads and/or low temperature. The device directly at the pack terminals by the VBATT and CSP
periodically compares percent change based on OCV connections. Current is measured by an external sense
measurement vs. coulomb-count change as the cell resistor placed between the CSP and CSN pins. An exter-
charges and discharges. This information allows the nal resistor-divider network allows the device to measure
device to maintain an accurate estimation of the cell’s temperature of the cell pack by monitoring the AIN pin.
capacity in mAh as the cell ages. The THRM pin provides a strong pullup for the resistor-
• Voltage Fuel-Gauge Adaptation. The device divider that is internally disabled when temperature is not
observes the battery’s relaxation response and adjusts being measured.
the dynamics of the VFG. This adaptation adjusts Communication to the host occurs over a standard I2C
the RCOMP0 register during qualified cell relaxation interface. SCL is an input from the host, and SDA is an
events. open-drain I/O pin that requires an external pullup. The
• Empty Learning. The device updates internal data ALRT pin is an output that can be used as an external
whenever cell empty is detected (VCELL < V_empty) interrupt to the host processor if certain application condi-
to account for cell age or other cell deviations from tions are detected. ALRT can also function as an input,
the characterization information. This maintains SOC allowing the host to shut down the device. This pin is
accuracy as the battery ages. also open drain and requires an external pullup resistor.
Figure 5 is the typical operating circuit.
Determining Fuel-Gauge Accuracy
To determine the true accuracy of a fuel gauge, as expe- Multicell Circuit
rienced by end users, the battery should be exercised The MAX17047 can be used in multicell pack applica-
in a dynamic manner. The end-user accuracy cannot be tions. A resistor-divider network divides the pack voltage
understood with only simple cycles. down so that the IC monitors the equivalent voltage of a
To challenge a correction-based fuel gauge, such as a single cell. The MAX9910 buffers the divider output so
coulomb counter, test the battery with partial loading ses- that loading by the MAX17047 does not affect accuracy.
sions. For example, a typical user may operate the device VTT must be connected to a regulated supply in the sys-
for 10min and then stop use for an hour or more. A robust tem to prevent overloading the MAX9910. Contact the
test method includes these kinds of sessions many times factory for a MAX17050 multicell application circuit. See
at various loads, temperatures, and duration. Refer to Figure 6.
Application Note 4799: Cell Characterization Procedure Thermistor Sharing Circuit
for a ModelGauge m3 Fuel Gauge.
The MAX17047 can share the cell thermistor circuit with
Initial Accuracy the system charger. In this circuit, there is a single therm-
The device uses the first voltage reading after power-up istor inside the cell pack and a single bias resistor external
or after cell insertion to determine the starting output of to the cell pack. The device shares the same external
the fuel gauge. It is assumed that the cell is fully relaxed bias as the charger circuit and measurement point on the
prior to this reading; however, this is not always the case. thermistor. In this configuration, each device can measure
If the cell was recently charged or discharged, the volt- temperature individually or simultaneously without inter-
age measured by the device may not represent the true ference. Alternatively, if the bias voltage in the charger
state of charge of the cell, resulting in initial error in the circuit is not available to the device, a separate bias volt-
fuel gauge outputs. In most cases, this error is minor and age on the VTT pin can be used. For proper operation, the
is quickly removed by the fuel gauge algorithm during separate bias voltage must be larger than the minimum
normal operation. operating voltage of the device, but no larger than one
diode drop above the charger circuit bias voltage. The
MAX17050 cannot be operated in his configuration. See
Figure 7.

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

BATTERY PACK SYSTEM

PK+ VTT
VBATT (MAX17047 ONLY) OPTIONAL OPTIONAL
200kΩ 5kΩ

THRM ALRT

THERMISTOR
OPTIONAL SDA HOST
MEASUREMENT OPTIONAL MAX17047
10kΩ µP
T AIN MAX17050 SCL
REG

OPTIONAL
CSP EP CSN
PROTECTION IC 10kΩ OPTIONAL
0.1µF 0.1µF
NTC 10nF
THERMISTOR 10mΩ
RSNS
PK-

Figure 5. Typical Operating Circuit

BATTERY PACK PK+ SYSTEM

CELL N
4.5V-5.5V
N-1 REGULATOR
MΩ VTT OPTIONAL OPTIONAL
CELL 1 200kΩ 5kΩ
MAX9910 100Ω ALRT
VBATT
PROTECTOR

THRM SDA HOST

3.3nF 0.1µF
PK- MAX17047 µP
1MΩ
OPTIONAL
PK- SCL
47kΩ 10kΩ
T AIN

OPTIONAL VB CSP EP CSN

10k NTC OPTIONAL
10nF 0.1µF
THERMISTOR
10mΩ
PK-
SYSTEM
GROUND

Figure 6. Multicell Application Circuit

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Recommended Layout 3) CSN and CSP traces should make Kelvin connec-
Proper circuit layout (see Figure 8) is essential for tions to RSNS. The device measures current differ-
measurement accuracy when using the MAX17047/ entially through the CSN and CSP pins. Any shared
MAX17050 ModelGauge m3 ICs. The recommended lay- high-current paths on these traces will affect current-
out guidelines are as follows: measurement gain accuracy. PCB resistance that
cannot be removed can be compensated for during
1) Mount RSNS as close as possible to PACK-. The characterization of the application cell.
device shares both voltage and current measure-
ments on the CSP pin. Therefore, it is important to 4) VBATT capacitor trace loop area should be minimized.
limit the amount of trace resistance between the The device shares the VBATT pin for both voltage mea-
current-sensing resistor and PACK-. surement and IC power. Limiting noise at the VBATT
pin is important to current-measurement accuracy.
2) VBATT trace should make a Kelvin connection to
PACK+. The device shares the VBATT pin for both 5) REG capacitor trace loop area should be minimized.
voltage measurement and IC power. Limiting the The helps filter any noise from the internal regulated
voltage loss through this trace is important to voltage- supply.
measurement accuracy. PCB resistance that cannot 6) There are no limitations on any other IC connection.
be removed can be compensated for during charac- Connections to THRM, ALRT, SDA, SCL, VTT, and
terization of the application cell. AIN, as well as any external components mounted to
these pins, have no special layout requirements.

VBIAS
2.8V < VBIAS < VINTERNAL + 0.6V

CHARGER WITH CHARGER WITH

VTT + THRM INTERNAL
AVAILABLE
MAX17047 BIAS MAX17047
VBIAS
VTT VTT

VOLTAGE BASED VSYSTEM VSYSTEM

P ON EXISTING P VBATT VINTERNAL P VBATT
CHARGER REQUIREMENTS ON DURING
CHARGE
THRM OFF DURING THRM
DISCHARGE

AIN CSP AIN CSP

THERMISTOR THERMISTOR
INSIDE MAX17047 + CHARGER INSIDE MAX17047 + CHARGER
CELL PACK WITH EXTERNAL BIAS CELL PACK WITH INTERNAL BIAS

PK- PK-

Figure 7. Operating Circuits that Share Pack Thermistor with System Charger

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

POSITIVE POSITIVE
POWER BUS POWER BUS

PACK+ PACK+

+
VBATT SDA VBATT AIN
VTT

AIN THRM
THRM ALRT SCL
SCL ALRT CVBATT CVBATT
MAX17047
SDA CREG CSP REG CSN
REG REG MAX17050
CSN EP
CSP
CREG

NEGATIVE NEGATIVE
POWER BUS POWER BUS

PACK- PACK-
RSNS RSNS

Figure 8. Proper Board Layout

ModelGauge m3 Registers ModelGauge Algorithm

To calculate accurate results, ModelGauge m3 requires Output Registers
information about the cell, the application, and real-time The following registers hold the output results from the
information measured by the device. Figure 9 shows all ModelGauge m3 algorithm.
inputs and outputs to the algorithm grouped by category.
Analog input registers are the real-time measurements SOCMIX Register (0Dh)
of voltage, temperature, and current performed by the The SOCMIX register holds the calculated present state of
device. Application-specific registers are programmed charge of the cell before any empty compensation adjust-
by the customer to reflect the operation of the applica- ments are performed. The register value is stored as a
tion. The Cell Characterization Information registers hold percentage with a resolution of 0.0039% per LSb. If an
characterization data that models the behavior of the cell 8-bit state-of-charge value is desired, the host can discard
over the operating range of the application. The Algorithm the lower byte and use only the upper byte of the register
Configuration registers allow the host to adjust perfor- with a resolution of 1.0%. Figure 10 shows the SOCMIX
mance of the device for its application. The Save and register format.
Restore registers allow an application to maintain accura-
cy of the algorithm after the device has been power cycled.
The following sections describe each register in detail.

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

VCELL SOCMIX

CURRENT RemCapMIX

ANALOG TEMPERATURE SOCREP

INPUTS
AverageVCELL RemCapREP

AverageCurrent SOCAV

AverageTemperature RemCapAV
ModelGauge
TTE ALGORITHM
DesignCap OUTPUTS
AGE
APPLICATION ICHGTerm
SPECIFIC CYCLES
FullSOCThr
OCV
V_empty
FullCAP
ModelGauge ALGORITHM
CHARACTERIZATION FullCapNom
TABLE
FSTAT

QResidual Table
FullCAP
FCTC
CELL
CHARACTERIZATION LearnCFG CYCLES
RCOMP0
INFORMATION
FilterCFG QResidual Table
TempCo
RelaxCFG ALGORITHM RCOMP0 SAVE AND
TempNom
CONFIGURATION RESTORE
TempLim MiscCFG TempCo INFORMATION

V_empty dQacc
AtRate
FullCapNom dPacc

Iavg_empty

Figure 9. ModelGauge m3 Register Map

MSB—ADDRESS 0Dh LSB—ADDRESS 0Dh

27 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8

MSb LSb MSb LSb

2-8 UNITS: 0.0039%
20 UNITS: 1.0%

Figure 10. SOCMIX Register Format (Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

RemCapMIX Register (0Fh) the upper byte of the register with a resolution of 1.0%.
The RemCapMIX register holds the calculated remain- Figure 12 shows the SOCREP register format.
ing capacity of the cell before any empty compensation RemCapREP Register (05h)
adjustments are performed. The value is stored in terms of
RemCapREP is a filtered version of the RemCapAV regis-
µVh and must be divided by the application sense-resistor
ter that prevents large jumps in the reported value caused
value to determine remaining capacity in mAh. Figure 11
by changes in the application such as abrupt changes
shows the RemCapMIX register format.
in load current. The value is stored in terms of µVh and
SOCREP Register (06h) must be divided by the application sense-resistor value to
SOCREP is a filtered version of the SOCAV register that determine remaining capacity in mAh. During application
prevents large jumps in the reported value caused by idle periods where the AverageCurrent Register value is
changes in the application such as abrupt changes in load less than ±6 LSbs, RemCapREP does not change. The
current. The register value is stored as a percentage with measured current during this period is still accumulated
a resolution of 0.0039% per LSb. If an 8-bit SOC value is into RemCapMIX and is slowly reflected in RemCapREP
desired, the host can discard the lower byte and use only once cell loading or charging occurs. Figure 13 shows the
RemCapREP register format.

MSB—ADDRESS 0Fh LSB—ADDRESS 0Fh

215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: 5.0µVh/RSENSE
(0.5mAh WHEN RSENSE = 0.010Ω)

Figure 11. RemCapMIX Register Format (Output)

MSB—ADDRESS 06h LSB—ADDRESS 06h

27 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8

MSb LSb MSb LSb

2-8 UNITS: 0.0039%
20 UNITS: 1.0%

Figure 12. SOCREP Register Format (Output)

MSB—ADDRESS 05h LSB—ADDRESS 05h

215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: 5.0µVh/RSENSE
(0.5mAh WHEN RSENSE = 0.010Ω)

Figure 13. RemCapREP Register Format (Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

SOCAV Register (0Eh) is an unfiltered calculation. Jumps in the value can be

The SOCAV register holds the calculated present state caused by changes in the application such as abrupt
of charge of the cell based on all inputs from the changes in load current. Figure 15 shows the RemCapAV
ModelGauge m3 algorithm including empty compensa- register format.
tion. The register value is stored as a percentage with a SOCVF Register (FFh)
resolution of 0.0039% per LSb. If an 8-bit state-of-charge
The SOCVF register holds the calculated present SOC
value is desired, the host can discard the lower byte and
of the battery according to the voltage fuel gauge. The
use only the upper byte of the register with a resolution
register value is stored as a percentage with a resolution
of 1.0%. The SOCAV register value is an unfiltered calcu-
of 0.0039% per LSb. If an 8-bit SOC value is desired, the
lation. Jumps in the value can be caused by changes in
host can discard the lower byte and use only the upper
the application such as abrupt changes in load current.
byte of the register with a resolution of 1.0%. Figure 16
Figure 14 shows the SOCAV register format.
shows the SOCVF register format.
RemCapAV Register (1Fh)
TTE Register (11h)
The RemCapAV register holds the calculated remain-
The TTE register holds the estimated time to empty for
ing capacity of the cell based on all inputs from the
the application under present conditions. The TTE value
ModelGauge m3 algorithm including empty compensa-
is determined by dividing the RemCapAV register by the
tion. The value is stored in terms of µVh and must be
AverageCurrent register. The result is stored in the TTE
divided by the application sense-resistor value to deter-
register with a resolution of 5.625s per LSb.
mine the remaining capacity in mAh. The register value

MSB—ADDRESS 0Eh LSB—ADDRESS 0Eh

27 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8

MSb LSb MSb LSb

2-8 UNITS: 0.0039%
20 UNITS: 1.0%

Figure 14. SOCAV Register Format (Output)

MSB—ADDRESS 1Fh LSB—ADDRESS 1Fh

215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: 5.0µVh/RSENSE
(0.5mAh WHEN RSENSE = 0.010Ω)

Figure 15. RemCapAV Register Format (Output)

MSB—ADDRESS FFh LSB—ADDRESS FFh

27 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8

MSb LSb MSb LSb

2-8 UNITS: 0.0039%
20 UNITS: 1.0%

Figure 16. SOCVF Register Format (Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Alternatively, the TTE register can be used to estimate Cycles Register (17h)
time to empty for any given current load. Whenever the The Cycles register accumulates total percent change in
AtRate register is programmed to a negative number, rep- the cell during both charging and discharging. The result
resenting a discharge current, the TTE register displays is stored as a total count of full charge/discharge cycles.
the estimated time to empty for the application based For example, a full charge/discharge cycle results in
on the AtRate register value. Figure 17 shows the TTE the Cycles register incrementing by 100%. The Cycles
register format. register has a full range of 0 to 65535% with a 1% LSb.
Age Register (07h) This register is reset to 0% at power-up. To maintain the
lifetime cycle count of the cell, this register must be peri-
The Age register contains a calculated percentage value
odically saved by the host and rewritten to the device at
of the application’s present cell capacity compared to its
power-up. See the Save and Restore Registers section
expected capacity. The result can be used by the host to
for details. See Figure 19 for the Cycles register format.
gauge the cell’s health as compared to a new cell of the
same type. The result is displayed as a percentage value VFOCV Register (FBh)
from 0 to 256% with a 0.0039% LSb. Figure 18 shows the The VFOCV register contains the raw open-circuit volt-
Age register format. The equation for the register output is: age output of the voltage fuel gauge. This value is used
Age Register = 100% x (FullCAP Register/ in other internal calculations and can be read for debug
DesignCap Register) purposes. The result is a 12-bit value ranging from 2.5V to
5.119V where 1 LSb is 1.25mV. The bottom 4 bits of this
register are don’t care bits. See Figure 20 for the VFOCV
register format.

MSB—ADDRESS 11h LSB—ADDRESS 11h

210 29 28 27 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4 2-5

MSb LSb MSb LSb

20 UNITS: 3.0min
Figure 17. TTE Register Format (Output)

MSB—ADDRESS 07h LSB—ADDRESS 07h

27 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8

MSb LSb MSb LSb

20 UNITS: 1.0%
2-8 UNITS: 0.0039%
Figure 18. Age Register Format (Output)

MSB—ADDRESS 17h LSB—ADDRESS 17h

215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: 1.0%
Figure 19. Cycles Register Format (Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

FullCAP Register (10h) FullCapNom Register (23h)

This register holds the ModelGauge m3 algorithm calcu- This register holds the calculated full capacity of the cell,
lated full capacity of the cell under best-case conditions not including temperature and charger tolerance. New
(light load, hot). A new full-capacity value is calculated full capacity values are calculated periodically by the IC
after the end of every charge cycle in the application. The during operation. The value is stored in terms of µVh and
value is stored in terms of µVh and must be divided by must be divided by the application sense resistor value to
the application sense-resistor value to determine capacity determine capacity in mAh. This register is used to cal-
in mAh. Figure 21 is the FullCAP register format. See the culate the outputs of the ModelGauge m3 algorithm and
End-of-Charge Detection section. is available to the user only for debug. Figure 22 is the
FullCapNom register format.

MSB—ADDRESS FBh LSB—ADDRESS FBh

211 210 29 28 27 26 25 24 23 22 21 20 X X X X

MSb LSb MSb LSb

20 UNITS: 1.25mV
X = DON’T CARE
Figure 20. VFOCV Register Format (Output)

MSB—ADDRESS 10h LSB—ADDRESS 10h

215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: 5.0µVh/RSENSE
(0.5mAh WHEN RSENSE = 0.010Ω)
Figure 21. FullCAP Register Format (Output)

MSB—ADDRESS 23h LSB—ADDRESS 23h

215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: 5.0µVh/RSENSE
(0.5mAh WHEN RSENSE = 0.010Ω)
Figure 22. FullCapNom Register Format (Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

QH Register (4Dh) of the cell by comparing against the calculated present

The QH register displays the raw coulomb count gener- capacity stored in the FullCAP register. DesignCap has an
ated by the device. This register is used internally as an LSb equal to 5.0µVh and a full range of 0 to 327.68mVh.
input to the mixing algorithm. Monitoring changes in QH The user should multiply the mAh capacity of the cell by
over time can be useful for debugging device operation. the sense resistor value to determine the µVh value to
The QH register is set to 0000h at power-up. The QH store in the DesignCap register. The DesignCap register
register format is shown in Figure 23. format is shown in Figure 24.
FullSOCThr Register (13h)
Application-Specific Registers
The FullSOCThr register gates detection of end-of-charge.
The following registers define the behavior of the applica- SOCVF must be larger than the FullSOCThr value before
tion. They must be programmed by the user before the ICHGTerm is compared to the AverageCurrent register
ModelGauge m3 algorithm is accurate. Any changes to value. The recommended FullSOCThr register setting
these register values require recharacterization of the cell. for most applications is 95%. See the ICHGTerm register
DesignCap Register (18h) description for details. The FullSOCThr register is 70% at
The DesignCap register holds the expected capacity of power-up. Figure 25 is the FullSOCThr register format.
the cell. This value is used to determine age and health

MSB—Address 4Dh LSB—ADDRESS 4Dh

215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: 5.0µVh/RSENSE
(0.5mAh WHEN RSENSE = 0.010Ω)
Figure 23. QH Register Format (Output)

MSB—ADDRESS 18h LSB—ADDRESS 18h

215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: 5.0µVh/RSENSE
(0.5mAh WHEN RSENSE = 0.010Ω)
Figure 24. DesignCap Register Format (Input)

MSB—ADDRESS 18h LSB—ADDRESS 18h

27 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8

MSb LSb MSb LSb

2-8 UNITS: 0.0039%
20 UNITS: 1.0%
Figure 25. FullSOCThr Register Format (Input)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

End-of-Charge Detection and AverageCurrent registers, the device can reject false
The device detects the end of a charge cycle when end-of-charge events such as application load spikes or
the application current falls into the band set by the early charge-source removal. See the End-of-Charge
ICHGTerm register value. By monitoring both the Current Detection graph in the Typical Operating Characteristics
and Figure 26.

AVERAGE CURRENT
CURRENT
CHARGING

1.25 x ICHGTerm

0.125 x ICHGTerm
0mA

HIGH-CURRENT LOAD SPIKES DO NOT GENERATE END-OF-CHARGE

DISCHARGING DETECTION BECAUSE CURRENT AND AVERAGE CURRENT READINGS
DO NOT FALL INTO THE DETECTION AREA AT THE SAME TIME.

AVERAGE CURRENT
CHARGING CURRENT

1.25 x ICHGTerm

0.125 x ICHGTerm
0mA

DISCHARGING EARLY CHARGER REMOVAL DOES NOT GENERATE END-OF-CHARGE

DETECTION BECAUSE CURRENT AND AVERAGE CURRENT READINGS
DO NOT FALL INTO THE DETECTION AREA AT THE SAME TIME.

Figure 26. False End-of-Charge Events

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

When a proper end-of-charge event is detected, the device detects end of charge if all the following conditions
device learns a new FullCAP register value based on are met:
the RemCapREP output. If the old FullCAP value was • SOCVF > FullSOCThr
too high, it is adjusted downward after the last valid end-
of-charge detection. If the old FullCAP was too low, it is • AND ICHGTerm x 0.125 < Current < ICHGTerm x 1.25
adjusted upward to match RemCapREP. This prevents • AND ICHGTerm x 0.125 < AverageCurrent <
the calculated state of charge from ever reporting a value ICHGTerm x 1.25
greater than 100%. See Figure 27. Values are stored in µV. Multiply the termination current
ICHGTerm Register (1Eh) by the sense resistor to determine the desired register
value. This register has the same range and resolution
The ICHGTerm register allows the device to detect when
as the Current register. Figure 28 shows the ICHGTerm
a charge cycle of the cell has completed. The host should
register format. ICHGTerm defaults to 150mA (03C0h) at
set the ICHGTerm register value equal to the exact
power-up.
charge termination current used in the application. The

AVERAGE CURRENT
CURRENT
CHARGING

1.25 x ICHGTerm

0.125 x ICHGTerm
0mA

HIGH-CURRENT LOAD SPIKES DO NOT GENERATE END-OF-CHARGE

DISCHARGING DETECTION BECAUSE CURRENT AND AVERAGE CURRENT READINGS
DO NOT FALL INTO THE DETECTION AREA AT THE SAME. TIME

AVERAGE CURRENT
CHARGING CURRENT

1.25 x ICHGTerm

0.125 x ICHGTerm
0mA

DISCHARGING EARLY CHARGER REMOVAL DOES NOT GENERATE END-OF-CHARGE

DETECTION BECAUSE CURRENT AND AVERAGE CURRENT READINGS
DO NOT FALL INTO THE DETECTION AREA AT THE SAME TIME.

Figure 27. FullCAP Learning at End of Charge

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

V_empty Register (3Ah) Table 1. Cell Characterization Information

The V_empty register sets thresholds related to empty Registers
detection during operation. Figure 29 is the V_empty
REGISTER ADDRESS
register format.
Characterization Table (48 words) 80h to AFh
VE8:VE0—Empty Voltage. Sets the voltage level for
FullCap 10h
detecting empty. A 10mV resolution gives a 0 to 5.11V
range. This value is written to 3.12V at power-up. DesignCap 18h
ICHGTerm 1Eh
VR6:VR0—Recovery Voltage. Sets the voltage level for
FullCapNom 23h
clearing empty detection. Once the cell voltage rises
above this point, empty voltage detection is reenabled. A RCOMP0 38h
40mV resolution gives a 0 to 5.08V range. This value is lavg_empty 36h
written to 3.68V at power-up. TempCo 39h
QResidual 00 12h
Cell Characterization QResidual 10 22h
Information Registers QResidual 20 32h
Proper cell characterization is required to achieve accu- QResidual 30 42h
racy. The following registers (Table 1) hold information
that must be generated through a cell-characterization
procedure. Maxim provides a cell-characterization ser-
vice. Contact the factory for details.

MSB—ADDRESS 1Eh LSB—ADDRESS 1Eh

S 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

UNITS: 1.5625µV/RSENSE
Figure 28. ICHGTerm Register Format (Input)

MSB—ADDRESS 3Ah LSB—ADDRESS 3Ah

VE8 VE8 VE6 VE5 VE4 VE3 VE2 VE1 VE0 VR6 VR5 VR4 VR3 VR2 VR1 VR0

MSb LSb MSb LSb

VR0 UNITS: 40mV
VE0 UNITS: 10mV
Figure 29. V_empty Register Format (Input)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Algorithm Configuration Registers Mixing Period = 175.8ms x 2(5+MIX)

The following registers allow operation of the ModelGauge TEMP2:TEMP0—Sets the time constant for the
m3 algorithm to be adjusted for the application. It is recom- AverageTemperature register. The default POR value of
mended that the default values for these registers be used. 1h gives a time constant of 12min. The equation setting
the period is:
FilterCFG Register (29h)
AvergeTemperature time constant = 175.8ms x 2(8 + TEMP)
The FilterCFG register sets the averaging time period for
all A/D readings, for mixing OCV results and coulomb- X—Reserved. Do not modify.
count results. It is recommended that these values are not RelaxCFG Register (2Ah)
changed unless absolutely required by the application.
The RelaxCFG register defines how the device detects
Figure 30 shows the FilterCFG register format:
if the cell is in a relaxed state. See Figure 32. For a cell
CURR3:CURR0—Sets the time constant for the to be considered relaxed, current flow through the cell
AverageCurrent register. The default POR value of 4h must be kept at a minimum while the change in the cell’s
gives a time constant of 11.25 seconds. The equation voltage over time, dV/dt, shows little or no change. If
setting the period is: AverageCurrent remains below the Load threshold while
AverageCurrent time constant = 175.8ms x 2(2+CURR) VCELL changes less than the dV threshold over two
VOLT2:VOLT0—Sets the time constant for the consecutive periods of dt, the cell is considered relaxed.
AverageVCELL register. The default POR value of 2h Figure 31 shows the RelaxCFG register format:
gives a time constant of 45.0s. The equation setting the Load6:Load0—Sets the threshold, which the
period is: AverageCurrent register is compared against. The
AverageVCELL time constant = 175.8ms x 2(6+VOLT) AverageCurrent register must remain below this thresh-
old value for the cell to be considered unloaded. Load is
MIX3:MIX0—Sets the time constant for the mixing algo- an unsigned 7-bit value where 1 LSb = 50µV. The default
rithm. The default POR value of Dh gives a time constant value is 800µV.
of 12.8 hours. The equation setting the period is:

MSB—ADDRESS 29h LSB—ADDRESS 29h

TEMP TEMP TEMP CURR CURR CURR CURR

X X MIX3 MIX2 MIX1 MIX0 VOLT2 VOLT1 VOLT0
2 1 0 3 2 1 0

MSb LSb MSb LSb

Figure 30. FilterCFG Register Format (Input)

MSB—ADDRESS 2Ah LSB—ADDRESS 2Ah

Load6 Load5 Load4 Load3 Load2 Load1 Load0 dV4 dV3 dV2 dV1 dV0 dt3 dt2 dt1 dt0

MSb LSb MSb LSb

LOAD0 UNITS: 50µV/RSENSE
(5.0mAh WHEN RSENSE = 0.010Ω)
Figure 31. RelaxCFG Register Format (Input)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

dV4:dV0—Sets the threshold, which VCELL is compared LearnCFG Register (28h)

against. If the cell’s voltage changes by less than dV over The LearnCFG register controls all functions relating
two consecutive periods set by dt, the cell is considered to adaptation during operation. The LearnCFG register
relaxed; dV has a range of 0 to 40mV where 1 LSb = default values should not be changed unless specifically
1.25mV. The default value is 1.75mV. required by the application. Figure 33 is the LearnCFG
dt3:dt0—Sets the time period over which change in register format:
VCELL is compared against dV. If the cell’s voltage chang- 0—Bit must be written 0. Do not write 1.
es by less than dV over two consecutive periods set by
dt, the cell is considered relaxed. The default value is 6 1—Bit must be written 1. Do not write 0.
minutes. The comparison period is calculated as: Filt Empty—Empty Detect Filter. This bit selects whether
Relaxation Period = 2dt x 0.1758s empty is detected by a filtered or unfiltered voltage read-
ing. Setting this bit to 1 causes the empty detection algo-
rithm to use the AverageVCELL register. Setting this bit to
0 forces the empty detection algorithm to use the VCELL
register. This bit is written to 0 at power-up.

AVERAGE RELAXATION LOAD THRESHOLD

CURRENT

DISCHARGING

dV5 dV6
dV4
CELL dV3
VOLTAGE
dV2

48 TO 96
MINUTES
dt1 dt2 dt3 dt4 dt5 dt6

CELL UNLOADED FIRST SECOND CELL IS RELAXED LONG RELAXATION

(RELAXATION BEGINS) READING READING RelDt BIT SET RelDt2 BIT SET
BELOW BELOW CELL CAPACITY IS
dv/dt dV/dt LEARNED
THRESHOLD THRESHOLD

Figure 32. Cell Relaxation Detection

MSB—ADDRESS LSB—ADDRESS
Filt
0 0 1 0 0 1 1 0 0 LS2 LS1 LS0 0 1 EL
Empty
MSb LSb MSb LSb

Figure 33. LearnCFG Register Format (Input/Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

LS2:LS0—Learn Stage. See Figure 3 The Learn Stage 0 1 SOC Alerts are generated based on the SOCAV
value controls the influence of the VFG on the mixing register.
algorithm. At power-up, Learn Stage defaults to 0h, mak- 1 0 SOC Alerts are generated based on the SOCMIX
ing the voltage fuel gauge dominate. Learn Stage then register.
advances to 7h over the course of two full cell cycles to
make the coulomb counter dominate. Host software can 1 1 SOC Alerts are generated based on the SOCVF
write the Learn Stage value to 7h to advance to the final register.
stage at any time. Writing any value between 1h and 6h MR4:MR0—Mixing Rate. This value sets the strength of
is ignored. Learn Stage reflects the D5, D6, and D7 bits of the servo mixing rate after the final mixing state has been
the Cycles register. Update the Cycles register to advance reached (> 2.08 complete cycles). The units are MR0 =
to an intermediate state. For example, set Cycles = 160% 6.25µV, giving a range up to 19.375mA with a standard
to advance to Learn Stage 5. 0.010Ω sense resistor. Setting this value to 00000b
EL—Empty Learning. Set this bit to 1 to turn on the Empty disables servo mixing and the IC continues with time-
Learning feature. When enabled, the QResidual table is constant mixing indefinitely. The default setting is 18.75µV
automatically adjusted at each empty event to compen- or 1.875mA with a standard sense resistor.
sate for the age of battery. enBi1—Enable reset on battery-insertion detection. Set
this bit to 1 to force a reset of the fuel gauge whenever a
MiscCFG Register (2Bh) battery insertion is detected based on AIN pin monitoring.
The MiscCFG control register enables various other func- This bit is written to 1 at power-up.
tions of the device. The MiscCFG register default values
should not be changed unless specifically required by the FSTAT Register (3Dh)
application. Figure 34 is the MiscCFG register format: The FSTAT register is a read-only register that monitors
0—Bit must be written 0. Do not write 1. the status of the ModelGauge algorithm. Do not write
to this register location. Figure 35 is the FSTAT register
1—Bit must be written 1. Do not write 0. format:
X—Don’t Care. Bit may read 0 or 1. RelDt—Relaxed cell detection. This bit is set to a 1 when-
SACFG1:SACFG0—SOC Alert Config. SOC Alerts can ever the ModelGauge m3 algorithm detects that the cell is
be generated by monitoring any of the SOC registers as in a fully relaxed state. This bit is cleared to 0 whenever a
follows. SACFG defaults to 00 at power-up: current greater than the Load threshold is detected. See
0 0 SOC Alerts are generated based on the SOCREP Figure 32.
register.

MSB—ADDRESS 2Bh LSB—ADDRESS 2Bh

SACFG SACFG
0 0 X X enBi1 0 MR4 MR3 MR2 MR1 MR0 1 0 0
1 0
MSb LSb MSb LSb
MR0 UNITS: 6.25µV

Figure 34. MiscCFG Register Format (Input)

MSB—ADDRESS 3Dh LSB—ADDRESS 3Dh

X X X X X X RelDt EDet X RelDt2 X X X X X DNR

MSb LSb MSb LSb

Figure 35. FSTAT Register Format (Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

RelDt2—Long Relaxation. This bit is set to a 1 whenever registers calculate their values for the AtRate register
the ModelGauge m3 algorithm detects that the cell has theoretical current instead. The AtRate register holds a
been relaxed for a period of 48 to 96 minutes or longer. two’s-complement 16-bit value. Do not write 8000h to this
This bit is cleared to 0 whenever the cell is no longer in a register. Figure 36 shows the AtRate register format.
relaxed state. See Figure 32.
DNR—Data Not Ready. This bit is set to 1 at cell inser- Power-Up and Power-On Reset
tion and remains set until the output registers have been Any power-on reset (POR) of the device resets all mem-
updated. Afterwards, the IC clears this bit indicating the ory locations to their default POR value. This removes
fuel gauge calculations are now up to date. This takes any custom cell characterization and application data,
between 445ms and 1.845s depending on whether the IC affects ALRT interrupt and shutdown mode settings,
was in a powered state prior to the cell-insertion event. and resets all learned adjustments made by the fuel
gauge. To maintain accuracy of the fuel gauge and reset
EDet—Empty Detection. This bit is set to 1 when the IC
operation settings of the device, the host must reload
detects that the cell empty point has been reached. This
all application memory data and restore all learned fuel-
bit is reset to 0 when the cell voltage rises above the
gauge information. Note that the device may take up to
recovery threshold. See the V_empty register for details.
445ms to completely reset operation after a POR event
X—Don’t Care. This bit is undefined and can be logic 0 occurs. See Figure 37. Saved data should not be restored
or 1. until after this period is over. The following procedure is
recommended:
AtRate Register (04h)
The AtRate register allows host software to estimate 1) Read Status register. If POR = 0, exit.
remaining capacity, SOC, and time to empty for a theo- 2) Wait 600ms for POR operation to fully complete.
retical load current. Whenever the AtRate register is 3) Restore all application register values.
programmed to 0 or a positive value, the device uses A/D
measurements for determining the SOCAV, RemCapAV, 4) Restore fuel gauge learned-value information (see the
and TTE register values. Whenever the AtRate register Save and Restore Registers section).
is programmed to a negative value indicating a hypotheti- 5) Clear POR bit.
cal discharge current, the SOCAV, RemCapAV, and TTE

MSB—ADDRESS 04h LSB—ADDRESS 04h

S 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: 1.5625µV/RSENSE
X = DON’T CARE
Figure 36. AtRate Register Format (Input)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

VBATT

1.4s UNTIL NEXT TEMPERATURE READING

AIN
270ms

A/D
READINGS

175ms

OUTPUT
REGISTERS

CELL
VBATT > VDDMIN
INSERTION
A/D SOC VALUES
MEASUREMENTS UPDATED
COMPLETE

Figure 37. Power-Up Operation

Save and Restore Registers Table 2. Save and Restore Registers

The device is designed to operate outside the battery
REGISTER ADDRESS
pack and can therefore be exposed to power loss when in
FullCap 10h
the application. To prevent the loss of learned information
during power cycles, a save-and-restore procedure can Cycles 17h
be used to maintain register values in nonvolatile memory RCOMP0 38h
external to the device. The registers (Table 2) must be TempCo 39h
stored externally and then rewritten to the device after QResidual 00 12h
power-up to maintain a learned state of operation. QResidual 10 22h
Note that some registers are application outputs, some QResidual 20 32h
registers are for internal calculations, and some are char- QResidual 30 42h
acterization setup registers. Registers that are not internal dQacc 45h
are described in their own sections. These values should
dPacc 46h
be stored by the application at periodic intervals. Some
recommended back-up events are:
• End-of-charge Battery Removal and Insertion
• End-of-discharge The device detects when a cell has been removed or
inserted into the application. This allows the device to
• Prior to application entering shutdown state adjust to the new cell to maintain accuracy. The removal-
The host is responsible for loading the default character- detection feature also allows the device to quickly warn
ization data at first power-up of the device, and restoring the host processor through interrupt of impending power
the default characterization data plus learned information loss if enabled.
on subsequent power-up events.

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Detection occurs by monitoring the AIN pin voltage com- inserted cell. This process can take up to 1.845s (FTHRM
pared to the THRM pin. Whenever a cell is present, the = 0) or 620ms (FTHRM = 1) from time of insertion. Note
external resistor-divider network sets the voltage of AIN. that the device uses the cell voltage as a starting point
When the cell is removed, the remaining external resistor for the fuel gauge. If the cell voltage is not fully relaxed at
pulls AIN to the THRM pin voltage level. Whenever VAIN time of insertion, the fuel gauge begins with some initial
< VTHRM - VDETF, the device determines that a cell is error. See the Fuel-Gauge Learning and Age Support
present in the application. If VAIN > VTHRM - VDETR, the section for details. The host can disable this feature by
device determines that no cell is present at that time. clearing the enBi1 bit in the MiscCFG register.
Cell Insertion (IC Already Powered) The device can also be configured to alert the host when
cell insertion occurs. When Bei = 1 in the CONFIG regis-
The device is ready to detect a cell insertion if either the
ter, the device generates an interrupt on the ALRT pin at
ETHRM or FTHRM bits of the CONFIG register are set to
the start of the first temperature conversion after insertion.
enable the THRM pin output. See Figure 38. When a cell
This could take up to 1.4s to occur. This feature is useful
insertion is detected, the fuel gauge is reset and all fuel-
if the application uses more than one cell type and the IC
gauge outputs are updated to reflect the SOC of the newly
must be reconfigured at each insertion.

CELL INSERTION FROM POWERED STATE (FTHRM = 0)

VBATT

UP TO 1.4s
AIN

270ms
A/D
READINGS
175ms
OUTPUT
REGISTERS

CELL CELL A/D SOC VALUES

INSERTION INSERTION MEASUREMENTS UPDATED
DETECTED COMPLETE
CELL INSERTION FROM POWERED STATE (FTHRM = 1)

VBATT
UP TO
175ms
AIN

270ms
A/D
READINGS
175ms
OUTPUT
REGISTERS

CELL CELL A/D SOC VALUES

INSERTION INSERTION MEASUREMENTS UPDATED
DETECTED COMPLETE

Figure 38. Operation After Cell Insertion

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Cell Removal Modes of Operation

The device detects a cell removal if either the ETHRM or The device operates in one of two power modes: active
FTHRM bits of the CONFIG register are set to enable the and shutdown. While in active mode, the device operates
THRM pin output. Cell removal does not affect IC opera- as a high-precision battery monitor with temperature, volt-
tion. The device continues to update fuel-gauge outputs. age, auxiliary inputs, current, and accumulated current
The host should monitor the Br and Bst bits of the Status measurements acquired continuously, and the resulting
register to determine if the fuel-gauge outputs are valid. values updated in the measurement registers. READ and
The device can also be configured to alert the host when WRITE access is allowed only in active mode.
cell removal occurs. When Ber = 1 in the CONFIG regis- In shutdown mode, the LDO is disabled and all activ-
ter, the device generates an interrupt on the ALRT pin at ity stops, although volatile RAM contents remain pre-
the start of the first temperature conversion after removal. served. All A/D register and fuel-gauge output values
This could take up to 1.4s to occur. This feature is useful are maintained. There are several options for entering
if the application uses more than one cell type and the IC shutdown:
must be reconfigured at each insertion. Entering shutdown:
Fast Detection of Cell Removal • SHUTDOWN command—Write the CONFIG register
The device can be configured to quickly alert the host of SHDN = 1 through the I2C interface; wait for longer
impending power loss on cell removal. This fast response than the SHDNTIMER register value.
allows the system to quickly and gracefully hibernate to • Pack removal—Pack removal detection is valid for
prevent power loss during battery swap. When Ber = longer than the SHDNTIMER register value and the
1, FTHRM = 1, and ALRTp = 0 in the CONFIG register, CONFIG register AINSH = 1.
an interrupt on the ALRT pin is generated within 100µs
• I2C shutdown—I2C lines both persist low for longer
after VAIN becomes greater than VTHRM - VDETR. If fast
than the SHDNTIMER register value and the CONFIG
detection is used, it is recommended that all other IC
register I2CSH = 1.
interrupts are disabled to prevent the host from spending
time determining the cause of the interrupt. Fast detection • ALRT shutdown—Shutdown occurs when the ALRT
of cell removal has no affect on fuel-gauge operation, but line is externally driven low for longer than the
leaving the external resistor-divider active increases cur- SHDNTIMER register value (ALSH = 1 and ALRTp =
rent consumption of the application. See Figure 39. 0), or the ALRT line is externally driven high for longer
than the SHDNTIMER register value (ALSH = 1 and
ALRTp = 1). See the CONFIG Register (1Dh) section.

CELL REMOVAL
VBATT (Ber = 1, FTHRM = 1)

AIN

< 100µs
ALRT
OUTPUT

CELL REMOVAL INTERRUPT GENERATED

Figure 39. Fast Detection of Cell Removal

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

These shutdown entry modes are all programmable if the pin is configured to be logic-low when inactive, the
according to application. Shutdown events are gated external pullup increases current drain.
by the SHDNTIMER register, which allows a long delay The ALRTp bit in the CONFIG register sets the polarity of
between the shutdown event and the actual shutdown. the ALRT pin output. Alerts can be triggered by any of the
By behaving this way, the device takes the best reading following conditions:
of the relaxation voltage.
• Battery removal—(VAIN > VTHRM - VDETR) and bat-
Exiting shutdown: tery removal detection enabled (Ber = 1).
• I2C Wakeup—Any edge on SCL/SDA. • Battery insertion—(VAIN < VTHRM - VDETF) and bat-
• ALRT Wakeup—Any edge on ALRT line and (ALSH = tery insertion detection enabled (Bei = 1).
1 or I2CSH = ALSH = 0). • Over-/undervoltage—VALRT threshold violation
• Reset—IC is power cycled. (upper or lower) and alerts enabled (Aen = 1).
See the Status and Configuration section for detailed • Over-/undertemperature—TALRT threshold violation
descriptions of the SHDNTIMER and CONFIG registers. (upper or lower) and alerts enabled (Aen = 1).
The state of the device when returning to active mode • Over/under SOC—SALRT threshold violation (upper
differs depending on the triggering event. See Figure 40. or lower) and alerts enabled (Aen = 1).
Host software can monitor the POR and Bi status bits to To prevent false interrupts, the threshold registers should
determine what type of event has occurred. be initialized before setting the Aen bit. Alerts generated
by battery insertion or removal can only be reset by clear-
ALRT Function ing the corresponding bit in the Status register. Alerts
The Alert Threshold registers allow interrupts to be gener- generated by a threshold-level violation can be configured
ated by detecting a high or low voltage, a high or low tem- to be cleared only by software, or cleared automatically
perature, or a high or low SOC. Interrupts are generated when the threshold level is no longer violated. See the
on the ALRT pin open-drain output driver. An external pul- CONFIG (1Dh) register description for details of the alert
lup is required to generate a logic-high signal. Note that function configuration.

STATUS
EVENT ACTION
INDICATORS

FUEL GAUGE RESET

BATTERY INSERTION DETECTED MaxMinVoltage REGISTER (1Bh) RESET DNR = 1
(THRM COMPARATOR RECOGNIZES CHANGE Cycles REGISTER (17h) RESET Bi = 1
FROM REMOVAL TO INSERTED STATE) POR = UNCHANGED
ALL OTHER RAM VALUES MAINTAINED

ALL RAM VALUES MAINTAINED DNR = 0

WAKE FROM SHUTDOWN STATE
Bi = UNCHANGED
(I2C EDGE OR ALRT EDGE DETECTED) FUEL GAUGE RESTARTS FROM POINT MAINTAINED
WHEN SHUTDOWN WAS ENTERED POR = UNCHANGED

ALL RAM RESET TO DEFAULT VALUES DNR = 1

POWER-ON RESET
Bi = 0
(RECOVERY FROM POWER LOSS) FUEL GAUGE RESET POR = 1

Figure 40. Device State Based on Shutdown Exit Condition

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

VALRT Threshold Register (01h) operating range of the Temperature register. At power-up,
The VALRT Threshold register (Figure 41) sets upper the thresholds default to their maximum settings—7F80h
and lower limits that generate an ALRT pin interrupt (disabled). Figure 42 shows the TALRT Threshold register
if exceeded by the VCELL register value. The upper 8 format.
bits set the maximum value and the lower 8 bits set the SALRT Threshold Register (03h)
minimum value. Interrupt threshold limits are selectable
The SALRT Threshold register (Figure 43) sets upper
with 20mV resolution over the full operating range of the
and lower limits that generate an ALRT pin interrupt if
VCELL register. At power-up, the thresholds default to
exceeded by the selected SOCREP, SOCAV, SOCMIX,
their maximum settings—FF00h (disabled).
or SOCVF register values. See the SACFG bits in the
TALRT Threshold Register (02h) MiscCFG register description for details. The upper 8 bits
The TALRT Threshold register sets upper and lower limits set the maximum value and the lower 8 bits set the mini-
that generate an ALRT pin interrupt if exceeded by the mum value. Interrupt threshold limits are selectable with
Temperature register value. The upper 8 bits set the maxi- 1% resolution over the full operating range of the selected
mum value and the lower 8 bits set the minimum value. SOC register. At power-up, the thresholds default to their
Interrupt threshold limits are stored in two’s-complement maximum settings—FF00h (disabled).
format and are selectable with 1°C resolution over the full

MSB—ADDRESS 01h LSB—ADDRESS 01h

MAX7 MAX6 MAX5 MAX4 MAX3 MAX2 MAX1 MAX0 MIN7 MIN6 MIN5 MIN4 MIN3 MIN2 MIN1 MIN0

MSb LSb MSb LSb

UNITS: 20mV
Figure 41. VALRT Threshold Register Format (Input)

MSB—ADDRESS 02h LSB—ADDRESS 02h

S MAX6 MAX5 MAX4 MAX3 MAX2 MAX1 MAX0 S MIN6 MIN5 MIN4 MIN3 MIN2 MIN1 MIN0

MSb LSb MSb LSb

UNITS: 1°C
Figure 42. TALRT Threshold Register Format (Input)

MSB—ADDRESS 03h LSB—ADDRESS 03h

MAX7 MAX6 MAX5 MAX4 MAX3 MAX2 MAX1 MAX0 MIN7 MIN6 MIN5 MIN4 MIN3 MIN2 MIN1 MIN0

MSb LSb MSb LSb

UNITS: 1%
Figure 43. SALRT Threshold Register Format (Input)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Status and Configuration enable the thermistor bias switch. With a standard 10kΩ
The following registers control operation of the ALRT thermistor, this adds an additional ~200µA to the current
interrupt feature, control transition between active and drain of the circuit. This bit is set to 0 at power-up.
shutdown modes of operation, and provide status updates ETHRM—Enable Thermistor. Set to logic 1 to enable the
to the host processor. automatic THRM output bias and AIN measurement every
1.4s. This bit is set to 1 at power-up.
CONFIG Register (1Dh)
ALSH—ALRT Shutdown. Set to logic 1 and clear the Aen,
The CONFIG register holds all shutdown enable, alert
Ber, and Bei bits to configure the ALRT pin as an input to
enable, and temperature enable control bits. Writing a
control shutdown mode of the device. The device enters
bit location enables the corresponding function within a
shutdown if the ALRT pin is held active for longer than
175.8ms task period. Figure 44 shows the CONFIG reg-
timeout of the SHDNTIMER register. The device enters
ister format.
active mode immediately on the opposite edge of the
0—Bit must be written 0. Do not write 1. ALRT pin. When set to logic 0, the ALRT pin can function
Ber—Enable alert on battery removal. When Ber = 1, as an interrupt output. This bit is set to 0 at power-up.
a battery-removal condition, as detected by the AIN pin Note that if this bit is set to 1, the Bei, Ber, and Aen bits
voltage, triggers an alert. Set to 0 at power-up. Note that should be set to 0 to prevent an alert condition from caus-
if this bit is set to 1, the ALSH bit should be set to 0 to ing the device to enter shutdown mode.
prevent an alert condition from causing the device to enter I2CSH—I2C Shutdown. Set to logic 1 to force the device
shutdown mode. to enter shutdown mode if both SDA and SCL are held low
Bei—Enable alert on battery insertion. When Bei = 1, a for more than timeout of the SHDNTIMER register. This
battery-insertion condition, as detected by the AIN pin also configures the device to wake up on a rising edge
voltage, triggers an alert. Set to 0 at power-up. Note that of either SDA or SCL. Set to 1 at power-up. Note that if
if this bit is set to 1, the ALSH bit should be set to 0 to I2CSH and AINSH are both set to 0, the device wakes up
prevent an alert condition from causing the device to enter an edge of any of the SDA, SCL, or ALRT pins.
shutdown mode. SHDN—Shutdown. Write this bit to logic 1 to force a
Aen—Enable alert on fuel-gauge outputs. When Aen = shutdown of the device after timeout of the SHDNTIMER
1, violation of any of the alert threshold register values register. SHDN is reset to 0 at power-up and upon exiting
by temperature, voltage, or SOC triggers an alert. This bit shutdown mode.
affects the ALRT pin operation only. The Smx, Smn, Tmx, Tex—Temperature External. When set to 1, the fuel
Tmn, Vmx, and Vmn bits are not disabled. This bit is set gauge requires external temperature measurements to
to 0 at power-up. Note that if this bit is set to 1, the ALSH be written from the host. When set to 0, measurements
bit should be set to 0 to prevent an alert condition from on the AIN pin are converted to a temperature value and
causing the device to enter shutdown mode. stored in the Temperature register instead. Tex is set to 1
FTHRM—Force Thermistor Bias Switch. This allows the at power-up.
host to control the bias of the thermistor switch or enable Ten—Enable Temperature Channel. Set to 1 and set
fast detection of battery removal (see the Fast Detection ETHRM or FTHRM to 1 to enable measurements on the
of Cell Removal section). Set FTHRM = 1 to always AIN pin. Ten is set to 1 at power-up.

MSB—ADDRESS 1Dh LSB—ADDRESS 1Dh

0 SS TS VS ALRTp AINSH Ten Tex SHDN I2CSH ALSH ETHRM FTHRM Aen Bei Ber

MSb LSb MSb LSb

Figure 44. CONFIG Register Format (Input)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

AINSH—AIN Pin Shutdown. Set to 1 to enable device SS—SOC ALRT Sticky. When SS = 1, SOC alerts can
shutdown when the battery is removed. The IC enters only be cleared through software. When SS = 0, SOC
shutdown if the AIN pin remains high (AIN reading > alerts are cleared automatically when the threshold is no
VTHRM - VDETR) for longer than the timeout of the longer exceeded. SS is set to 0 at power-up.
SHDNTIMER register. This also configures the device to
wake up when AIN is pulled low on cell insertion. AINSH TIMER Register (3Eh)
is set to 0 at power-up. Note that if I2CSH and AINSH are This register holds timing information for the fuel gauge.
both set to 0, the device wakes up an edge of any of the It is available to the user for debug purposes. Figure 45
SDA, SCL, or ALRT pins. shows the TIMER register format.
ALRTp—ALRT Pin Polarity. Regardless if ALRT is being SHDNTIMER Register (3Fh)
used as an input or output, if ALRTp = 0, the ALRT pin The SHDNTIMER register sets the timeout period from
is active low; if ALRTp = 1, the ALRT pin is active high. when a shutdown event is detected until the device dis-
ALRTp must be set to 0 to enable fast detection of cell ables the LDO and enters low-power mode. Figure 46
removal. ALRTp is set to 0 at power-up. shows the SHDNTIMER register format.
VS—Voltage ALRT Sticky. When VS = 1, voltage alerts CTR12:CTR0—Shutdown Counter. This register counts
can only be cleared through software. When VS = 0, volt- the total amount of elapsed time since the shutdown trig-
age alerts are cleared automatically when the threshold is ger event. This counter value stops and resets to 0 when
no longer exceeded. VS is set to 0 at power-up. the shutdown timeout completes. The counter LSb is 1.4s.
TS—Temperature ALRT Sticky. When TS = 1, tempera- THR2:THR0—Sets the shutdown timeout period from a
ture alerts can only be cleared through software. When minimum of 45s to a maximum of 1.6h. The default POR
TS = 0, temperature alerts are cleared automatically value of 7h gives a shutdown delay of 1.6h. The equation
when the threshold is no longer exceeded. TS is set to 1 setting the period is:
at power-up.
Shutdown Timeout Period = 175.8ms x 2(8+THR)

MSB—Address 3Eh LSB—Address 3Eh

215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: 175.8ms
Figure 45. Timer Register Format (Output)

MSB—ADDRESS 3Fh LSB—ADDRESS 3Fh

THR2 THR1 THR0 CTR12 CTR11 CTR10 CTR9 CTR8 CTR7 CTR6 CTR5 CTR4 CTR3 CTR2 CTR1 CTR0

MSb LSb MSb LSb

Figure 46. SHDNTIMER Register Format (Input/Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Status Register (00h) SS in the CONFIG register and SACFG in the MiscCFG
The Status register maintains all flags related to alert register. Smn is set to 0 at power-up.
thresholds and battery insertion or removal. Figure 47 Bi—Battery Insertion. This bit is set to a 1 when the
shows the Status register format. device detects that a battery has been inserted into the
POR—Power-On Reset. This bit is set to a 1 when the system by monitoring the AIN pin. This bit must be cleared
device detects that a software or hardware POR event by system software to detect the next insertion event. Bi
has occurred. If the host detects that the POR bit has is set to 0 at power-up.
been set, the device should be reconfigured. See the Vmx—Maximum VALRT Threshold Exceeded. This bit is
Power-Up and Power-On Reset section. This bit must be set to a 1 whenever a VCELL register reading is above the
cleared by system software to detect the next POR event. maximum VALRT value. This bit may or may not need to be
POR is set to 1 at power-up. cleared by system software to detect the next event. See
Bst—Battery Status. This bit is set to 0 when a battery VS in the CONFIG register. Vmx is set to 0 at power-up.
is present in the system and set to 1 when the battery is Tmx—Maximum TALRT Threshold Exceeded. This bit is
removed. Bst is set to 0 at power-up. set to a 1 whenever a Temperature register reading is
Vmn—Minimum VALRT Threshold Exceeded. This bit is above the maximum TALRT value. This bit may or may
set to a 1 whenever a VCELL register reading is below the not need to be cleared by system software to detect the
minimum VALRT value. This bit may or may not need to be next event. See TS in the CONFIG register. Tmx is set to
cleared by system software to detect the next event. See 0 at power-up.
VS in the CONFIG register. Vmn is set to 0 at power-up. Smx—Maximum SOCALRT Threshold Exceeded. This
Tmn—Minimum TALRT Threshold Exceeded. This bit is bit is set to a 1 whenever SOC rises above the maximum
set to a 1 whenever a Temperature register reading is SOCALRT value. This bit may or may not need to be
below the minimum TALRT value. This bit may or may not cleared by system software to detect the next event. See
need to be cleared by system software to detect the next SS in the CONFIG register and SACFG in the MiscCFG
event. See TS in the CONFIG register. Tmn is set to 0 at register. Smx is set to 0 at power-up.
power-up. Br—Battery Removal. This bit is set to a 1 when the
Smn—Minimum SOCALRT Threshold Exceeded. This device detects that a battery has been removed from the
bit is set to a 1 whenever SOC falls below the minimum system. This bit must be cleared by system software to
SOCALRT value. This bit may or may not need to be detect the next removal event. Br is set to 0 at power-up.
cleared by system software to detect the next event. See X—Don’t Care. This bit is undefined and can be logic 0 or 1.

MSB—ADDRESS 00h LSB—ADDRESS 00h

Br Smx Tmx Vmx Bi Smn Tmn Vmn X X X X Bst X POR X

MSb LSb MSb LSb

Figure 47. Status Register Format (Input/Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Version Register (21h) range. The resulting data is placed in the VCELL register
The Version register holds a 16-bit value that indicates the every 175.8ms with an LSb value of 0.625mV. Voltages
version of the device. Figure 48 shows the Version register above the maximum register value are reported as the
format. maximum value. The lower 3 bits of the VCELL register are
don’t care bits. Figure 49 shows the VCELL register format.
Voltage Measurement AverageVCELL Register (19h)
While in active mode, the device periodically measures The AverageVCELL register reports an average of VCELL
the voltage between the VBATT and CSP pins over a 2.5V register readings over a configurable 12s to 24min time
to 4.98V range. The resulting data is placed in the VCELL period. See the FilterCFG register description for details on
register every 175.8ms with an LSb value of 0.625mV. setting the time filter. The resulting average is placed in the
Additionally, the device maintains a record of the minimum AverageVCELL register with an LSb value of 0.625mV. The
and maximum voltage measured by the device, and an lower 3 bits of the AverageVCELL register are don’t care
average voltage over a time period defined by the host. bits. The first VCELL register reading after device power-
Contents of the VCELL and AverageVCELL registers are up sets the starting point of the AverageVCELL filter. Note
indeterminate for the first conversion cycle time period that when a cell relaxation event is detected, the averag-
after device power-up. The last values of the VCELL and ing period for the AverageVCELL register changes to the
AverageVCELL registers are maintained when the device period defined by dt3:dt0 in the RelaxCFG register. The
enters shutdown mode. AverageVCELL register reverts back to its normal averag-
VCELL Register (09h) ing period when a charge or discharge current is detected.
While in active mode, the device periodically measures the Figure 50 shows the AverageVCELL register format.
voltage between the VBATT and CSP pins over a 0 to 4.98V

MSB—ADDRESS 21h LSB—ADDRESS 21h

V15 V14 V13 V12 V11 V10 V9 V8 V7 V6 V5 V4 V3 V2 V1 V0

MSb LSb MSb LSb

Figure 48. Version Register Format (Output)

MSB—ADDRESS 09h LSB—ADDRESS 09h

212 211 210 29 28 27 26 25 24 23 22 21 20 X X X

MSb LSb MSb LSb

UNITS: 0.625mV
Figure 49. VCELL Register Format (Output)

MSB—ADDRESS 19h LSB—ADDRESS 19h

212 211 210 29 28 27 26 25 24 23 22 21 20 X X X

MSb LSb MSb LSb

UNITS: 0.625mV
Figure 50. AverageVCELL Register Format (Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

MaxMinVCELL Register (1Bh) at the factory. However, if the application requires, Current
The MaxMinVCELL register maintains the maximum and Register readings can be adjusted by changing the COFF
minimum VCELL register values since the last fuel-gauge and CGAIN register settings.
reset or until reset by the host software. Each time the Additionally, the device maintains a record of the mini-
VCELL register updates, it is compared against these mum and maximum current measured by the device,
values. If VCELL is larger than the maximum or less than and an average current over a time period defined by
the minimum, the corresponding value is replaced with the host. Contents of the Current and AverageCurrent
the new reading. At power-up, the MaxVCELL value is set registers are 0000h until the first conversion cycle time
to 00h (the minimum) and the MinVCELL value is set to period after IC power-up. The last values of the Current
FFh (the maximum). Therefore, both values are changed and AverageCurrent registers are maintained when the IC
to the VCELL register reading after the first update. Host enters shutdown mode.
software can reset this register by writing it to its power-
up value of 00FFh. The maximum and minimum voltages Current Register (0Ah)
are each stored as 8-bit values with a 20mV resolution. While in active mode, the device periodically measures
Figure 51 shows the MaxMinVCELL register format. the voltage between the CSN and CSP pins over a
±51.2mV range. The resulting data is stored as a two’s-
Current Measurement complement value in the Current register every 175.8ms
While in active mode, the device periodically measures with an LSb value of 1.5625µV/RSENSE. Voltages outside
the voltage between the CSN and CSP pins over a the minimum and maximum register values are reported
±51.2mV range. The resulting data is stored as a signed as the minimum or maximum value. Figure 52 shows the
two’s-complement value in the Current register every Current register format and Table 3 shows the Sample
175.8ms with an LSb value of 1.5625µV/RSENSE. All Current register conversions.
devices are calibrated for current-measurement accuracy

MSB—ADDRESS 1Bh LSB—ADDRESS 1Bh

MAX7 MAX6 MAX5 MAX4 MAX3 MAX2 MAX1 MAX0 MIN7 MIN6 MIN5 MIN4 MIN3 MIN2 MIN1 MIN0

MSb LSb MSb LSb

UNITS: 20mV
Figure 51. MaxMinVCELL Register Format (Output)

Table 3. Sample Current Register Conversions

SENSE CGAIN CURRENT REGISTER CURRENT REGISTER MAXIMUM CELL
FUNCTION
RESISTOR (Ω) REGISTER RESOLUTION (µA) RANGE (A) CAPACITY (Ah)
Adjusting sense 0.005 4000h 312.50 ±10.24 32.768
resistor to meet
0.010 4000h 156.25 ±5.12 16.384
range and accuracy
requirements 0.020 4000h 78.125 ±2.56 8.192
0.005 7FFFh 156.25 ±5.12 16.384
Adjusting CGAIN to
0.010 4000h 156.25 ±5.12 16.384
keep units constant
0.020 2000h 156.25 ±5.12 16.384

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

AverageCurrent Register (0Bh) update. Host software can reset this register by writing it
The AverageCurrent register reports an average of cur- to its power-up value of 807Fh. The maximum and mini-
rent-register readings over a configurable 0.7s to 6.4h time mum voltages are each stored as two’s-complement 8-bit
period. See the FilterCFG register description for details on values with 0.4mV/RSENSE resolution. Figure 54 shows
setting the time filter. The resulting average is placed in the the MaxMinCurrent register format.
AverageCurrent register with an LSb value of 1.5625µV/ CGAIN Register (2Eh)/COFF Register (2Fh)
RSENSE. The first Current register reading after device
The CGAIN and COFF registers adjust the gain and offset
power-up sets the starting point of the AverageCurrent fil-
of the current measurement result. The current measure-
ter. The last value of the AverageCurrent register is main-
ment A/D is factory trimmed to data-sheet accuracy with-
tained when the device enters shutdown mode. Figure 53
out the need for the user to make further adjustments.
shows the AverageCurrent register format.
The default power-up settings for CGAIN and COFF
MaxMinCurrent Register (1Ch) apply no adjustments to the Current register reading. For
The MaxMinCurrent register maintains the maximum specific application requirements, the CGAIN and COFF
and minimum Current register values since the last fuel registers can be used to adjust readings as follows:
gauge reset or until cleared by host software. Each time Current Register = Current A/D Reading x
the Current register updates, it is compared against these (CGAIN Register/16384) + (2 x COFF Register)
values. If the reading is larger than the maximum or less For easiest software compatibility between systems,
than the minimum, the corresponding value is replaced configure CGAIN to keep current LSb resolution at
with the new reading. At power-up, the MaxCurrent value 0.15625mA. A minimum sense resistance of 0.005Ω is
is set to 80h (the minimum) and the MinCurrent value is required due to the maximum range of CGAIN. This pre-
set to 7Fh (the maximum). Therefore, both values are serves resolution of current readings and capacities.
changed to the Current register reading after the first

MSB—ADDRESS 0Ah LSB—ADDRESS 0Ah

S 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

UNITS: 1.5625µV/RSENSE
Figure 52. Current Register Format (Output)

MSB—ADDRESS 0Bh LSB—ADDRESS 0BH

S 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

UNITS: 1.5625µV/RSENSE
Figure 53. AverageCurrent Register Format (Output)

MSB—ADDRESS 1Ch LSB—ADDRESS 1Ch

S MAX6 MAX5 MAX4 MAX3 MAX2 MAX1 MAX0 S MIN6 MIN5 MIN4 MIN3 MIN2 MIN1 MIN0

MSb LSb MSb LSb

UNITS: 0.4mV/RSENSE
Figure 54. MaxMinCurrent Register Format (Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Both these registers are signed two’s complement. The FTHRM = 0, the active pullup is disabled when temperature
default values of 4000h for CGAIN and 0000h for COFF measurements are complete. This feature limits the time
preserve factory calibration and unit values (1.5625µV). the external resistor-divider network is active and lowers the
Figure 55 shows the CGAIN register format and Figure 56 total amount of energy used by the system.
shows the COFF register format. When Tex = 0 and Ten = 1 in the CONFIG register, the
device converts the AIN register to a temperature using
Temperature Measurement the temperature gain (TGAIN) and temperature offset
While in active mode and Ten = 1 in the CONFIG register, (TOFF) register values:
the device periodically measures the voltage between the
Temperature Register = (AIN Register x
AIN and CSP pins and compares the result to the voltage
TGAIN Register/16384) + (TOFF Register x 2)
of the THRM pin. The device stores the result, a ratiomet-
ric value from 0 to 100%. The resulting data is placed in The resulting value is stored in the Temperature register
the AIN register every 1.4s with an LSb of 0.0122%. each time the AIN register is updated. Additionally, the
device maintains a record of the minimum and maximum
Conversions are initiated by connecting the THRM and
temperature measured by the device, and an average
VTT pins internally. This enables the active pullup to
temperature over a time period defined by the host.
the external voltage-divider network. After the pullup is
Table 4 lists the recommended TGAIN and TOFF register
enabled, the device waits for a settling period of tPRE prior to
values for common NTC thermistors.
making measurements on the AIN pin. When ETHRM = 1,

MSB—ADDRESS 2Eh LSB—ADDRESS 2Eh

S 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 2-9 2-10 2-11 2-12 2-13 2-14

MSb LSb MSb LSb

20 UNITS: 0.0061%
Figure 55. CGAIN Register Format (Input)

MSB—ADDRESS 2FH LSB—ADDRESS 2Fh

S 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

UNITS: 3.125µV/RSENSE
Figure 56. COFF Register Format (Input)

Table 4. Recommended TGAIN and TOFF Register Values for Common NTC
Thermistors
THERMISTOR R25C (kΩ) BETA RECOMMENDED TGAIN RECOMMENDED TOFF
Semitec
10 3435 E3E1h 290Eh
103AT-2
Fenwal
10 3974 E71Ch 251Ah
197-103LAG-A01
TDK
10 4550 E989h 22B1h
Type F

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

When Tex = 1 in the CONFIG register, the device does not value. See the TGAIN and TOFF configuration registers.
update the Temperature register based on results from The resulting data is placed in the Temperature register
the AIN pin A/D. Instead, host software must periodically every 1.4s with a resolution of +0.0039°C. If an 8-bit
write the Temperature register with the known application temperature reading is desired, the host can read only
temperature to keep the fuel gauge accurate. the upper byte of the Temperature register with a resolu-
tion of +1.0°C. Contents of the Temperature register are
AIN Register (27h) indeterminate for the first conversion cycle time period
While in active mode and Ten = 1 in the CONFIG register, after device power-up. The last value of the Temperature
the device periodically measures the voltage between register is maintained when the device enters shutdown
pins AIN and CSP and compares the result to the voltage mode. Figure 58 shows the Temperature register format.
of the THRM pin. The device stores the result, a ratio-
metric value from 0 to 100%. The resulting data is placed AverageTemperature Register (16h)
in the AIN register every 1.4s with an LSb of 0.0122%. The AverageTemperature register reports an average of
Contents of the AIN register are indeterminate for the temperature register readings over a configurable 6min
first conversion cycle time period after device power-up. to 12h time period. See the FilterCFG register (29h)
The last value of the AIN register is maintained when the description for details on setting the time filter. The result-
device enters shutdown mode or if Ten = 0 in the CONFIG ing average is placed in the AverageTemperature register
register. Figure 57 shows the AIN register format. with an LSb value of 0.0039°C. The first Temperature
register reading after device power-up sets the starting
Temperature Register (08h) point of the AverageTemperature filter. The last value
While in active mode and Tex = 0 and Ten = 1 in the of the AverageTemperature register is maintained when
CONFIG register, the device converts the AIN regis- the device enters shutdown mode. Figure 59 shows the
ter value into a signed two’s-complement temperature AverageTemperature register format.

MSB—ADDRESS 27h LSB—ADDRESS 27h

2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 2-9 2-10 2-11 2-12 2-13 X X X

MSb LSb MSb LSb

2-13 UNITS: 0.0122%
Figure 57. AIN Register Format (Output)

MSB—ADDRESS 08h LSB—ADDRESS 08h

S 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8

MSb LSb MSb LSb

2-8 UNITS: +0.0039°C
20 UNITS: +1.0°C
Figure 58. Temperature Register Format (Input/Output)

MSB—ADDRESS 16h LSB—ADDRESS 16h

S 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8

MSb LSb MSb LSb

2-8 UNITS: +0.0039°C
20 UNITS: +1.0°C
Figure 59. AverageTemperature Register Format (Output)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

MaxMinTemperature Register (1Ah) Both these registers are signed two’s complement. These
The MaxMinTemperature register maintains the maximum registers allow for accurate temperature conversions
and minimum Temperature register values since the last when using a variety of external NTC thermistors (see
fuel-gauge reset or until cleared by host software. Each Table 4). Figure 61 shows the TGAIN register format and
time the Temperature register updates, it is compared Figure 62 shows the TOFF register format.
against these values. If the reading is larger than the
maximum or less than the minimum, the corresponding IC Memory Map
values are replaced with the new reading. At power-up, The device has a 256- word linear memory space containing
the MaxTemperature value is set to 80h (minimum) and all user-accessible registers. All registers are 16 bits wide
the MinTemperature value is set to 7Fh (maximum). and are read and written as 2-byte values. When the MSB of
Therefore, both values are changed to the Temperature a register is read, the MSB and LSB are latched simultane-
register reading after the first update. Host software can ously and held for the duration of the Read Data command.
reset this register by writing it to its power-up value of This prevents updates to the LSB during the read, ensur-
807Fh. The maximum and minimum temperatures are ing synchronization between the 2 register bytes.
each stored as two’s complement 8-bit values with 1°C All locations are volatile RAM and lose their data in the
resolution. Figure 60 shows the MaxMinTemperature event of power loss. Data is retained during device shut-
register format. down. Each register has a power-on-reset value that it
defaults to at power-up. Word addresses designated as
TGAIN Register (2Ch)/TOFF Register (2Dh)
reserved return an undetermined when read. These loca-
The TGAIN and TOFF registers adjust the gain and offset tions should not be written.
of the temperature measurement A/D on the AIN pin to
convert the result to a temperature value by the following
equation:
Temperature Register = (AIN Register x
TGAIN Register/16384) + (TOFF Register x 2)

MSB—ADDRESS 1Ah LSB—ADDRESS 1Ah

S MAX6 MAX5 MAX4 MAX3 MAX2 MAX1 MAX0 S MIN6 MIN5 MIN4 MIN3 MIN2 MIN1 MIN0

MSb LSb MSb LSb

UNITS: +1°C
Figure 60. MaxMinTemperature Register Format (Output)

MSB—ADDRESS 2Ch LSB—ADDRESS 2Ch

S 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20

MSb LSb MSb LSb

20 UNITS: +1°C/64
Figure 61. TGAIN Register Format (Input)

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

MSB—ADDRESS 2Dh LSB—ADDRESS 2Dh

S 27 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4 2-5 2-6 2-7

MSb LSb MSb LSb

2-7 UNITS: +0.0078°C
Figure 62. TOFF Register Format (Input)

Table 5. Device Memory Map

A/D ALERT/
MG m3 MG m3 MG m3
ADDRESS MG m3 MG m3 POR READ/
REGISTER NAME APP CELL SAVE AND
(HEX) CONFIG OUTPUT VALUE WRITE
MEASURE STATUS DATA DATA RESTORE
00h Status ü 0002h R/W
01h VALRT Threshold ü FF00h R/W
02h TALRT Threshold ü 7F80h R/W
03h SALRT Threshold ü FF00h R/W
04h AtRate ü 0000h R/W
05h RemCapREP ü 03E8h R
06h SOCREP ü 3200h R
07h Age ü 6400h R
08h Temperature ü 1600h R/W
09h VCELL ü B400h R
0Ah Current ü 0000h R
0Bh AverageCurrent ü 0000h R
0Ch RESERVED — —
0Dh SOCMIX ü 3200h R
0Eh SOCAV ü 3200h R
0Fh RemCapMIX ü 03E8h R
10h FullCAP ü ü 07D0h R/W
11h TTE ü 0000h R
12h QResidual 00 ü ü 1E2Fh R/W
13h FullSOCThr ü 4600h R/W
14h–15h RESERVED — —
16h AverageTemperature ü 1600h R
17h Cycles ü ü 0000h R/W
18h DesignCap ü 07D0h R/W
19h AverageVCELL ü B400h R
1Ah MaxMinTemperature ü 807Fh R/W
1Bh MaxMinVCELL ü 00FFh R/W
1Ch MaxMinCurrent ü 807Fh R/W
1Dh CONFIG ü 2350h R/W
1Eh ICHGTerm ü 03C0h R/W
1Fh RemCapAV ü 03E8h R
20h RESERVED — —
21h Version ü 00ACh R

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Table 5. Device Memory Map (continued)

A/D ALERT/ MG m3 MG m3 MG m3
ADDRESS MG m3 MG m3 POR READ/
REGISTER NAME APP CELL SAVE AND
(HEX) CONFIG OUTPUT VALUE WRITE
MEASURE STATUS DATA DATA RESTORE
22h QResidual 10 ü ü 1E00h R/W
23h FullCapNom ü ü 07D0h R/W
24h TempNom ü 1400h R/W
25h TempLim ü 2305h R/W
26h RESERVED — —
27h AIN ü 88D0h R
28h LearnCFG ü 2602h R/W
29h FilterCFG ü 4EA4h R/W
2Ah RelaxCFG ü 203Bh R/W
2Bh MiscCFG ü 0870h R/W
2Ch TGAIN ü E3E1h R/W
2Dh TOFF ü 290Eh R/W
2Eh CGAIN ü 4000h R/W
2Fh COFF ü 0000h R/W
30h–31h RESERVED — —
32h QResidual 20 ü ü 1306h R/W
33h–35h RESERVED — —
36h Iavg_empty ü 0780h R/W
37h FCTC ü 05E0h R/W
38h RCOMP0 ü ü 004Bh R/W
39h TempCo ü ü 262Bh R/W
3Ah V_empty ü 9C5Ch R/W
3Bh RESERVED — —
3Ch RESERVED — —
3Dh FSTAT ü 0001h R
3Eh TIMER ü 0000h R
3Fh SHDNTIMER ü E000h R/W
40h–41h RESERVED — —
42h QResidual 30 ü ü 0C00h R/W
43h–44h RESERVED — —
45h dQacc ü 007Dh R/W
46h dPacc ü 0C80h R/W
47h–4Ch RESERVED — —
4Dh QH ü 0000h R/W
4Eh–7Fh RESERVED — —
Characterization
80h–AFh ü N/A R/W
Table
B0h–FAh RESERVED — —
FBh VFOCV ü 0000h R
FCh–FEh RESERVED — —
FFh SOCVF ü 0000h R

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

2-Wire Bus System To generate an Acknowledge, the receiving device must

The 2-wire bus system supports operation as a slave-only pull SDA low before the rising edge of the acknowledge-
device in a single or multislave, and single or multimaster related clock pulse (ninth pulse) and keep it low until SCL
system. Up to 128 slave devices may share the bus by returns low. To generate a No Acknowledge (also called
uniquely setting the 7-bit slave address. The 2-wire inter- NACK), the receiver releases SDA before the rising edge
face consists of a serial data line (SDA) and serial clock of the acknowledge-related clock pulse and leaves SDA
line (SCL). SDA and SCL provide bidirectional communi- high until SCL returns low. Monitoring the acknowledge
cation between the IC (slave device) and a master device bits allows for detection of unsuccessful data transfers. An
at speeds up to 400kHz. The device’s SDA pin operates unsuccessful data transfer can occur if a receiving device
bidirectionally, that is, when the device receives data, is busy or if a system fault has occurred. In the event of
SDA operates as an input, and when the device returns an unsuccessful data transfer, the bus master should
data, SDA operates as an open-drain output, with the host reattempt communication.
system providing a resistive pullup. The device always Data Order
operates as a slave device, receiving and transmitting
A byte of data consists of 8 bits ordered most significant
data under the control of a master device. The master ini-
bit (MSb) first. The least significant bit (LSb) of each byte
tiates all transactions on the bus and generates the SCL
is followed by the Acknowledge bit. Device registers com-
signal, as well as the START and STOP bits, which begin
posed of multibyte values are ordered least significant
and end each transaction.
byte (LSB) first.
Bit Transfer Slave Address
One data bit is transferred during each SCL clock cycle,
A bus master initiates communication with a slave device
with the cycle defined by SCL transitioning low to high and
by issuing a START condition followed by a Slave Address
then high to low. The SDA logic level must remain stable
(SAddr) and the read/write (R/W) bit. When the bus is idle,
during the high period of the SCL clock pulse. Any change
the device continuously monitors for a START condition
in SDA when SCL is high is interpreted as a START or
followed by its slave address. When the device receives a
STOP control signal.
slave address that matches the value in its Programmable
Bus Idle Slave Address register, it responds with an Acknowledge
The bus is defined to be idle, or not busy, when no master bit during the clock period following the R/W bit. The 7-bit
device has control. Both SDA and SCL remain high when Programmable Slave Address register is factory pro-
the bus is idle. The STOP condition is the proper method grammed and cannot be changed by the user.
to return the bus to the idle state.
IC SLAVE ADDRESS 0110110
START and STOP Conditions
Read/Write Bit
The master initiates transactions with a START condition
(S), by forcing a high-to-low transition on SDA while SCL The R/W bit following the slave address determines the
is high. The master terminates a transaction with a STOP data direction of subsequent bytes in the transfer. R/W = 0
condition (P), a low-to-high transition on SDA while SCL selects a write transaction, with the following bytes being
is high. A Repeated START condition (Sr) can be used in written by the master to the slave. R/W = 1 selects a read
place of a STOP then START sequence to terminate one transaction, with the following bytes being read from the
transaction and begin another without returning the bus to slave by the master.
the idle state. In multimaster systems, a Repeated START Bus Timing
allows the master to retain control of the bus. The START
The device is compatible with any bus timing up to
and STOP conditions are the only bus activities in which
400kHz. No special configuration is required to operate
the SDA transitions when SCL is high.
at any speed.
Acknowledge Bits
2-Wire Command Protocols
Each byte of a data transfer is acknowledged with an
The command protocols involve several transaction for-
Acknowledge bit (A) or a No Acknowledge bit (N). Both the
mats. The simplest format consists of the master writing
master and the device slave generate acknowledge bits.
the START bit, slave address, R/W bit, and then monitor-

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

ing the acknowledge bit for presence of the device. More byte it requires with a No Acknowledge. This signals the
complex formats such as the write Data, read Data, and device that control of SDA is to remain with the master
Function command protocols write data, read data, and following the Acknowledge clock.
execute device-specific operations, respectively. All bytes
in each command format require the slave or the host sys- Write Data Protocol
tem to return an Acknowledge bit before continuing with The write Data protocol is used to write to register and
the next byte. Each function command definition outlines shadow RAM data to the IC starting at memory address
the required transaction format. Table 6 applies to the MAddr. Data0 represents the data written to MAddr,
transaction formats. Data1 represents the data written to MAddr + 1, and
DataN represents the last data byte written to MAddr +
Basic Transaction Formats N. The master indicates the end of a write transaction by
Write: S SAddr W A MAddr A DataL A DataH A P sending a STOP or Repeated START after receiving the
A write transaction transfers 1 or more data bytes to the last acknowledge bit:
device. The data transfer begins at the memory address S SAddr W A MAddr A DataL0 A DataH0 A DataL1
supplied in the MAddr byte. Control of the SDA signal is A DataH1 A … DataLN A DataHN A P
retained by the master throughout the transaction, except The MSb of the data to be stored at address MAddr can
for the Acknowledge cycles. be written immediately after the MAddr byte is acknowl-
Read: S SAddr W A MAddr A Sr SAddr R A DataL A DataH N P edged. Because the address is automatically incremented
after the least significant bit (LSb) of each byte is received
write Portion read Portion by the device, the MSb of the data at address MAddr + 1
can be written immediately after the acknowledgment of
A read transaction transfers one or more words from the data at address MAddr. If the bus master continues an
the IC. Read transactions are composed of two parts, a autoincremented write transaction beyond address FFh,
write portion followed by a read portion, and are therefore the device ignores the data. Data is also ignored on writes
inherently longer than a write transaction. The write por- to read-only addresses but not reserved addresses. Do
tion communicates the starting point for the read opera- not write to reserved address locations.
tion. The read portion follows immediately, beginning with
a Repeated START, Slave Address with R/W set to a 1. Read Data Protocol
Control of SDA is assumed by the IC beginning with the The read data protocol is used to read register and shad-
Slave Address Acknowledge cycle. Control of the SDA ow RAM data from the device starting at memory address
signal is retained by the device throughout the transaction, specified by MAddr. Data0 represents the data byte in
except for the Acknowledge cycles. The master indicates memory location MAddr, Data1 represents the data from
the end of a read transaction by responding to the last MAddr + 1, and DataN represents the last byte read by
the master:
Table 6. 2-Wire Protocol Key
S SAddr W A MAddr A Sr SAddr R A DataL0 A
KEY DESCRIPTION KEY DESCRIPTION DataH0 A DataL1 A DataH1 A …DataLN N DataHN N P
S START bit Sr Repeated START
Data is returned beginning with the most significant bit
Slave Address (MSb) of the data in MAddr. Because the address is
SAddr W R/W bit = 0
(7 bit)
automatically incremented after the LSb of each byte
FCmd
Function Command
R R/W bit = 1 is returned, the MSb of the data at address MAddr +1
byte is available to the host system immediately after the
Memory Address acknowledgment of the data at address MAddr. If the bus
MAddr P STOP bit
byte master continues to read beyond address FFh, the device
Data byte written by Data byte returned outputs data values of FFh. Addresses labeled Reserved
Data Data
Master by Slave in the memory map return undefined data. The bus mas-
Acknowledge bit— Acknowledge bit— ter terminates the read transaction at any byte boundary
A A by issuing a No Acknowledge followed by a STOP or
Master Slave
Repeated START.
No Acknowledge— No Acknowledge—
N N
Master Slave

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Ordering Information Package Information

PART TEMP RANGE PIN-PACKAGE For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
MAX17047G+ -40°C to +85°C 10 TDFN-EP* that a “+”, “#”, or “-” in the package code indicates RoHS status
MAX17047G+T10 -40°C to +85°C 10 TDFN-EP* only. Package drawings may show a different suffix character, but
MAX17050X+ -40°C to +85°C 9 WLP the drawing pertains to the package regardless of RoHS status.
MAX17050X+T10 -40°C to +85°C 9 WLP
LAND
+Denotes a lead(Pb)-free/RoHS-compliant package. PACKAGE PACKAGE OUTLINE
PATTERN
T = Tape and reel. TYPE CODE NO.
NO.
*EP = Exposed pad.
10 TDFN-EP T1033+1 21-0137 90-0003
Refer to
9 WLP W91G1+1 21-0755 Application
Note 1891

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MAX17047/MAX17050 1-Cell Fuel Gauge with ModelGauge m3

Revision History
REVISION REVISION PAGES
DESCRIPTION
NUMBER DATE CHANGED
0 9/11 Initial release —
Added MAX17050 and added multicell application circuit information, updated
1, 7, 8, 11–41,
1 12/11 schematics, Ordering Information, layout guideline, and Thermistor Sharing Circuit
43, 45
section
Corrected error on TDFN layout diagram in Figure 8 and corrected error of hard-coded
2 4/12 14, 25, 43
bits of the LearnCFG register
Corrected error with FullSOCThr register formatting in Figure 25; corrected error with
3 8/12 TOFF register formatting in Figure 62; added clarification that ALRTp bit must equal 0 20, 30, 34, 42
to enable fast detection of cell removal
4 12/14 Updated Figure 6 12
Updated the Fuel-Gauge Learning and Age Support and LearnCFG Register (28h)
5 4/15 11, 12, 25, 26
sections and Figure 33
6 3/16 Corrected WLP package outline number 46
7 11/16 Updated front page title and applications 1

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.

Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2016 Maxim Integrated Products, Inc. │ 47