Electronics notes (Digital) (pm something3009 on discord if there are any errors)

Chapter Content Examples

Chapter 10: Analogue quantities vary continuously Analogue signals

Introduction to while Digital quantities vary in steps
Digital Electronics
How to differentiate between analogue
and digital signals:
Analogue signals: Has continuously
varying Voltage levels
Digital signals: Only has 2 distinct voltage
levels (HIGH or LOW only)
(HIGH refers to Logic 1 state (+5V), LOW
refers to Logic 0 state (0V)) Digital signals

Logic Switches Pull-Up switch when closed:

Pull-Up switch:

Pull-Up switch when opened:

(Pull-Up resistor with a switch below)

When switch is closed, output is Logic 0
(0V)
When switch is open, output is Logic 1
(+5V)
Pull-Down switch: Pull-Down switch when closed:

Pull-Down switch when opened:

(Pull-Down resistor with a switch above)

When switch is closed, output is Logic 0
(0V)
When switch is open, output is Logic 1
(+5V)

* Resistor in Pull-Up/Pull-Down switch are

usually 10㏀

Resistor is needed if not the logic switch

will produce an ‘floating’ output when
open (Bad as it can pick up unwanted
electrical signals and take on Logic 0 or
Logic 1 in a unpredictable way)

Advantages/Disadvantages of using
Digital systems over Analogue systems

Advantages:
- Less affected by electrical
interference (due to fairly large
difference between voltage levels),
can tell Logic 1 apart from Logic 0
as long as it is not too badly
distorted
- Signals can be restored to original
condition via repeaters (can travel
over long distances and is more
reliable)
- Easier to design due to only
having 2 voltage levels
- Easier to store information (as it is
stored as a series of 0s and 1s)
 - Large number of digital
components can be squeezed into
small area of semiconductor
material (save costs)

Disadvantages:
- Additional steps are needed to
convert between Analogue and
Digital signals (many quantities in
our daily lives such as temperature
and light intensity are analogue
quantities)

How to represent and display values in Converting between Binary,

Digital Form Decimal systems and BCD

Decimal System: Binary to Decimal:

Made up of 10 digits (0-9) 11002
Position of a digit determines its place 3 2 1 3
value = (1x2 )+(1x2 )+(0x2 )+(0x2 )
=8+4+0+0
Binary System: = 1210
Made up of 2 digits (bits) (0 and 1)
Position of a bit determines its place Decimal to Binary:
value 1210
Highest place value - Most Significant Bit
(MSB) 12 ÷ 2 = 6R0 (LSB)
Lowest place value - Least Significant Bit 6 ÷ 2 = 3R0
(LSB) 3 ÷ 2 = 1R1
12 ÷ 2 = 6R1 (MSB)
* you can press calculator to skip the 1210 = 11002
calculation parts in converting decimal to
binary and Vice Versa Decimal to BCD:
38710 = 0011 1000 0111 𝐵𝐶𝐷
Binary-coded decimal (BCD):
BCD to Decimal:
Uses groups of 4-bit binary code to
represent the digits of a decimal number 0101 0110 1001 𝐵𝐶𝐷
= 56910
(Coding system)
Decimal number BCD equivalent

4 0100

98 1001 1000

163 0001 0110 0011

 Advantages/Disadvantages of converting
between Decimal and BCD
Advantages:
- More straightforward to convert
larger decimal number to BCD
than to Binary
- Useful for displaying decimal
numbers

Disadvantages: BCD to 7-Segment code Truth

- More bits are needed to store the Table
same number in Binary

BCD to 7-Segment Display:

To display binary numbers in decimal
form
Insert BCD input into 7-segment decoder
to convert BCD to a 7-segment code

Chapter 11: Basic Logic Gates Truth table of a NOT Gate

Logic Gates Components with 1 or more inputs and 1 A X
output of either Logic 1 or Logic 0
depending on the Logic gate 0 1

Truth Table 1 0
A way to show the outputs of a Logic gate
for all possible input combinations
(Input combinations are arranged in
binary from smallest to biggest)

Common Logic Gates

NOT Gate

Boolean Expression: 𝑋 = 𝐴
(Inverts the Input)
Truth Table
A X

0 1

1 0
AND Gate

Boolean Expression: 𝑋 = 𝐴 · 𝐵
(Produces a Logic 1 output only if both
inputs are Logic 1)
Truth Table
A B X

0 0 0

0 1 0

1 0 0

1 1 1

OR Gate

Boolean Expression: 𝑋 = 𝐴 + 𝐵
(Produces a Logic 1 output when either
or both inputs are Logic 1)
Truth Table
A B X

0 0 0

0 1 1

1 0 1

1 1 1

NAND Gate (Universal Gate)

(AND + NOT gate)

Boolean Expression: 𝑋 = 𝐴 · 𝐵
(Opposite of AND gate; Produces Logic 1
if only one input is Logic 1 or both inputs
are Logic 0)
Truth Table
A B X

0 0 1

0 1 1

1 0 1

1 1 0

NOR Gate (Universal Gate)

(OR + NOT gate)

Boolean Expression: 𝑋 = 𝐴 + 𝐵
(Opposite of OR gate; Produces Logic 1
only if both inputs are Logic 0)
Truth Table:
A B X

0 0 1

0 1 0

1 0 0

1 1 0

Universal Gates: Gates that can be used

to make any other type of gates
(NAND, NOR)

NOT, AND, OR using NAND gates:

 NOT, AND. OR using NOR gates:

Dual-In-Line (DIL) ICs Key DIL ICs:

Identifying pins: 74LS00 - 2 input NAND gate
74LS02 - 2 input NOR gate
74LS04 - NOT gate
74LS08 - 2 input AND gate
74LS11 - 3 input AND gate
74LS32 - 2 input OR gate
74LS47 - BCD to 7-Segment
decoder
74LS390 - Decade Counter
NE555 - 555 Timer
LM311 - Voltage Comparator

Pin 1 - Beside Dot and Notch

* Refer to Datasheet for DIL IC
connections, ratings and characteristics

Chapter 12: Describing a Logic Circuit When A = 1. B = 1, X = 1

Combinational When A = 0, C = 1, X = 1
Logic Circuits To create Truth Table: Truth Table:
1. Determine number of Rows
A B C X
(Number of possible input
combinations) and Columns 0 0 0 0
(Number of inputs, intermediate
signals and outputs) 0 0 1 1
2. Draw and fill up the inputs of the
Truth Table 0 1 0 0
3. Work out the intermediate signals
and outputs 0 1 1 1

1 0 0 0
Boolean Expression
To express the outputs of an Truth Table 1 0 1 0
(sum-of-product expression) (SOP)
· - Product (multiply) 1 1 0 1
+ - Sum (add up)
1 1 1 1
𝑋 - Inverse
 SOP expression:
𝑋 =𝐴·𝐵· 𝐶 +𝐴· 𝐵 · 𝐶
+ 𝐴 · 𝐵 ·𝐶+ 𝐴 · 𝐵 · 𝐶

Converting Boolean expression into Logic 𝑋 = 𝐴 · 𝐶 + 𝐵 + 𝐴 · 𝐵 · 𝐶

Circuit

Step 1: Draw a Logic circuit for each AND

term
Step 2: Connect the outputs to the inputs
of an OR Gate

Karnaugh Map (K-map) 𝑋 =𝐴· 𝐵 · 𝐶 + 𝐴 ·𝐵· 𝐶

To simplify SOP expressions to reduce + 𝐴· 𝐵· 𝐶
number of gates required, saving costs
and reducing errors A 3-input K-Map will be used
Step 1. Prepare K-Map
2-Input:

Simplified SOP expression:

𝑋 =𝐵+ 𝐴 ·𝐶
3-Input:

(p.s. K-Map is easier in my

opinion)

(Note that the numbers for BC are

arranged as 00 01 11 10)

Step 2: Input information into K-Map

Step 3: Loop the 1s in the K-Map

- Loop in groups of 2 or 4 or
individually
- Only loop 1s that are adjacent to
each other
- First and Last column are
considered adjacent to each other

Step 4: Obtain the simplified Boolean

expression by identifying the common
inputs
Boolean Algebra 𝑋 =𝐴· 𝐵 · 𝐶 + 𝐴 ·𝐵· 𝐶
To simplify SOP expressions to reduce + 𝐴· 𝐵· 𝐶
number of gates required, saving costs
and reducing errors Using Boolean Algebra,
Boolean Laws
* Laws given in Datasheet

One Variable:
Law Explanation
(Same answer as K-Map)
𝐴= 𝐴 If 𝐴 = 0, 0 = 1 = 0
and vice versa

𝐴+0 =𝐴 Adding a 0

𝐴+1 =1 Answer will always

become 1

𝐴+𝐴 =𝐴 If A = 1, result is 1
If A = 0, result is 0

𝐴 +𝐴= 1 Either 𝐴 or 𝐴 = 1

𝐴·0 =0 Multiply by 0

𝐴·1 =𝐴 Multiply by 1

𝐴·𝐴 =𝐴 If A = 1, result is 1
If A = 0, result is 0

𝐴 ·𝐴= 0 Either 𝐴 or 𝐴 = 0, hence

multiply by 0

Two or more variables:

Law Type

𝐴+𝐵 =𝐵 + 𝐴 OR commutative
law

𝐴·𝐵 =𝐵 · 𝐴 AND commutative

law

𝐴 + (𝐵 + 𝐶) OR associative law
= (𝐴 + 𝐵) + 𝐶

𝐴 · (𝐵 · 𝐶) AND associative
= (𝐴 · 𝐵) · 𝐶 law
 𝐴 · (𝐵 + 𝐶) Distributive Laws
= 𝐴· 𝐵+ 𝐴 · 𝐶

(𝐴 + 𝐵) · (𝐶 + 𝐷)
= 𝐴· 𝐶+ 𝐴 · 𝐷
+ 𝐵· 𝐶+ 𝐵 · 𝐷

𝐴+𝐴 ·𝐵 = 𝐴 Absorption Laws

𝐴 · (𝐴 + 𝐵) = 𝐴

𝐴 +𝐴· 𝐵
= 𝐴+ 𝐵

𝐴 · (𝐴 + 𝐵)
= 𝐴· 𝐵

𝐴 · 𝐵=𝐴+𝐵 De Morgan’s
𝐴 + 𝐵=𝐴·𝐵 Theorem just do K-Map its easier trust
me

Using Combinational Logic to solve Repeat the above examples

real-life problems using the context given within
the question
Step 1: Create Truth Table and create an
unsimplified boolean expression * ONLY PICK ONE METHOD
WHEN SIMPLIFYING SOP
Step 2: Use K-Map OR Boolean Algebra
to get a simplified boolean expression

Step 3: Create the circuit using the

simplified boolean expression

Chapter 13: An S-R Latch is a device that can store a

Set-Reset Logic state (1 or 0)
Latches
S-R Latch symbol
S-R Latch using NOR gates

* 𝑄 is above, Q is below (Printing errors

made it difficult to identify)

Truth Table
S R Q 𝑄

0 0 No change

0 1 0 1

1 0 1 0

1 1 Invalid

Condition 1:
When S = 1 and R = 0, the latch is set
Outputs Q = 1, 𝑄 = 0
(When S = 1, Q = 0, and when Q and R =
0, 𝑄 = 0)

Condition 2:
When S = 0 and R = 1, the latch is reset
Outputs Q = 0, 𝑄 = 1
(When R = 1, 𝑄 = 0, and when 𝑄 and S =
0, Q = 1)
Condition 3
When S and R = 0, the latch remains at
the same logic state it was before it
entered this condition
(When Q = 1 and 𝑄 = 0, or Q = 0 and
𝑄 = 0, since S and R = 0, they remain the
same)

Condition 4
When S and R = 1, Q and 𝑄 = 0
(As an input of 1 into a NOR gate will
result in 0, both NOR gates produce an
output of 0 since S and R = 1, hence this
state is invalid)

Timing Diagram
Used to show how the output of a digital
system changes with time
At 𝑡0, S = 1 and R = 0, Q = 1
(Condition 1)

At 𝑡1, S = 0 and R = 0, Q remains at 1

(Condition 3)
At 𝑡2, S = 0 and R = 1, Q = 0
(Condition 2)
At 𝑡3, S = 0 and R = 0, Q remains at 0
(Condition 3)

Applications for S-R Latch Intruder Alarm System without

- Systems that require an S-R Latch
momentary occurrence to be
converted into an constant output
(eg Intruder Alarm System, Traffic
Light, ect)

(The intruder can close the

window to disable the alarm
system)

Intruder Alarm System with S-R

Latch

(The alarm system can only be

reset via another switch,
preferably hidden of course)
Debounced switch using S-R Latch For rising/falling edge input
digital systems, if a normal
Contact Bounce switch is used, the count value
When a Mechanical switch (SPST, SPDT, may increase by multiple times
ect) is opened or closed, the contacts will instead of once
connect and disconnect multiple times
before having a firm connection (multiple
input signals are sent, which affects the Applications: 555 Timer
accuracy of the system) (Astable) input, 74LS390
Decade Counter (1CKA/2CKA)
input, ect

A debounced switch can produce a single

rising or falling edge signal, which is more
suitable
How to build a Debounced switch:

(1 Pull-Down resistor at each input S and

R connected to a SPDT switch)

How it works:
- When the switch is at B, S is pulled
down to Logic 0 while R is pulled
down to Logic 1. Q = 0
- When the switch is moving from B
to A, R alternates between Logic
1 and Logic 0. Q remains at 0
(As R = 0 and S = 0, there is no
change in Q)
- When the switch reaches A, S
alternates between Logic 1 and
Logic 0. Q becomes 1 (When S =
1 and R = 0, Q = 1)
Chapter 14: Voltage Comparator Application in a automatic home
Voltage lighting system
Comparators,
Timers and
Counters

Input Signal - LDR in Voltage

It compares between 2 analogue inputs ( Divider configuration
𝑉𝑖𝑛+ and 𝑉𝑖𝑛−) to produce a digital output
(𝑉𝑜𝑢𝑡)
If 𝑉𝑖𝑛+ > 𝑉𝑖𝑛−, 𝑉𝑜𝑢𝑡 will be HIGH
If 𝑉𝑖𝑛+ < 𝑉𝑖𝑛−, 𝑉𝑜𝑢𝑡 will be HIGH

LM311 Voltage Comparator IC

Reference Voltage - Voltage

Divider OR Potentiometer

Pin Name How to connect

1 GND Connect to ground

(0V)

2 IN+ Connect to
voltages to be
3 IN- compared
(in this example a potentiometer
4 𝑉𝐸𝐸 Connect to ground
is used producing a reference
(0V)
voltage of 1V)
5 Balance Connect together
(Pins not used) When it is dark and 𝑉1 is less
6 Balance/ than 1V, 𝑉𝑖𝑛+ > 𝑉𝑖𝑛− and 𝑉𝑜𝑢𝑡
Strobe
will be HIGH
7 Output Connect to 𝑉𝑐𝑐
When it is bright and 𝑉1 is more
using Pull-Up
resistor (10㏀) than 1V, 𝑉𝑖𝑛+ < 𝑉𝑖𝑛− and 𝑉𝑜𝑢𝑡
will be LOW
8 𝑉𝑐𝑐 Connect to positive
voltage
 How to connect LM311 Voltage
Comparator IC

555 Timer IC

Pin Name Function

1 GND Connect to ground

(0V)

2 Trigger Causes Pin 3 to go

HIGH and start the
timing cycle when it
1
reaches 3 𝑉𝐶𝐶

3 Output Produces a digital

output

4 Reset Resets timing

interval when
connected to GND

5 Control Controls Trigger

and Threshold level
(Not used; connect
with 10nF capacitor
to GND

6 Threshold Monitors external

voltage across
external capacitor
When voltage
2
reaches 3 𝑉𝐶𝐶,
 timing cycle ends
and Pin 3 goes
LOW

7 Discharge Connects to GND

and discharges
external capacitor
when output is
LOW, acts as an
open circuit when
output is HIGH

8 𝑉𝑐𝑐 Connect to positive

voltage (between
5V to 15V)

Pin layout diagram

The 555 Timer IC can function as a

Monostable or an Astable Multivibrator

Difference between both modes

Monostable Astable

When triggered, Creates a

create a single rectangular
rectangular pulse waveform without
of predetermined the need of a
width trigger

Pulse width is Period is

determined by determined by
external capacitor external capacitor
and resistor and 2 resistors
* Both Monostable and Astable formulas
will be given in Datasheet
Monostable Multivibrator Applications: Timers,
Timing device that produces a singular Debounced switch, ect
pulse of specific width (in terms of time)
The signal used to activate the
multivibrator is known as a Trigger

Configuration

- Pin 2 is connected to a Pull-Up

resistor with pushbutton switch
- Pins 6 and 7 is connected to an
external RC circuit

Function
1. At first, switch S is open which Pin 2 Voltage
causes Pin 2 to be pulled up to 5V
1
2. As Pin 2 is more than 3 𝑉𝐶𝐶, Pin 3
(Output) is LOW. Pin 7 (Discharge) is
connected to GND which completely
discharges 𝐶1
3. When S is closed, Pin 2 is pulled Pin 6/7 Voltage
down to 0V
1
4. Since Pin 2 is less than 3 𝑉𝐶𝐶, Pin 3
goes HIGH and the timing cycle
starts. Pin 7 acts as an open circuit
5. 𝐶1 charges towards 𝑉𝐶𝐶 Pin 3 Voltage
2
6. When 𝐶1 reaches 3
𝑉𝐶𝐶, it is detected
by Pin 6 (Threshold)
7. Pin 3 goes LOW and timing cycle
stops
Pulse width of output (Time Constant)
𝑇 = 1. 1𝑅𝐶
T - Time constant in seconds (s)
R - Resistance (Ω)
C - Capacitance (F)

Astable Multivibrator Applications: Flashing LED

Timing device that produces a continuous lights, Logic clocks, ect
stream of pulses (rectangular waveforms)

Configuration

- Pin 7 connected between 𝑅1 and

𝑅2 , Pin 2 and 6 connected
between 𝑅2 and 𝐶1
- 𝑅1 , 𝑅2 and 𝐶1 forms an external
RC circuit
Voltage at Pin 2 and 6
Function (Assuming 𝐶1 is uncharged)
1. Assume 𝐶1 is not charged and Pin 2
is 0V
1
2. As Pin 2 is less than 3
𝑉𝐶𝐶, Pin 3
(Output) is HIGH and causes Pin 7 to
act as an open circuit. 𝐶1 charges to
𝑉𝐶𝐶
3. 𝐶1 charges till Pin 6 (Threshold) Voltage at Pin 3
2
reaches 3
𝑉𝐶𝐶
4. Pin 3 goes LOW and Pin 7 is
connected to GND, causing 𝐶1 to
discharge
1
5. 𝐶1 discharges to 3
𝑉𝐶𝐶
6. Pin 3 goes HIGH and the process
repeats itself (Repeat 1 to 5)

Duration of signal at HIGH state is known

as 𝑡𝑜𝑛, while the duration of signal at
LOW state is known as 𝑡𝑜𝑓𝑓.
Period of a complete cycle 𝑇 = 𝑡𝑜𝑛 + 𝑡𝑜𝑓𝑓
(𝑅1+2𝑅2)𝐶1
𝑇= 1.44
𝑡𝑜𝑛 = 0. 7(𝑅1 + 𝑅2)𝐶1
𝑡𝑜𝑓𝑓 = 0. 7𝑅2𝐶1
T - Period in seconds (s)
R - Resistance (Ω)
C - Capacitance (F)
𝑡𝑜𝑛 - Duration when output is HIGH
𝑡𝑜𝑓𝑓 - Duration when output is LOW

* Duty cycle and frequency of pulses:

𝑡𝑜𝑛
Duty cycle = 𝑇
× 100%
1
𝑓= 𝑇
f - Frequency (Hz)
T - Period (s)
𝑡𝑜𝑛 - Duration when output is HIGH

74LS390 Decade Counter IC

Pin Name Function

16 𝑉𝑐𝑐 Connect to 5V
power source

8 GND Connect to ground

(0V)
 1, 15 1CKA, Clock A input pins
2CKA for counter 1 and 2
respectively.
Increases count
value by one for
every falling edge

2, 14 1CLR, Clear input pins for

2CLR counter 1 and 2
respectively.
Resets the count
value to zero when
it is HIGH.

4, 12 1CKB, Clock B input pins

2CKB for counter 1 and 2
respectively.

7, 6, 1𝑄𝐷, 1𝑄𝐶, Output pins for

5, 3 1𝑄𝐵, 1𝑄𝐴 counter 1, to
represent count
value as BCD code
where 1𝑄𝐷 is the
most significant bit
(MSB) while 1𝑄𝐴 is
the least significant
bit (LSB)

9, 10, 2𝑄𝐷, 2𝑄𝐶, Output pins for

11, 13 2𝑄𝐵, 2𝑄𝐴 counter 2, to
represent count
value as BCD code
where 2𝑄𝐷 is the
most significant bit
(MSB) while 2𝑄𝐴 is
the least significant
bit (LSB)

Count sequence
How to connect (1 counter, count to 9):

- Pin 3 (1𝑄𝐴) and 4 (1CKB) are

connected together
- Pins 7, 6, 5, 3 are connected to a Timing diagram
7-segment display module that
takes in the BCD input and
displays the decimal equivalent
- Pin 1 (1CKA) is to be connected to
a Pull-Up switch, while Pin 2
(1CLR) is to be connected to a
Pull-Down switch
- 𝑆1 must be a debounced switch to
prevent contact bounce increasing
the count value more than once

How to connect (2 counters, count to 99):

- Pin 13 (2𝑄𝐴) and 12 (2CKB) are

connected together
- Pin 7 connected to Pin 15 so that
1𝑄𝐷 functions as a clock for
counter 2
- Pins 2 and 14 connected together
 - Pins 9, 10, 11, 13 are connected to
a 7-segment display module

Function:
- When switch 𝑆2 is pressed, the
count values for both counters is
reset and the 7-segment displays
will display 0
- When switch 𝑆1 is pressed, the
count value increases by 1, and
the 7-segment display displays 1
- When the count value is 9 and
switch 𝑆1 is pressed, the count
value is automatically reset to 0
while the count value for counter 2
increases by 1

Application: Electronic Carpark display

- When a car passes through a

infrared sensor, LM311 Voltage
comparator sends a falling edge
input to the 74LS390 counter IC
- Allows count value to increase by
1 for every car that passes through

Application: Stopwatch

- When Input A is HIGH, the AND

gate produces an falling edge
input for the 74LS390 counter IC
whenever the Astable output
waveform is LOW
- Allows the display to function as a
stopwatch when it is activated
(No chapter 15 as its under Coursework; refer to your teacher for help i guess)
(here are some tips tho: always look up the datasheet and pin diagrams of all the
components ur using, ensure that your circuit is functioning properly before testing and
ensure all necessary information have been taken down before moving on to the next
section)