A Quick Guide to

Synopsys University Program Resources

Courseware, SolvNetPlus & Synopsys Learning Center

University Program, Synopsys Taiwan

November 2022
Contents

• Membership Benefit
• Teaching Resources
• courseware, generic libraries, PDKs
• Knowledge Base
• SolvNetPlus
• Synopsys Learning Center

© 2021 Synopsys, Inc. 2

Contents

• Membership Benefit
• Teaching Resources
• courseware, generic libraries, PDKs
• Knowledge Base
• SolvNetPlus
• Synopsys Learning Center

© 2021 Synopsys, Inc. 3

Membership Benefits
IC Design and EDA Curriculum:
• Full Semester Courses – 80+ courses for Bachelor and Master programs
Teaching • Workshops/Lectures - 30 courses
• Short Lectures/Labs - 28 courses
Resources
教學資源 Teaching Support:
• 14nm, 32/28nm & 90nm Generic Libraries and iPDK’s
• Generic Memory Compiler

Access Synopsys knowledge base:

• Document – contains product release note, installation guide, user guide
& reference manual
Knowledge
Base • Search – provides an advanced search engine to retrieve information
知識庫 from various sources, such as documentation, articles, training, and so on.

• Training – Access Synopsys Learning Center for free self-paced

training resources. The approved academic users are entitled to the
“Elite” subscription model. Find more details here.

*Requires SolvNetPlus account to access above-mentioned resources.

© 2021 Synopsys, Inc. 4
Contents

• Membership Benefit
• Teaching Resources
• courseware, generic libraries, PDKs
• Knowledge Base
• SolvNetPlus
• Synopsys Learning Center

© 2021 Synopsys, Inc. 5

Teaching Resources  Access through:
https://www.synopsys.com/academic-research/university.html

Teaching
Resources
教學資源

IC Design and EDA Curriculum:

• Full Semester Courses – 80+ courses for
Bachelor and Master programs
• Workshops/Lectures - 30 courses
• Short Lectures/Labs - 28 courses

Teaching Support:
• 14nm, 32/28nm & 90nm Generic Libraries
and iPDK’s
• Generic Memory Compiler

© 2021 Synopsys, Inc. 6

Teaching Resources
IC Design and EDA Curriculum

© 2021 Synopsys, Inc. 7

IC Design Curriculum
- Advanced Methods in Logic Synthesis - IC Design Flow (RAU) - Linear Algebra
and Equivalence Checking
- IC Design Introduction - Logic Design
- Analog and Mixed-Signal IC Physical Design
- IC Simulation, Theory - Microprocessor Systems
Bachelor

- Analog Integrated Circuits

- IC Testing - RF Circuits
- Computer Architecture and Engineering
- Introduction to Logic Design (SU) - Numerical Methods
- Digital ASIC Design (NCSU)
- Digital Integrated Circuits - Introduction to Microelectronic Circuits - Scripting Languages for Beginners

- Electrotechnical Bases of Electronic Circuits - Introduction to Semiconductor Devices - Signal Processing and Systems Theory
- Fundamentals of Telecommunications - Introduction to VLSI Design (UT) - Static Timing Analysis
- High Speed SerDes Design - Synthesis and Optimization of Digital Integrated Circuits
- Technical Writing

- Analog Modeling with Verilog-A - EDA Tools - Rad-hard IC Design

- ARC Processor-Based Embedded Programming - FPGA Prototyping - RF IC Design
- Complex Functions - IC Design for Thermal Issues - Synopsys EDA Tool Flow for Front-End Digital IC Design
Master

- Crosstalk and Noise - IO Design - Synopsys EDA Tool Flow for Back-End Digital IC Design
- Design for Test - Low Power Design - Thermal and Electro-Thermal Simulation: Achievements
and Trends
- Design of Embedded Systems - Low Power Methodology Manual (SVTI)
- VLSI Design Verification and Testing
- Design of Special I/O's - Mixed-Signal IC Design
- Digital Signal Processing - Modeling and Optimization of IC Interconnects
- Digital VLSI Design - Nano-Scale Circuits and Systems (SFSU)

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EDA Curriculum
- Algorithms and Structural Programming - Hardware Description Languages - Operating Systems and System Programming
- Analog Integrated Circuits - IC Design Introduction - Probability Theory and Mathematical Statistics
Bachelor

- Applied Probability - Introduction to Algorithms - Programming Languages and Compilers

- Big Data - Linear Algebra - Technical Writing
- Data Structures - Memory Schematic Design Basics - Theory of Algorithms
- EDA Introduction - Numerical Methods - Unix System Administration

- Compilers Design - EDA Mathematical Methods - Object-Oriented Programming

- Complex Functions - Fourier Transformations - Operational Research 2
- Computational Geometry - Fuzzy Logic - Programming C++
Master

- Computer Language Engineering - IC Design Algorithms - Semiconductor Devices and Technology

- Contemporary Software Development Kits - IC Schematic Design Algorithms - Software Development Technology
- Database Management System - IC Verification Algorithms
- Databases - Modeling and Optimization of IC Interconnects
- Design of Programming Languages
- Discrete Mathematics and Probability

© 2021 Synopsys, Inc. 9

Workshops / Lectures / Short Lectures / Labs
- Verification - Implementation
- Full Custom IC Design Flow Using Synopsys
- Computer Arithmetic Applied to High- - Advanced Design of Digital Circuits for
Workshops and

Custom Tools (SFSU)

performance Cryptography (USP) Specific Applications (USP)
- Custom Analog Design Flow Tutorial
- SystemVerilog Verification Tutorial (SFSU) - ASIC Design Flow Tutorial Based on the
Lectures

Synopsys 32/28nm Generic Library - Synopsys Design Flow Tutorial

- Universal Verification Methodology
(SFSU)
- Other
- ASIC Design Flow Tutorial Based on the
- Memory PHY and DRAM Synopsys 90nm Generic Library (SFSU)
- Project Management - Chip Design
- Python - Design for Testability (SFSU)

- Circuit Simulation - Other

- Optimization Methods
Short Lectures / Labs

- Circuit Simulation: Transient Analysis (IITB) - Basic Perl Programming

- Physical Verification Runset Development
- Techniques for Circuit Simulation (IITB) - Characterization with SiliconSmart
- Power-Performance Optimization of Digital Circuits and
- Low Power Design - Compiler Optimization and Code Generation
Systems (UCLA)
- Low Power Methodology Manual for 14nm - Computer Networks
- Process Variation Aware Design (RIT)
- Digital Design with Verilog
- Low Power Design with SAED 14nm EDK - Scripting Languages
- Digital System Design and Simulation with VHDL (SU)
- Subthreshold Design and Implementation - Sequential Elements
(RIT) - Embedded Systems Design (CWRU)
- Signal and Power Integrity: Current State and New
- Verification Methodology Manual for Low - How to Create an Interoperable PDK Approaches
Power - IC Fabrication - Statistical Techniques for Timing Analysis: Current State
and Trends
- Introduction to RF Communication
- Tool Command Language (TCL)
- Introduction to Verilog HDL
- User Interface Desi
- Operational Research
© 2021 Synopsys, Inc. 10
Full Semester Courses

• Topics cover all aspects of IC/SoC design

• Courseware for Bachelor and Master level programs
• Full-semester courses contain ~15 weeks of material and include the following components

Syllabus Lectures Labs Homework Exams Projects

     
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Teaching Resources
Teaching Support (Generic Libraries, PDKs, Generic Memory Compiler)

© 2021 Synopsys, Inc. 12

Generic Libraries (EDK)
• 14nm, 32/28nm and 90nm

• Enables students to master advanced design methods using the latest Synopsys EDA tools
• Includes:
Digital Standard Cell I/O Special Cell
I/O Cell Library Embedded Memories
Library Library

Phase Locked Loop Low Power Memories Reference Designs

• Used by Synopsys for:

Curricula Development Customer Education Global Technical Services Application Consultants

To support development of To train customers with To train internal staff and To develop and test sample
laboratory works and course Leon3 and ORCA customers on Synopsys designs and Reference
projects. processors’ design. tools and low power flows. Methodology scripts.

© 2021 Synopsys, Inc. 13

Interoperable Process Design Kits (iPDKs)
• 32/28nm and 90nm

• Enables students to master AMS/Custom design with the Synopsys custom implementation
tool suite
• Includes:
Parasitic Extraction Symbol Library and
Technology Files Embedded Memories
Files Python PCells

Physical Verification
HSPICE Models Callback Scripts Setup Files
Files

Curricula Development Customer Education Global Technical Services Application Consultants

To support development of To train customers with To train internal staff and To develop and test sample
laboratory works and course Leon3 and ORCA customers on Synopsys designs and Reference
projects. processors’ design. tools and low power flows. Methodology scripts.

© 2021 Synopsys, Inc. 14

Reference Designs Supported by Synopsys EDKs
• DesignWare® ARC 600 Academic Core - 32-bit RISC processor core optimized for
embedded applications and DSP tasks
• ARM® Cortex® - M0 DesignStart™ Processor - Entry-level configuration of ARM Cortex-M0
microprocessor1
• OpenSPARC T1 - 64-bit multicore processor2
• LEON3 - 32-bit embedded processor2
ORCA ChipTop Layout
• Sample Processor Designs - included in EDK
– ORCA for timing analysis
– ChipTop for low power design

1. Available through ARM DesignStart for Processor IP portal

2. Available via GNU General Public License

© 2021 Synopsys, Inc. 15

DesignWare ARC 600 Processor Design
• Synthesis scripts optimized for 32/28nm EDK that can be used to easily redesign the
academic version of the ARC 600 processor
• Synopsys curriculum for the ARC 600
– IC Synthesis Based on DesignWare ARC 600 Core, includes:
– Lecture slides
– Covers ARC 600 details and EDA tool use
– Laboratory works
– Step-by-step guide of the ARC 600 design process

Apply in Members Only for access to the DesignWare ARC 600 Academic Core:
https://www.synopsys.com/apps/protected/university/members.html

© 2021 Synopsys, Inc. 16

ARM Cortex-M0 DesignStart Processor Design
• Complete Synthesizable Solution
– Pre-configured Verilog netlist derived from commercial Cortex-M0 processor
– Simple testbench
– Example test code
• Scripts to implement the ARM Cortex-M0 DesignStart design using Synopsys 32/28nm EDK
and EDA tools
• Synopsys curriculum for the ARM Cortex-M0
– IC Synthesis Based on ARM Cortex-M0 DesignStart Processor

Download from ARM DesignStart for Processor IP portal:

http://arm.com/products/processors/designstart-processor-ip

© 2021 Synopsys, Inc. 17

OpenSPARC Processor Design
• Scripts to enable OpenSPARC design using Synopsys 32/28nm EDK and Design Compiler
• Implemented low power design techniques
• Synopsys curriculum for OpenSPARC
– Computer Architecture
– Includes:
– Physical design scripts for IC Compiler
– Scripts to enable small block reuse for educational purposes
– Various lab projects based on small blocks

Download OpenSPARC:
http://www.opensparc.net

© 2021 Synopsys, Inc. 18

Synopsys Generic Memory Compiler
• Configurable software that automatically generates User interface
static RAM circuits of different types and sizes with all – Command line
required deliverables – GUI
• Generate custom memory instances for educational ICs Supported memory types
• Designed for use with Synopsys EDKs and EDA tools – 1 port SRAM
– 2 port SRAM
• Optimized for the Synopsys Digital Design Flow
– 1 port Low Power SRAM
• Supports multiple technologies (90nm, 32/28nm, etc.) – 2 port Low Power SRAM

“Using the Synopsys Generic Memory Compiler in our complex processor for DSP application was
a great time-saving tool. It helped the students generate the SRAM they wanted in a snap,
saving them critical time to concentrate on the rest of the complex design.”

Dr. Maged Ghoneima, American University in Cairo

© 2021 Synopsys, Inc. 19

Get started w/ Teaching Resources
Link: www.synopsys.com/academic-research/university.html

© 2021 Synopsys, Inc. 20

01 Go to Electronic University Program website
Select the Teaching Resources that you need, then click on “ Members Only website”.
Link: www.synopsys.com/academic-research/university.html

• Requires a SolvNetPlus account

to sign in.
• Please contact Synopsys
University Program – Taiwan
([email protected]) for
membership enquiry.

© 2021 Synopsys, Inc. 21

02 Log-in with Synopsys SolvNetPlus credential

https://www.synopsys.com/apps/protected/university/members.html
© 2021 Synopsys, Inc. 22
03 Insert course name in the search engine
Search by “Course Type”

Course Type:

1. Full Semester
2. Short Lectures / Labs
3. Workshops / Lecturers

© 2021 Synopsys, Inc. 23

03 Insert course name in the search engine (cont.)
Search by “Course Category”
Course Category:
Example : Full Semester

1. Analog / RF Design
2. Digital System Architecture and Design
3. IC / Semiconductor Fabrication
4. Other

© 2021 Synopsys, Inc. 24

03 Insert course name in the search engine (cont.)
Search by “Curriculum Type”

Example : Full Semester

Curriculum Type:

1. EDA
2. VLSI

© 2021 Synopsys, Inc. 25

04 Access to the courseware
Start to download course syllabus, lecturer slides, labs or exams
Example : Full Semester

Course Contents:

1. Syllabus
2. Lectures
3. Labs
4. Project
5. Homework & Exams

© 2021 Synopsys, Inc. 26

Contents

• Membership Benefit
• Teaching Resources
• courseware, generic libraries, PDKs
• Knowledge Base
• SolvNetPlus
• Synopsys Learning Center

© 2021 Synopsys, Inc. 27

Knowledge Base
 Access through:
Knowledge https://solvnetplus.synopsys.com/
Base
知識庫

Access Synopsys knowledge base:

• Document – contains product release note, installation

guide, user guide & reference manual

• Search – provides an advanced search engine to retrieve

information from various sources, such as documentation,
articles, training, and so on.

• Training – Access Synopsys Learning Center for free

self-paced training resources. The approved academic
users are entitled to the “Elite” subscription model. Find
more details here.

© 2021 Synopsys, Inc. 28

Get Oriented with SolvNetPlus
University users can access Documentation, Training & Search ; but CANNOT access
Download, EFT, Cases & STARs.


 

© 2021 Synopsys, Inc. 29

Knowledge Base
SolvNetPlus (Documentation & Search)

© 2021 Synopsys, Inc. 30

Get started w/ SolvNetPlus
https://solvnetplus.synopsys.com/

© 2021 Synopsys, Inc. 31

01 Log-in with Synopsys SolvNetPlus credential

https://solvnet.synopsys.com/
© 2021 Synopsys, Inc. 32
02 Read “ GETTING STARTED” before use

© 2021 Synopsys, Inc. 33

03 Click on “Documentation”

© 2021 Synopsys, Inc. 34

04 Search by product name to get tool documents
You can download release notes, installation guides & user guides and reference
manuals from this section

Example : Laker

© 2021 Synopsys, Inc. 35

05 Look for information in the “Search” bar
You can use search to retrieve information from various sources
2

© 2021 Synopsys, Inc. 36

06 Choose needed info from the displayed search results
The information will be displayed from various sources, such as documentation, articles,
training, YouTube, and so on (but NOT in cases & STARs)
Example : insert “report_timing”

© 2021 Synopsys, Inc. 37

Knowledge Base
Synopsys Learning Center (Self-paced Learning)

1. Access via SolvNetPlus (https://solvnet.synopsys.com/)

2. Access via Synopsys Learning Center (https://www.synopsys.com/support/training/self-paced.html)

© 2021 Synopsys, Inc. 38

01 Login SolvNetPlus and click “Training”

© 2021 Synopsys, Inc. 39

02 SSO Login via SolvNetPlus

© 2022 Synopsys, Inc. 40

02 Access Synopsys Learning Center

 You can also directly access through: https://training.synopsys.com/

© 2022 Synopsys, Inc. 41

03 Click on “三”

© 2022 Synopsys, Inc. 42

04 Click on “Course Catalog”

(*The courses are free to all users)

© 2022 Synopsys, Inc. 43

05 The Interface of Courses

Menu and transcript

are provided.
Downloadable
files/instructions

Scroll down to see

course description,
including abstract,
objectives, audience
profile, etc.
© 2022 Synopsys, Inc. 44
06 Click on “My Courses and Learning Plan”
(*All of your courses will be shown here.)

© 2022 Synopsys, Inc. 45

07 Click on “My Activities”

(*Your information, performance, badges, certification, etc. will be shown here.)

© 2022 Synopsys, Inc. 46

08 Click on “University Program”
Academic users approved by Synopsys University Program (TW) are entitled to
the “Elite” subscription model.
More details for the subscription model (Link).

© 2022 Synopsys, Inc. 47

 09 Synopsys Learning Paths

Learning Paths are available on Synopsys Learning Center.

-> Explore more Synopsys Learning Paths (Link)

© 2022 Synopsys, Inc. 48

Thank You
Synopsys University Program
([email protected])