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The 8085 Pin Description

The document provides a detailed description of the 8085 microprocessor, highlighting its properties, pin functions, and communication methods with I/O devices. It explains the significance of various pins, including power supply, address, data, and control signals, as well as the methods of Peripheral and Memory-mapped I/O. Additionally, it outlines the process of executing a stored program by fetching instructions from memory.

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Muhammad Farhal
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0% found this document useful (0 votes)
44 views14 pages

The 8085 Pin Description

The document provides a detailed description of the 8085 microprocessor, highlighting its properties, pin functions, and communication methods with I/O devices. It explains the significance of various pins, including power supply, address, data, and control signals, as well as the methods of Peripheral and Memory-mapped I/O. Additionally, it outlines the process of executing a stored program by fetching instructions from memory.

Uploaded by

Muhammad Farhal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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The 8085 Pin Description:

Properties:
• It is an 8-bit microprocessor.
• Manufactured with N-MOS technology which is a variant of MOS
(metal oxide semiconductor technology). It uses n channel silicon-
gate process.
• 40-pin DIP (dual inline package) IC.
• It has 16-bit address bus and thus has 216 = 64𝐾𝐵 addressing
capability.
• Operate with 3 MHz single-phase clock.
• +5 V dc single power supply. (1)

o The logic pin layout and signal groups of the 8085 microprocessor
are shown in Fig. below. All the signals are classified into six groups:
• Address bus • Power supply & frequency signals
• Data bus • Externally initiated signals
• Control & status signals • Serial I/O signals
o A simplified diagram that does not indicate the pin numbers, but
only indicates the functions of the various pins, can be called a
functional pin diagram which is shown (partly) for 8085 below.
 𝑽𝒄𝒄 & 𝑽𝒔𝒔 Pins:
The 8085 needs a power supply of +5 V
dc for its working. Pin-40 is 𝑉𝑐𝑐 pin and
should be connected to +5 V dc power
supply. Pin-20 is 𝑉𝑠𝑠 pin and should be
connected to power supply ground.
 𝑨𝑫𝟕−𝟎 Pins:
The 8085 communicates with the outside world with 8 bits at a time;
the information thus receive or send out on the 08 bidirectional pins
𝐴𝐷7 , 𝐴𝐷6 , …. 𝐴𝐷0 and their pin number are 19, 18, ….., 12 respectively.
These pins are used for:
• Receiving the program code from memory 8 bits at a time.
• Receiving a data byte from an input or from the memory.
• Sending out a byte to an output port or to the memory.
o The number of 𝑅𝐷 pin is 32 which is active low, it means when the
control unit sends out logic 0 on this pin (i.e. 𝑅𝐷 = 0), 𝐴𝐷7−0 pins
are input pins. When 𝑅𝐷 = 1, the 8085 is not interested in reading
information. The number of 𝑊𝑅 pin is 31 which is active low output
signal, it means when the control unit sends out logic 0 on this pin (i.e.
𝑊𝑅 = 0), 𝐴𝐷7−0 pins are the output pins. When 𝑊𝑅 = 1, the 8085 is
not interested in reading information.
o Thus the action performed by the 8085 for various combinations of
𝑅𝐷 and 𝑊𝑅 are as follows:

If the control unit sends out logic 1 on both 𝑅𝐷 and 𝑊𝑅


simultaneously, it means that the 8085 is not interested in reading or
writing but rather busy with some internal processing.
 𝑨𝑫𝟏𝟓−𝟖 Pins:
Intel 8085 is provided with 16 pins i.e. 𝐴𝐷15−8 & 𝐴𝐷7−0 for sending
address information.
On 𝐴𝐷15−8 having pin numbers 28 to 21, respectively, the 8085 sends
out the MS (most significant) byte and on 𝐴𝐷7−0 having pin numbers
12 to 19, respectively, the 8085 sends out the LS (least significant) byte
of address.
o The addresses of 64K (65,536)
memory location of Intel 8085 μ-
processor in binary number system
is as follows:
0000 0000 0000 0000
0000 0000 0000 0001
0000 0000 0000 0010

1111 1111 1111 1111
It is convenient to write the same
addresses in hexadecimal notation
as:
0000𝐻 0001𝐻 0002𝐻 … 𝐹𝐹𝐹𝐹𝐻
• If the μ-processor is interested in reading information i.e. 1𝐷𝐻 from
the memory location having address in hex is 0002𝐻 , it sends out
00𝐻 on 𝐴𝐷15−8 and 02𝐻 on 𝐴𝐷7−0 . Then the processor send out 𝑅𝐷
as logic 0 and 𝑊𝑅 as logic 1. This results in 1𝐷𝐻 , the contents of
location 0002𝐻 , coming to the processor from memory on 𝐴𝐷7−0 .

• Similarly, if the μ-processor is interested in writing information 89𝐻


to the memory location having address 4567𝐻 , it sends out 45𝐻 on
𝐴𝐷15−8 and 67𝐻 on 𝐴𝐷7−0 . A little later, the processor sends out 89𝐻
on 𝐴𝐷7−0 with 𝑅𝐷 as logic 1 and 𝑊𝑅 as logic 0; which results in 89𝐻
getting written to the memory location 4567𝐻 .
Thus, it is seen that 𝐴𝐷7−0 is used for sending out LS byte of
address, as well as sending or receiving 8 bits of data.
The multiplexing of the LS byte of address and the data has been
done in 8085 to save on the number of pins required for the chip.
 ALE (Address Latch Enable) Pin:
If the ALE signal is at logic 1, the 8085 μ-processor is sending out
address information on 𝐴𝐷7−0 which means 𝐴𝐷7−0 pins act like
address pins 𝐴7−0 ; and if ALE signal is at logic 0, the 8085 μ-processor
is sending out or receiving information on 𝐴𝐷7−0 which means 𝐴𝐷7−0
pins act like data pins 𝐷7−0 .
• Information is received on 𝐴𝐷7−0 when 𝐴𝐿𝐸 = 0, if 𝑅𝐷 = 0 and
𝑊𝑅 = 1. Then 𝐴𝐷7−0 pins act like the input pins 𝐷7−0 . Whereas,
information sent out on 𝐴𝐷7−0 when 𝐴𝐿𝐸 = 0, if 𝑅𝐷 = 1 and 𝑊𝑅 =
0. Then 𝐴𝐷7−0 pins act like the output pins 𝐷7−0 .

 𝐑𝐃 and 𝐖𝐑 Pins:
𝑅𝐷 (active low output): The Read signal indicates that data are being
read from the selected I/O or memory device & that they are available
on the data bus.
𝑊𝑅 (active low output): The Write signal indicates that data on the
data bus are to be written into a selected memory or I/O location.
 IO/𝐌 Pin:
The 8085 μ-processor does not directly communicates with I/O devices
but rather communicates with I/O ports. Each port must have a unique
address just like each memory location has a unique address. The 8085
μ-processor sends out the port address on 𝐴𝐷15−8 & 𝐴𝐷7−0 , just like
sending out a memory address.
o When 𝐼𝑂 M is logic 0, it means that address sent out by the
processor is for addressing a memory location; when 𝐼𝑂 M is logic 1, it
means processor is addressing an I/O port.
• When 𝐼𝑂 M is logic 1, & R𝐷 is at logic 0 and 𝑊𝑅 is at logic 1. it
means that address sent out by the processor is for addressing input
port & if 𝑊𝑅 is at logic 0 and R𝐷 is at logic 1, it means that address
sent out by the processor is for addressing output port as follows:
 𝑺𝑰 and 𝑺𝑶 (Status signal) (Output) Pins: These are the two data bus
status signals used to specify the type of operation being performed
by the microprocessor; the 04 combination of these signals are listed
in Table 1.

 Power Supply & Clock Frequency Signals:


𝑉𝑐𝑐 : +5 V power supply
𝑉𝑠𝑠 : Ground reference
𝑋1 , 𝑋2 (input): These are the 02 input lines across which a crystal or
R/C oscillator circuit is connected to provide the required clock
frequency to the microprocessor. is connected at these two pins.
CLK (output): Clock output is used as a system clock when a crystal or
R/C oscillator circuit is used as an input to the CPU.
8085/8085A Input/Output:

The 3rd component of a microprocessor-based system is I/O


(input/output) which includes input devices such as keyboard,
switches, and an analog-to-digital (A/D) converter, and output
devices such as light emitting diodes (LEDs), a cathode-ray tube
(CRT), printer, and a digital-to-analog (D/A) converter.
• The input devices transfer binary information (data & instructions)
from outside world to the microprocessor.
• The output devices transfer data from the μ-processor unit (MPU)
to the outside world .
These I/O devices are also known as peripherals. (2)

o There are 02 different methods by which MPU identifies and


communicates with the I/O devices:
• Peripheral or Direct I/O
• Memory-mapped I/O
Peripheral or Direct I/O:
In the peripheral or direct I/O, also known as accumulator I/O, two
instructions i.e. IN and OUT are used for data transfer. For this
purpose, 08 address lines are used by MPU to send the address of an
I/O device. These 08 address lines are capable of identifying 256 input
devices and 256 output devices, which are differentiated by the
control signals I/O Read (𝐼𝑂𝑅) and I/O Write (𝐼𝑂𝑊).
• These I/O addresses range from 00 to FF, and known as either
I/O device addresses or I/O port addresses.
Like communicating with memory, the similar steps in communicating
with an I/O device are as follows:
1. The MPU places an 8-bit devices address on the address bus,
which is decoded by the external decode logic.
2. The μ-processor unit (MPU) sends a control signal (I/O Read or I/O
Write) and enables the I/O device.
3. Data are places on the data bus for transfer.
Memory-Mapped I/O:
o In the memory-mapped I/O, the MPU views the I/O devices as if
they were memory locations. Sixteen address lines are used to
identify an I/O device by the MPU. The memory map (64K) is shared
between memory and I/O devices. The memory-mapped I/O
technique uses the same control signals (𝑀𝐸𝑀𝑅 or 𝑀𝐸𝑀𝑊) and
instructions as those of memory.

Memory and Instruction Fetch: (How a Program is Executed)


o The Intel microprocessors work on the stored program concept, i.e.
instructions/programs and data are stored in memory. The memory
provide that information to MPU whenever the MPU requests for it.
To execute a program, microprocessor fetches the instructions one by
one from the memory and executes them in the same sequence. (3)
Example:
The instruction code 0100 1111 (4FH ) is stored in the memory
location 2005H . Illustrate the data flow & list the sequence of events
when the instruction code is fetched by the MPU.

o The microprocessor performs the following steps to execute the


stored program:
1. The program counter (PC) places the 16-bit address 2005H of the
memory location having instruction on the address bus.
2. The control unit sends the memory read control signal (MEMR,
active low) to tell the memory that the MPU wants to read the
memory and thereby memory enable the addressed memory location.
3. The 8-bit instruction (4F) code in the memory location is placed
on the data bus & transferred (copied) to the instruction register (IR).
4. From IR, The opcode is then transferred to the instruction decoder
and machine cycle encoder. From there, the meaning of the opcode is
decoded and the number of machine cycles required to execute the
complete instruction.
5. The decoded opcode information is sent to the control unit so that
the control unit can generate the suitable control signal to execute the
instruction.

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