DEPARTMENT OF ELECTRICAL ENGINEERING

UNIVERSITY OF POONCH RAWALAKOT

BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)
BMET/

LAB EXPERIMENT NO. 08

IMPLEMENTATION AND VERIFICATION OF ENCODER AND DECODER

Aim:
To implement and verify the truth table of encoder and decoder using logic gates

Learning Objectives:
 Use the IC 7408 series AND gate and its Truth Table.
 Use the IC 7432 series AND gate and its Truth Table.
 Use the IC 7404 series NOT gate and it’s Truth Table.
 Use of above IC’s in implementation of encoder and decoder.
 Use of Built in modules on trainer for verification of encoder and decoder.

Components Required:
Advance logic trainer
IC 7408 (AND Gate)
IC 7432 (OR Gate)
IC 7404 (Not Gate)
Pach Chards

Background Theory:
Encoder:
An encoder is a combinational logic circuit that is used to convert a normal or familiar information into a
coded format. In other words, an encoder is a digital device that coverts a piece of information represented
in the form of decimal digits and alphabetic characters into a coded form like binary representation. The
operation that the encoder performs is termed as encoding
An encoder consists of a certain number of input and output lines. Where, an encoder can have maximum
of "2n" input lines whereas "n" output lines. Hence, an encoder encodes information represented by "2 n"
input lines with "n" bits.

The block diagram of an encoder is shown in the following figure.

 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKOT
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)
BMET/

Let us now discuss different types of encoders commonly used in digital electronic applications.

Types of Encoders:]

Some of the commonly used types of encoders in digital electronics −

 4 to 2 Encoder
 8 to 3 Encoder (Octal Encoder)
 Decimal to BCD Encoder

Let us now discuss these three types of most commonly used encoders in detail.

4 to 2 Encoder:

A 4 to 2 Encoder is a type of encoder which has 4 (22) input lines and 2 output lines. It produces an output
code (i.e., convert input information in a 2-bit format) depending on the combination of input lines.

The block diagram of a 4 to 2 Encoder is shown in the following figure.

 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKOT
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)
BMET/

The working of a 4 to 2 Encoder for different input combinations is described in the following truth table.

Inputs Outputs

I3 I2 I1 I0 Y1 Y0

0 0 0 1 0 0

0 0 1 0 0 1

0 1 0 0 1 0

1 0 0 0 1 1

From this truth table, we can derive the Boolean expression for each output of the 4 to 2 Encoder as follows
−

Y0=I1+I3Y0=I1+I3
Y1=I2+I3Y1=I2+I3

It is clear that we can implement the logic circuit of the 4 to 2 Encoder using two OR gates. The following
figure depicts the logic diagram of the 4 to 2 Encoder.

Octal to Binary Encoder:

The octal to binary encoder is a type of encoder that converts an octal code into binary code. It accepts 8
input lines and produces a 3-bit output depending on the combination of input lines. Therefore, it is also
known as 8 to 3 Encoder.
 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKOT
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)
BMET/

The block diagram of an octal to binary encoder is shown in the following figure.

The following truth table describes the working of an octal to binary encoder.

Inputs Outputs

I7 I6 I5 I4 I3 I2 I1 I0 Y2 Y1 Y0

0 0 0 0 0 0 0 1 0 0 0

0 0 0 0 0 0 1 0 0 0 1

0 0 0 0 0 1 0 0 0 1 0

0 0 0 0 1 0 0 0 0 1 1

0 0 0 1 0 0 0 0 1 0 0

0 0 1 0 0 0 0 0 1 0 1

0 1 0 0 0 0 0 0 1 1 0
 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKOT
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)
BMET/

1 0 0 0 0 0 0 0 1 1 1

From this truth table, we can write the Boolean expression for the outputs of the octal to binary encoder as
follows.

Y0=I1+I3+I5+I7Y0=I1+I3+I5+I7
Y1=I2+I3+I6+I7Y1=I2+I3+I6+I7
Y2=I4+I5+I6+I7Y2=I4+I5+I6+I7

From these expressions, it is clear that the implementation of an octal to binary encoder requires 3 OR
gates.

The logic circuit diagram of the octal to binary encoder is shown in the following figure .

Logic Diagram for Encoder:

 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKOT
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)
BMET/

DECODER:
A decoder is a multiple input multiple output logic circuit which converts coded input into
coded output where input and output codes are different. The input code generally has
fewer bits than the output code. Each input code word produces a different output code
word i.e., there is one to one mapping can be expressed in truth table. In the block
diagramof decoder circuit the encoded information is present as n input producing 2n
possible outputs. 2n output values are from 0 through out 2n – 1.

2-to-4 Decoder:

The 2-to-4-line binary decoder depicted above consists of an array of four AND gates. The 2 binary inputs
labelled A and B are decoded into one of 4 outputs, hence the description of 2-to-4 binary decoder. Each
output represents one of the minterms of the 2 input variables, (each output = a minterm).2-to-4 Binary
Decoder.
 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKOT
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)
BMET/

Circuit Diagram of 2-to-4 Decoder

3-to-8 Decoder:

A 3-to-8 decoder is a digital circuit that converts a 3-bit binary input into one of eight unique output
lines. Each unique combination of the three input bits activates a single output line, while the other seven
remain inactive. Essentially, it translates a 3-bit binary code (000 to 111) into an 8-bit octal
representation, where only one bit is high for any given input.
Truth Table for Decoder:

X Y Z D0 D1 D2 D3 D4 X D6 D7

0 0 0 1 0 0 0 0 0 0 0

0 0 1 0 1 0 0 0 0 0 0

0 1 0 0 0 1 0 0 0 0 0

0 1 1 0 0 0 1 0 0 0 0

1 0 0 0 0 0 0 1 0 0 0

1 0 1 0 0 0 0 0 1 0 0
 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKOT
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)
BMET/

X Y Z D0 D1 D2 D3 D4 X D6 D7

1 1 0 0 0 0 0 0 0 1 0

1 1 1 0 0 0 0 0 0 0 1

Implementation –
D0 is high when X = 0, Y = 0 and Z = 0. Hence,
D0 = X’ Y’ Z’
Similarly,
D1 = X’ Y’ Z
D2 = X’ Y Z’
D3 = X’ Y Z
D4 = X Y’ Z’
D5 = X Y’ Z
D6 = X Y Z’
D7 = X Y Z
Logic Diagram for (3*8) Decoder:
 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKO
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)

In Lab Task: Verify the outputs of 4*2 Encoder and 2*4 Decoder on digital logic trainer AM-
2000 through logic Gates, also 8*3 Encoder and 3*8 Decoder on trainer module and match the
observed output with theoretical concept.
Procedure:
(i) Connections are given as per circuit diagram.
(ii) Logical inputs are given as per circuit diagram.
(iii)Observe the output and verify the truth table

Practical Verification 4*2 Encoder:

Inputs Outputs

Practical Verification 8*3 Encoder:

Verified through 8*3 Encoder Modules on Trainer

 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKO
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)

Practical Verification 2*4 Decoder:

Outputs Inputs

Practical Verification 3*8 Decoder:

Verified through 3*8 Decoder Modules on Trainer

Result: We verified the encoder and decoder truth table.

Observations:
As per truth table we verified the output of encoder and decoder.
 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKO
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)

Precautions:
1. All ICs should be checked before starting the experiment.
2. All the connection should be tight.
3. Always connect ground first and then connect Vcc.
4. Suitable type wire should be used for different types of circuit.
5. The kit should be off before change the connections.
6. After completed the experiments switch off the supply of the apparatus.

Write Applications of Encoder and Decoder in Biomedical Engineering:

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Conclusions:
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Remarks:
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 DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITY OF POONCH RAWALAKO
BIOMEDICAL ENGINEERING TECHNOLOGY (3rd Semester) (BMET/2023-27/Digital Logic Design)

EVELAUTION CRITERIA:

RUBRICS MAX. MARKS OBTAIN

MARKS
1. INTRODUCTION 2.5

2. EXPERIMENTAL PROCEDURE 2.5

3. RESULTS 3.5

4. CONCLUSION & OVERALL IMPACT 1.5

TOTAL MARKS: ______10 _____

MARKS OBTAIN: -------------------

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Signature