3 KARPAGA VINAYAGA

COLLEGE OF ENGINEERING AND TECHNOLOGY

(Approved by AICTE, New Delhi, Affiliated to Anna University, Chennai and Accredited by NAAC)
GST Road, Chinna kolambakkam, Madhuranthagam Taluk, Chengalpattu District – 603 308, Tamil Nadu
Internal Quality Assurance Cell
Process Name: Faculty Development Programme
Form No: KVCET/IQAC/FDP/03

UART

UART means Universal Asynchronous Receiver Transmitter

Protocol. UART is used for serial communication from the name
itself we can understand the functions of UART, where U stands
for Universal which means this protocol can be applied to any
transmitter and receiver, and A is for Asynchronous which means
one cannot use clock signal for communication of data
and R and T refers to Receiver and Transmitter hence UART
refers to a protocol in which serial data communication will
happen without clock signal.
UART is established for serial communication. In this article, we
will discuss how parallel communication is established with
respect to serial communication using UART as well as how to
configure UART and what is the data format in UART. Later on,
we will discuss the Pros and Cons of the UART.

UART Basics

UART is a Universal Asynchronous Receiver Transmitter protocol

that is used for serial communication. Two wires are established
here in which only one wire is used for transmission whereas the
second wire is used for reception. Data format and transmission
speeds can be configured here. So, before starting with the
communication define the data format and transmission speed.
Data format and transmission speed for communication will be
defined here and we do not have a clock over here that’s why it
is referred to as asynchronous communication with UART
protocol. Here we will see how this protocol is designed
physically.
3 KARPAGA VINAYAGA
COLLEGE OF ENGINEERING AND TECHNOLOGY
(Approved by AICTE, New Delhi, Affiliated to Anna University, Chennai and Accredited by NAAC)
GST Road, Chinna kolambakkam, Madhuranthagam Taluk, Chengalpattu District – 603 308, Tamil Nadu
Internal Quality Assurance Cell
Process Name: Faculty Development Programme
Form No: KVCET/IQAC/FDP/03

UART

Here, DEVICE A that is having transmitter PIN and a receiver pin;

DEVICE B is having a receiver and transmission pin. The
Transmitter of DEVICE A is one that should be connected with the
receiver pin of DEVICE B and the transmitter pin of DEVICE B
should be connected with the receiver pin of DEVICE A we just
need to connect two wires for communication.
If DEVICE A wants to send data, then it will be sending data on
the transmitter’s pin and here receiver of this DEVICE B will
receive it over and if DEVICE A wants to receive the data, then
that is possible on the RX line that will be forwarded by TX of
DEVICE B. On comparing this serial communication of UART with
parallel then it can be observed that in parallel multiple buses
are required. Based on the number of lines bus complexity of
UART is better but parallel communication is good in terms of
speed.
So, when speed is required at that time we should select parallel
communication and for a low-speed application, UART must be
used and the bus complexity will be less.
The configuration of UART is done before transmission, both of
these devices are connected with protocol and should know the
3 KARPAGA VINAYAGA
COLLEGE OF ENGINEERING AND TECHNOLOGY
(Approved by AICTE, New Delhi, Affiliated to Anna University, Chennai and Accredited by NAAC)
GST Road, Chinna kolambakkam, Madhuranthagam Taluk, Chengalpattu District – 603 308, Tamil Nadu
Internal Quality Assurance Cell
Process Name: Faculty Development Programme
Form No: KVCET/IQAC/FDP/03

speed of data transmission. First, define the speed of both

devices. Now, configure the speed of DEVICE A and B for data
transmission which is referred to as Baud Rate so here Baud
Rate will be the same for DEVICE A and B otherwise both of these
devices cannot understand at what speed and at what rate data
is coming. After that, configure the data length so here DEVICE A
and DEVICE B both are configured at fixed data length if DEVICE
A is transmitting data, then it is configured with fixed data. Like
if DEVICE A is configured with the eight-bit size of data then
DEVICE B should also be configured at the same size of data
which is eight bits. After this, check data transmission or
receiving time, forward start bits, and stop bits.
Now we will see the data format and when the communication is
according to UART protocol. We are using NRZ encoding for data
communication.

UART Data Format

UART Data Format

Suppose DEVICE A is sending data to DEVICE B, and the

transmitter of DEVICE A will send data to the receiver of Device B
then it will be logic high. Now, send the start bit that will be logic
0 and once we have the start bit, DEVICE B will know that
somebody is communicating. Now there is the same speed
configuration with both devices. So, after the start bit, DEVICE A
can forward data.
Consider 8 bits of data length, so we will be forwarding 8 bits and
those 8 bits will be received by DEVICE B a parity bit can also be
used which is optional, but this is quite effective. By using the
parity bit, it can be identified whether the received data is
correct or not. Suppose we are sending 1 1 1 0 0 0 1 0. Now, we
3 KARPAGA VINAYAGA
COLLEGE OF ENGINEERING AND TECHNOLOGY
(Approved by AICTE, New Delhi, Affiliated to Anna University, Chennai and Accredited by NAAC)
GST Road, Chinna kolambakkam, Madhuranthagam Taluk, Chengalpattu District – 603 308, Tamil Nadu
Internal Quality Assurance Cell
Process Name: Faculty Development Programme
Form No: KVCET/IQAC/FDP/03

have 4 ones; an even number of ones are there hence the parity
is even and for that, logic 0 will be assigned. Suppose we are
receiving data with some error, say zero is converted into one;
Now incorrect data that is 1 1 1 1 0 0 1 0 for this incorrect data
parity will be 0 as there are 5 ones, here is a mismatch in the
parity bit and hence it is confirmed that the received data has
some error.

Pros of UART Protocol

 It is having less physical interfacing based on only two lines.

 Simple to configure data and data size. Speed is also
configurable. In the majority of cases, this baud rate is 9600
for the UART protocol. Full duplex mode configuration is
possible by using two wires so that is the major advantage of
UART.
 Error detention is possible

Cons of UART Protocol

 UART is having serial communication, therefore, it has less

speed.
 Start bit, stop bit, and the parity bit is other overhead.
 Since this is asynchronous communication so here there are
many things that we need to do in configuration, for instance,
we should configure both devices at the same speed because
the clock signal is absent.

SRAM stands for Static Random Access Memory. It is a form

of a semiconductor. It is widely used in microprocessors, general
computing applications, and electronic devices. The SRAM is
volatile which means the data stored in it gets all wiped out once
the power supply is cut. SRAM comprised of flip flops. It consists
of 4-6 transistors, once the flip flop stores the bit it keeps it
stored until the opposite bit is stored in it.

History of SRAM
3 KARPAGA VINAYAGA
COLLEGE OF ENGINEERING AND TECHNOLOGY
(Approved by AICTE, New Delhi, Affiliated to Anna University, Chennai and Accredited by NAAC)
GST Road, Chinna kolambakkam, Madhuranthagam Taluk, Chengalpattu District – 603 308, Tamil Nadu
Internal Quality Assurance Cell
Process Name: Faculty Development Programme
Form No: KVCET/IQAC/FDP/03

Engineer John Schmidt invented the SRAM in 1964 at Fairchild

Semiconductors. The first SRAM is 64-bit and uses p-channel
MOS.
Intel released its first 256-bit Intel 1101 SRAM chip in 1969, five
years after its invention. But it uses Schottky TTL (Transistor-
Transistor-Logic) architecture for its build.
Early SRAMs were manufactured using ceramic plastic. But
nowadays, SRAMs are integrated directly to the CPU for faster
and better processing.

Characteristics
 The data is held statically: The data is stored statically in
SRAM and it doesn’t need to be refreshed unlike DRAMs.
 It is a type of Random Access Memory: The SRAM is a
type of Random Access Memory. Random Access Memories
are those from which the data can be accessed (read/write)
randomly (means any memory location can be accessed),
regardless of the memory location that was accessed earlier.
 It uses flip flop for storing data: It uses flip flops to store
bits. Each flip flop is made up of 4-6 transistors.
 It is used as a Cache Memory in CPU: SRAM is used
as cache memory for CPUs as they are faster and stores data
statically.
Advantages
 It is faster to access and perform operations like read & write.
 The data can be accessed randomly.
 It is used as a cache memory.
 It doesn’t need to be refreshed as it stored data statically.
 It has medium power consumption. It requires less power as
compared to DRAM.
Disadvantages
 It is expensive.
 It is volatile in nature i.e., data is lost when the memory is not
powered.
 It has a low storage capacity.
 It is not possible to refresh the program.
 It has a more complex design and they are bigger in size as
well when compared to DRAM.
 It reduces the memory density.
3 KARPAGA VINAYAGA
COLLEGE OF ENGINEERING AND TECHNOLOGY
(Approved by AICTE, New Delhi, Affiliated to Anna University, Chennai and Accredited by NAAC)
GST Road, Chinna kolambakkam, Madhuranthagam Taluk, Chengalpattu District – 603 308, Tamil Nadu
Internal Quality Assurance Cell
Process Name: Faculty Development Programme
Form No: KVCET/IQAC/FDP/03