Exceptions

Outline
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Exception Handling
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Precise and Imprecise exceptions
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Exceptions in OoO pipelines
Exceptions

Events
Eventsthat
thatrequest
request
attention
attentionof
ofthe
theprocessor
processor
 Exceptions
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I/O device request

Events
Eventsthat
thatrequest
request
attention
attentionof
ofthe
theprocessor
processor
 Exceptions
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I/O device request
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Invoking OS service from a user program

Events
Eventsthat
thatrequest
request
attention
attentionof
ofthe
theprocessor
processor
 Exceptions
●
I/O device request
●
Invoking OS service from a user program
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Breakpoint (programmer-requested interrupt)

Events
Eventsthat
thatrequest
request
attention
attentionof
ofthe
theprocessor
processor
 Exceptions
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I/O device request
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Invoking OS service from a user program
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Breakpoint (programmer-requested interrupt)
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Integer arithmetic overflow/FP arithmetic anomaly

Events
Eventsthat
thatrequest
request
attention
attentionof
ofthe
theprocessor
processor
 Exceptions
●
I/O device request
●
Invoking OS service from a user program
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Breakpoint (programmer-requested interrupt)
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Integer arithmetic overflow/FP arithmetic anomaly
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Page fault

Events
Eventsthat
thatrequest
request
attention
attentionof
ofthe
theprocessor
processor
 Exceptions
●
I/O device request
●
Invoking OS service from a user program
●
Breakpoint (programmer-requested interrupt)
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Integer arithmetic overflow/FP arithmetic anomaly
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Page fault
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Undefined or unimplemented instruction

Events
Eventsthat
thatrequest
request
attention
attentionof
ofthe
theprocessor
processor
 Exceptions
●
I/O device request
●
Invoking OS service from a user program
●
Breakpoint (programmer-requested interrupt)
●
Integer arithmetic overflow/FP arithmetic anomaly
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Page fault
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Undefined or unimplemented instruction
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Hardware malfunctions, Power failure
Events
Eventsthat
thatrequest
request
attention
attentionof
ofthe
theprocessor
processor
Exceptions
Precise Exception Handling

LD
Precise Exception Handling

LD

On
On exception,
exception, flush
flush all
all prior
prior stages
stages
Exception Handling
 Exception Handling
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Save the address of the offending instruction in
the exception program counter (EPC)
– SEPC in RISC-V
 Exception Handling
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Save the address of the offending instruction in
the exception program counter (EPC)
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Transfer control to the operating system at some
specified address.
 Exception Handling
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Save the address of the offending instruction in
the exception program counter (EPC)
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Transfer control to the operating system at some
specified address.
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Handle the exception
– Providing some service to the user program
– Taking some predefined action in response to an
overflow
– Stopping the execution of the program and reporting
an error
 Exception Handling
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Save the address of the offending instruction in the
exception program counter (EPC)
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Transfer control to the operating system at some
specified address.
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Handle the exception
– Providing some service to the user program
– Taking some predefined action in response to an overflow
– Stopping the execution of the program and reporting an
error
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OS can terminate or may use EPC to restart
program
Communicating Exception Cause to OS
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A register records the cause of exception
– Supervisor Exception Cause (SCAUSE) Register
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Communicating Exception Cause to OS
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A register records the cause of exception
– Supervisor Exception Cause (SCAUSE) Register
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Vectored Interrupts
Communicating Exception Cause to OS
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A register records the cause of exception
– Supervisor Exception Cause (SCAUSE) Register
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Vectored Interrupts
– Cause of the exception determines offset to jump
– Added to a Vector Table Base register
Communicating Exception Cause to OS
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A register records the cause of exception
– Supervisor Exception Cause (SCAUSE) Register
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Vectored Interrupts
– Cause of the exception determines offset to jump
– Added to a Vector Table Base register
 RISC-V Exception Handling
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SEPC, SCAUSE
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Single entry point for Exception handler
– 0000 0000 1C09 0000hex
 RISC-V Exception Handling
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SEPC, SCAUSE
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Single entry point for Exception handler
– 0000 0000 1C09 0000hex
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For the pipeline, handling Exceptions are similar
to handling Control Hazards
–

–
 RISC-V Exception Handling
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SEPC, SCAUSE
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Single entry point for Exception handler
– 0000 0000 1C09 0000hex
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For the pipeline, handling Exceptions are similar to
handling Control Hazards
– SEPC saves instruction causing Exception’s PC
– SCAUSE is filled
– Flush all previous stages and the exception instruction
– Load Exception handler address to PC
RISC-V Exception Handling Pipeline
RISC-V Exception Handling Pipeline
Exception Handling Example

Hardware malfunction exception

IF ID
IF
Exception Handling Example

IF ID EX MEM WB
IF ID EX MEM WB

IF ID EX MEM WB

IF ID E

IF ID

IF

IF ID

IF
Exception Handling Example
Exception Handling Example
 Outline
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Exception Handling
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Precise and Imprecise exceptions
Multi-cycle Operations Pipeline
 Precise Exceptions
DIV.D F0, F2, F4
ADD.D F10, F10, F8
SUB.D F12, F12, F14

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Out of order completion
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Can't ignore exceptions
– Virtual Memory, IEEE 754
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Fast mode vs. Slow mode with precise
exceptions
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Store results of earlier operations in a buffer
– History file, Future file.
 Stopping and Restarting Execution
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Trap instruction, Turn off writes, Save PC, Save
processor state, (Disable Exceptions), Exception
handler, RFE
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Precise exceptions

Pipeline stage Problem exceptions occurring

Page fault on IF, misaligned memory access; memory

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Multiple exceptions in the same cycle
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Early exception by a later instruction
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Instruction Status Vector: Check before commit
 Precise Exceptions

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Instruction Status Vector: Check before
commit