Computer Organization Study Material R20
Computer Organization Study Material R20
in
By
H. Ateeq Ahmed, M.Tech, (Ph.D)
Assistant Professor of CSE,
Kurnool.
NOT FOR
As per JNTUA R20 CSE Syllabus SALE
ABOUT AUTHOR
ACKNOWLEDGEMENT
First I thank Almighty God for giving me the knowledge to learn and teach
various students.
Website: engineeringdrive.blogspot.com
UNIT-IV
Input/output Organization:
Accessing I/O Devices,
Interrupts,
Processor Examples, 58 – 73
Direct Memory Access,
Buses,
Interface Circuits,
Standard I/O Interfaces.
UNIT-V
Pipelining:
Basic Concepts,
Data Hazards,
74 – 91
Instruction Hazards,
Influence on Instruction Sets.
Large Computer Systems:
Forms of Parallel Processing,
Array Processors,
The Structure of General-Purpose,
Interconnection Networks.
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UNIT-I
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Characters
Character data isn't just alphabetic characters, but also numeric characters,
punctuation, spaces, etc. Most keys on the central part of the keyboard (except shift, caps
lock) are characters.
As we've discussed with signed and unsigned ints, characters need to represented. In
particular, they need to be represented in binary. After all, computers store and manipulate 0's
and 1's
However, there aren't such properties for character data, so assigning binary codes for
characters is somewhat arbitrary. The most common character representation is ASCII, which
atands for American Standard Code for Information Interchange.
One main reason to use ASCII is we need some way to represent characters as binary
numbers (or, equivalently, as bitstring patterns). There's not much choice about this since
computers represent everything in binary.
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As another example, consider the operation that adds the contents of registers R1 and
R2, and then places their sum into register R3. This action is indicated as
R3 [R1] + [R2]
This type of notation is known as Register Transfer Notation (RTN). Note that the
right-hand side of an RTN expression always denotes a value, and the left-hand side is the
name of a location where the value is to be places, overwriting the old contents of that
location.
Addressing Modes
In general, a program operates on data that reside in the computer’s memory. These
data can be organized in a variety of ways. If we want to keep track of students’ names, we
can write them in a list. Programmers use organizations called data structures to represent the
data used in computations. These include lists, linked lists, arrays, queues, and so on.
Programs are normally written in a high-level language, which enables the programmer to use
constants, local and global variables, pointers, and arrays. The different ways in which the
location of an operand is specified in an instruction are referred to as addressing modes.
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Register mode - The operand is the contents of a processor register; the name (address) of
the register is given in the instruction.
Absolute mode – The operand is in a memory location; the address of this location is given
explicitly in the instruction. (In some assembly languages, this mode is called Direct).
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computer and the display device, typically several thousand characters per second. However,
this is still much slower than the speed of a processor that can execute many millions of
instructions per second. The difference in speed between the processor and I/O devices
creates the need for mechanisms to synchronize the transfer of data between them.
The keyboard and the display are separate device as shown in fig a. the action of
striking a key on the keyboard does not automatically cause the corresponding character to be
displayed on the screen. One block of instructions in the I/O program transfers the character
into the processor, and another associated block of instructions causes the character to be
displayed.
Striking a key stores the corresponding character code in an 8-bit buffer register
associated with the keyboard. Let us call this register DATAIN, as shown in fig a. To inform
the processor that a valid character is in DATAIN, a status control flag, SIN, is set to 1. A
program monitors SIN, and when SIN is set to 1, the processor reads the contents of
DATAIN. When the character is transferred to the processor, SIN is automatically cleared to
0. If a second character is entered at the keyboard, SIN is again set to 1, and the processor
repeats.
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and pop are used to describe placing a new item on the stack and removing the top item from
the stack, respectively.
Another useful data structure that is similar to the stack is called a queue. Data are
stored in and retrieved from a queue on a first-in-first-out (FIFO) basis. Thus, if we assume
that the queue grows in the direction of increasing addresses in the memory, which is a
common practice, new data are added at the back (high-address end) and retrieved from the
front (low-address end) of the queue.
There are two important differences between how a stack and a queue are
implemented. One end of the stack is fixed (the bottom), while the other end rises and falls as
data are pushed and popped. A single pointer is needed to point to the top of the stack at any
given time. On the other hand, both ends of a queue move to higher addresses as data are
added at the back and removed from the front. So two pointers are needed to keep track of the
two ends of the queue.
Subroutines
In a given program, it is often necessary to perform a particular subtask many times
on different data-values. Such a subtask is usually called a subroutine. For example, a
subroutine may evaluate the sine function or sort a list of values into increasing or decreasing
order.
It is possible to include the block of instructions that constitute a subroutine at every
place where it is needed in the program. However, to save space, only one copy of the
instructions that constitute the subroutine is placed in the memory, and any program that
requires the use of the subroutine simply branches to its starting location. When a program
branches to a subroutine we say that it is calling the subroutine. The instruction that performs
this branch operation is named a Call instruction.
After a subroutine has been executed, the calling program must resume execution,
continuing immediately after the instruction that called the subroutine. The subroutine is said
to return to the program that called it by executing a Return instruction.
Parameter Passing
When calling a subroutine, a program must provide to the subroutine the parameters,
that is, the operands or their addresses, to be used in the computation. Later, the subroutine
returns other parameters, in this case, the results of the computation. This exchange of
information between a calling program and a subroutine is referred to as parameter passing.
Parameter passing may be accomplished in several ways.
Additional Instructions
Logic instructions
Logic operations such as AND, OR, and NOT, applied to individual bits, are the basic
building blocks of digital circuits, as described. It is also useful to be able to perform logic
operations is software, which is done using instructions that apply these operations to all bits
of a word or byte independently and in parallel.
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information. For general operands, we use a logical shift. For a number, we use an arithmetic
shift, which preserves the sign of the number.
Logical shifts:
Two logical shift instructions are needed, one for shifting left (LShiftL) and another
for shifting right (LShiftR). These instructions shift an operand over a number of bit positions
specified in a count operand contained in the instruction.
The general form of a logical left shift instruction is
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UNIT- II
ARITHMETIC
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Signed-Operand Multiplication
Booth Algorithm
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Integer Division
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Fundamental Concepts
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Multiple-Bus Organization
The resulting control sequences shown are quite long because only one data item can
be transferred over the bus in a clock cycle. To reduce the number of steps needed, most
commercial processors provide multiple internal paths that enable several transfers to take
place in parallel.
The below figure depicts a three-bus structure used to connect the registers and the
ALU of a processor. All general-purpose registers are combined into a single block called the
register file. In VLSI technology, the most efficient way to implement a number of registers
is in the form of an array of memory cells similar to those used in the implementation of
random-access memories (RAMs) described in Chapter 5. The register file in Figure 9 is said
to have three ports. There are two outputs, allowing the contents of two different registers to
be accessed simultaneously and have their contents placed on buses A and B. The third port
allows the data on bus C to be loaded into a third register during the same clock cycle.
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Hardwired Control
To execute instructions, the processor must have some means of generating the
control signals needed in the proper sequence. Computer designers use a wide variety of
techniques to solve this problem. The approaches used fall into one of two categories:
hardwired control and micro programmed control. We discuss each of these techniques in
detail, starting with hardwired control in this section.
Consider the sequence of control signals given in below figure. Each step in this
sequence is completed in one clock period. A counter may be used to keep track of the
control steps, as shown in below figure. Each state, or count, of this counter corresponds to
one control step. The required control signals are determined by the following information:
1. Contents of the control step counter
2. Contents of the instruction register
3. Contents of the condition code flags
4. External input signals, such as MFC and interrupt requests
To gain insight into the structure of the control unit, we start with a simplified view of
the hardware involved. The decoder/encoder block in above figure is a combinational circuit
that generates the required control outputs, depending on the state of all its inputs.
Multiprogrammed Control
ALU is the heart of any computing system, while Control unit is its brain. The design
of a control unit is not unique; it varies from designer to designer.
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The control signals required inside the processor can be generated using a control step
counter and a decoder/ encoder circuit. Now we discuss an alternative scheme, called micro
programmed control, in which control signals are generated by a program similar to machine
language programs.
One important function of the control unit cannot be implemented by the simple
organization in below figure. This is the situation that arises when the control unit is required
to check the status of the condition codes or external inputs to choose between alternative
courses of action. In the case of hardwired control, this situation is handled by including an
appropriate logic function, in the encoder circuitry. In micro programmed control, an
alternative approach is to use conditional branch microinstructions. In addition to the branch
address, these microinstructions specify which of the external inputs, condition codes, or,
possibly, bits of the instruction register should be checked as a condition for branching to
take place.
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UNIT-III
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UNIT-IV
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UNIT-V
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Interconnection Networks
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