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Computer Organization Study Material R20

The document is a syllabus and teaching material prepared by H. Ateeq Ahmed for engineering students following the R20 CSE syllabus. It covers various topics in computer organization, including basic structures, arithmetic operations, memory systems, input/output organization, and pipelining. The author emphasizes a real-time approach to problem-solving and aims to enhance students' understanding and skills in computer science.

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0% found this document useful (0 votes)
65 views96 pages

Computer Organization Study Material R20

The document is a syllabus and teaching material prepared by H. Ateeq Ahmed for engineering students following the R20 CSE syllabus. It covers various topics in computer organization, including basic structures, arithmetic operations, memory systems, input/output organization, and pipelining. The author emphasizes a real-time approach to problem-solving and aims to enhance students' understanding and skills in computer science.

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srinu
Copyright
© © All Rights Reserved
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in

Specially Prepared for Engineering Students


As per
R20 CSE
Syllabus

By
H. Ateeq Ahmed, M.Tech, (Ph.D)
Assistant Professor of CSE,
Kurnool.

NOT FOR
As per JNTUA R20 CSE Syllabus SALE

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ABOUT AUTHOR

H. Ateeq Ahmed completed B.Tech from Safa College of


Engineering & Technology, JNTUA, Anantapur, M.Tech from Samskruti
College of Engineering & Technology, JNTUH, Hyderabad. Currently he is
working as an Asst. Professor in the Department of CSE at Dr. KVSR
Institute of Technology, Kurnool, A.P. He has more than 12 years of
teaching experience. He has vast subject knowledge in the field of
Computer networks & organization, Network security, Software design &
testing, Operating Systems, Distributed systems, Programming in C, Java &
Python and Data mining.

His dynamic and illustrative approach towards the subjects helps


the students to enrich their skills in their academics which can help them to
achieve success in job career.

He always believes in real time approach to solve various problems


and expect the same with his students which can help them to understand
their subject in an easy and efficient manner.

He has prepared many materials of different subjects for engineering


students which can help them to prepare for exams in an easy method.

Finally, we expect our students to acquire as much knowledge as


possible and convert his dynamic teaching into their individual success.

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ACKNOWLEDGEMENT

First I thank Almighty God for giving me the knowledge to learn and teach
various students.

It’s my privilege to thanks my parents as without their right guidance and


support, this book will be a dream for me.

Finally, I thank my colleagues and friends for helping me during tough


period of time.

“A Computer is almost human, except that it does not blame its

mistakes on another computer.”

H. Ateeq Ahmed, M.Tech, (Ph.D),

Mobile no: 994 8 37 8 994,

E-mail ID: [email protected]

Website: engineeringdrive.blogspot.com

My YouTube Channel: Engineering Drive

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Syllabus & Contents

Topics Page No.


UNIT-I
Basic Structure of Computer:
Computer Types,
Functional Units,
Basic operational Concepts,
Bus Structure,
Software, Performance,
1 - 17
Multiprocessors and Multicomputer.
Machine Instructions and Programs:
Numbers, Arithmetic Operations and Programs,
Instructions and Instruction Sequencing, Addressing Modes,
Basic Input/output Operations,
Stacks and Queues,
Subroutines, Additional Instructions.
UNIT-II
Arithmetic:
Addition and Subtraction of Signed Numbers,
Design and Fast Adders,
Multiplication of Positive Numbers,
Signed-operand Multiplication,
Fast Multiplication,
Integer Division, 18 - 32
Floating-Point Numbers and Operations.
Basic Processing Unit:
Fundamental Concepts,
Execution of a Complete Instruction,
Multiple-Bus Organization,
Hardwired Control,
Multiprogrammed Control.
UNIT-III
The Memory System:
Basic Concepts,
Semiconductor RAM Memories,
Read-Only Memories,
Speed, Size and Cost, 33 – 57
Cache Memories,
Performance Considerations,
Virtual Memories,
Memory Management
Requirements,
Secondary Storage.

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UNIT-IV
Input/output Organization:
Accessing I/O Devices,
Interrupts,
Processor Examples, 58 – 73
Direct Memory Access,
Buses,
Interface Circuits,
Standard I/O Interfaces.
UNIT-V
Pipelining:
Basic Concepts,
Data Hazards,
74 – 91
Instruction Hazards,
Influence on Instruction Sets.
Large Computer Systems:
Forms of Parallel Processing,
Array Processors,
The Structure of General-Purpose,
Interconnection Networks.

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Department of CSE 1

UNIT-I

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Department of CSE 2

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 3

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 4

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 5

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 6

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 7

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 8

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 9

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 10

MACHINE INSTRUCTIONS AND PROGRAMS


Numbers, Arithmetic Operations and Characters
Number Representation
We obviously need to represent both positive and negative numbers.
Three systems are used for representing such numbers :
• Sign-and-magnitude
• 1’s-complement
• 2’s-complement
In all three systems, the leftmost bit is 0 for positive numbers and 1 for negative
numbers. The figure in the next page illustrates all three representations using 4-bit numbers.
Positive values have identical representations in al systems, but negative values have
different representations. In the sign-and-magnitude systems, negative values are represented
by changing the most significant bit (b3 in next page figure) from 0 to 1 in the B vector of the
corresponding positive value. For example, +5 is represented by 0101, and -5 is represented
by 1101. In 1’s- complement representation, negative values are obtained by complementing
each bit of the corresponding positive number. Thus, the representation for -3 is obtained by
complementing each bit in the vector 0011 to yield 1100. clearly, the same operation, bit
complementing, is done in converting a negative number to the corresponding positive value.
Converting either way is referred to as forming the 1’s-complement of a given number.
Finally, in the 2’s-complement system, forming the 2’s-complement of a number is done by
subtracting that number from 2n.
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Department of CSE 11

Hence, the 2’s complement of a number is obtained by adding 1 to the 1’s


complement of that number.

Addition of Positive numbers


Consider adding two 1-bit numbers. The results are shown in figure 2.2. Note that the
sum of 1 and 1 requires the 2-bit vector 10 to represent the value 2. We say that the sum is 0
and the carry-out is 1. In order to add multiple-bit numbers, we use a method analogous to
that used for manual computation with decimal numbers. We add bit pairs starting from the
low-order (right) and of the bit vectors, propagating carries toward the high-order (left) end.

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Department of CSE 12

Characters
Character data isn't just alphabetic characters, but also numeric characters,
punctuation, spaces, etc. Most keys on the central part of the keyboard (except shift, caps
lock) are characters.
As we've discussed with signed and unsigned ints, characters need to represented. In
particular, they need to be represented in binary. After all, computers store and manipulate 0's
and 1's
However, there aren't such properties for character data, so assigning binary codes for
characters is somewhat arbitrary. The most common character representation is ASCII, which
atands for American Standard Code for Information Interchange.
One main reason to use ASCII is we need some way to represent characters as binary
numbers (or, equivalently, as bitstring patterns). There's not much choice about this since
computers represent everything in binary.

Instructions and Instruction Sequencing


A computer must have instructions capable of performing four types of
operations.
• Data transfers between the memory and the processor registers
• Arithmetic and logic operations on data
• Program sequencing and control
• I/O transfers

(i) Register Transfer Notation


Transfer of information from one location in the computer to another. Possible
locations that may be involved in such transfers are memory locations that may be involved
in such transfers are memory locations, processor registers, or registers in the I/O subsystem.
Most of the time, we identify a location by a symbolic name standing for its hardware binary
address.
Example, names for the addresses of memory locations may be LOC, PLACE, A, VAR2;
processor registers names may be R0, R5; and I/O register names may be DATAIN,
OUTSTATUS, and so on. The contents of a location are denoted by placing square brackets
around the name of the location.
Thus, the expression
R1 [LOC]
Means that the contents of memory location LOC are transferred into processor register R1.

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Department of CSE 13

As another example, consider the operation that adds the contents of registers R1 and
R2, and then places their sum into register R3. This action is indicated as
R3 [R1] + [R2]
This type of notation is known as Register Transfer Notation (RTN). Note that the
right-hand side of an RTN expression always denotes a value, and the left-hand side is the
name of a location where the value is to be places, overwriting the old contents of that
location.

(ii) Assembly Language Notation


Another type of notation to represent machine instructions and programs. For this, we
use an assembly language format. For example, an instruction that causes the transfer
described above, from memory location LOC to processor register R1, is specified by the
statement
Move LOC, R1
The contents of LOC are unchanged by the execution of this instruction, but the old
contents of register R1 are overwritten.
The second example of adding two numbers contained in processor registers R1 and
R2 and placing their sum in R3 can be specified by the assembly language statement
Add R1, R2, R3

(iii) Basic Instructions


The operation of adding two numbers is a fundamental capability in any computer.
The statement
C=A+B
In a high-level language program is a command to the computer to add the current
values of the two variables called A and B, and to assign the sum to a third variable, C. When
the program containing this statement is compiled, the three variables, A, B, and C, are
assigned to distinct locations in the memory. We will use the variable names to refer to the
corresponding memory location addresses. The contents of these locations represent the
values of the three variables. Hence, the above high-level language statement requires the
action.
C [A] + [B]
To carry out this action, the contents of memory locations A and B are fetched from
the memory and transferred into the processor where their sum is computed. This result is
then sent back to the memory and stored in location C.

Addressing Modes
In general, a program operates on data that reside in the computer’s memory. These
data can be organized in a variety of ways. If we want to keep track of students’ names, we
can write them in a list. Programmers use organizations called data structures to represent the
data used in computations. These include lists, linked lists, arrays, queues, and so on.
Programs are normally written in a high-level language, which enables the programmer to use
constants, local and global variables, pointers, and arrays. The different ways in which the
location of an operand is specified in an instruction are referred to as addressing modes.

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Department of CSE 14

(i) Implementation of Variable and Constants


Variables and constants are the simplest data types and are found in almost every
computer program. In assembly language, a variable is represented by allocating a register or
memory location to hold its value. Thus, the value can be changed as needed using
appropriate instructions.

Register mode - The operand is the contents of a processor register; the name (address) of
the register is given in the instruction.

Absolute mode – The operand is in a memory location; the address of this location is given
explicitly in the instruction. (In some assembly languages, this mode is called Direct).

(ii) Indirection and Pointers


In the addressing modes that follow, the instruction does not give the operand or its
address explicitly, Instead, it provides information from which the memory address of the
operand can be determined. We refer to this address as the effective address (EA) of the
operand.
Indirect mode – The effective address of the operand is the contents of a register or memory
location whose address appears in the instruction.

Basic input/output operations


We now examine the means by which data are transferred between the memory of a
computer and the outside world. Input/Output (I/O) operations are essential, and the way they
are performed can have a significant effect on the performance of the computer.
Consider a task that reads in character input from a keyboard and produces character
output on a display screen. A simple way of performing such I/O tasks is to use a method
known as program-controlled I/O. The rate of data transfer from the keyboard to a computer
is limited by the typing speed of the user, which is unlikely to exceed a few characters per
second. The rate of output transfers from the computer to the display is much higher. It is
determined by the rate at which characters can be transmitted over the link between the
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Department of CSE 15

computer and the display device, typically several thousand characters per second. However,
this is still much slower than the speed of a processor that can execute many millions of
instructions per second. The difference in speed between the processor and I/O devices
creates the need for mechanisms to synchronize the transfer of data between them.

The keyboard and the display are separate device as shown in fig a. the action of
striking a key on the keyboard does not automatically cause the corresponding character to be
displayed on the screen. One block of instructions in the I/O program transfers the character
into the processor, and another associated block of instructions causes the character to be
displayed.
Striking a key stores the corresponding character code in an 8-bit buffer register
associated with the keyboard. Let us call this register DATAIN, as shown in fig a. To inform
the processor that a valid character is in DATAIN, a status control flag, SIN, is set to 1. A
program monitors SIN, and when SIN is set to 1, the processor reads the contents of
DATAIN. When the character is transferred to the processor, SIN is automatically cleared to
0. If a second character is entered at the keyboard, SIN is again set to 1, and the processor
repeats.

Stacks and queues


A computer program often needs to perform a particular subtask using the familiar
subroutine structure. In order to organize the control and information linkage between the
main program and the subroutine, a data structure called a stack is used. This section will
describe stacks, as well as a closely related data structure called a queue.
Data operated on by a program can be organized in a variety of ways. We have
already encountered data structured as lists. Now, we consider an important data structure
known as a stack. A stack is a list of data elements, usually words or bytes, with the accessing
restriction that elements can be added or removed at one end of the list only. This end is
called the top of the stack, and the other end is called the bottom. Another descriptive phrase,
last-in-first-out (LIFO) stack, is also used to describe this type of storage mechanism; the last
data item placed on the stack is the first one removed when retrieval begins. The terms push

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Department of CSE 16

and pop are used to describe placing a new item on the stack and removing the top item from
the stack, respectively.
Another useful data structure that is similar to the stack is called a queue. Data are
stored in and retrieved from a queue on a first-in-first-out (FIFO) basis. Thus, if we assume
that the queue grows in the direction of increasing addresses in the memory, which is a
common practice, new data are added at the back (high-address end) and retrieved from the
front (low-address end) of the queue.
There are two important differences between how a stack and a queue are
implemented. One end of the stack is fixed (the bottom), while the other end rises and falls as
data are pushed and popped. A single pointer is needed to point to the top of the stack at any
given time. On the other hand, both ends of a queue move to higher addresses as data are
added at the back and removed from the front. So two pointers are needed to keep track of the
two ends of the queue.

Subroutines
In a given program, it is often necessary to perform a particular subtask many times
on different data-values. Such a subtask is usually called a subroutine. For example, a
subroutine may evaluate the sine function or sort a list of values into increasing or decreasing
order.
It is possible to include the block of instructions that constitute a subroutine at every
place where it is needed in the program. However, to save space, only one copy of the
instructions that constitute the subroutine is placed in the memory, and any program that
requires the use of the subroutine simply branches to its starting location. When a program
branches to a subroutine we say that it is calling the subroutine. The instruction that performs
this branch operation is named a Call instruction.
After a subroutine has been executed, the calling program must resume execution,
continuing immediately after the instruction that called the subroutine. The subroutine is said
to return to the program that called it by executing a Return instruction.

Parameter Passing
When calling a subroutine, a program must provide to the subroutine the parameters,
that is, the operands or their addresses, to be used in the computation. Later, the subroutine
returns other parameters, in this case, the results of the computation. This exchange of
information between a calling program and a subroutine is referred to as parameter passing.
Parameter passing may be accomplished in several ways.

Additional Instructions
Logic instructions
Logic operations such as AND, OR, and NOT, applied to individual bits, are the basic
building blocks of digital circuits, as described. It is also useful to be able to perform logic
operations is software, which is done using instructions that apply these operations to all bits
of a word or byte independently and in parallel.

(a) Shift and Rotate Instructions:


There are many applications that require the bits of an operand to be shifted right or
left some specified number of bit positions. The details of how the shifts are performed
depend on whether the operand is a signed number or some more general binary-coded
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Department of CSE 17

information. For general operands, we use a logical shift. For a number, we use an arithmetic
shift, which preserves the sign of the number.

Logical shifts:
Two logical shift instructions are needed, one for shifting left (LShiftL) and another
for shifting right (LShiftR). These instructions shift an operand over a number of bit positions
specified in a count operand contained in the instruction.
The general form of a logical left shift instruction is

*******

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Department of CSE 18

UNIT- II
ARITHMETIC

Addition and Subtraction of Signed Numbers

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Department of CSE 19

Design of Fast Adders

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Department of CSE 20

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Department of CSE 21

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Department of CSE 22

Multiplication of Positive Numbers

Signed-Operand Multiplication
Booth Algorithm

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Department of CSE 23

Integer Division

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Department of CSE 24

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Department of CSE 25

Floating Point Numbers and Operations

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Department of CSE 26

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Department of CSE 27

BASIC PROCESSING UNIT

Fundamental Concepts

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Department of CSE 28

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Department of CSE 29

Execution of a Complete Instruction

Figure: Steps in Executing a Complete Instruction

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Department of CSE 30

Multiple-Bus Organization
The resulting control sequences shown are quite long because only one data item can
be transferred over the bus in a clock cycle. To reduce the number of steps needed, most
commercial processors provide multiple internal paths that enable several transfers to take
place in parallel.
The below figure depicts a three-bus structure used to connect the registers and the
ALU of a processor. All general-purpose registers are combined into a single block called the
register file. In VLSI technology, the most efficient way to implement a number of registers
is in the form of an array of memory cells similar to those used in the implementation of
random-access memories (RAMs) described in Chapter 5. The register file in Figure 9 is said
to have three ports. There are two outputs, allowing the contents of two different registers to
be accessed simultaneously and have their contents placed on buses A and B. The third port
allows the data on bus C to be loaded into a third register during the same clock cycle.

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Department of CSE 31

Hardwired Control
To execute instructions, the processor must have some means of generating the
control signals needed in the proper sequence. Computer designers use a wide variety of
techniques to solve this problem. The approaches used fall into one of two categories:
hardwired control and micro programmed control. We discuss each of these techniques in
detail, starting with hardwired control in this section.
Consider the sequence of control signals given in below figure. Each step in this
sequence is completed in one clock period. A counter may be used to keep track of the
control steps, as shown in below figure. Each state, or count, of this counter corresponds to
one control step. The required control signals are determined by the following information:
1. Contents of the control step counter
2. Contents of the instruction register
3. Contents of the condition code flags
4. External input signals, such as MFC and interrupt requests

To gain insight into the structure of the control unit, we start with a simplified view of
the hardware involved. The decoder/encoder block in above figure is a combinational circuit
that generates the required control outputs, depending on the state of all its inputs.

Multiprogrammed Control
ALU is the heart of any computing system, while Control unit is its brain. The design
of a control unit is not unique; it varies from designer to designer.

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Department of CSE 32

Some of the commonly used control logic design methods are;


• Sequence Reg & Decoder method
• Hard-wired control method
• PLA control method
• Micro-program control method

The control signals required inside the processor can be generated using a control step
counter and a decoder/ encoder circuit. Now we discuss an alternative scheme, called micro
programmed control, in which control signals are generated by a program similar to machine
language programs.

One important function of the control unit cannot be implemented by the simple
organization in below figure. This is the situation that arises when the control unit is required
to check the status of the condition codes or external inputs to choose between alternative
courses of action. In the case of hardwired control, this situation is handled by including an
appropriate logic function, in the encoder circuitry. In micro programmed control, an
alternative approach is to use conditional branch microinstructions. In addition to the branch
address, these microinstructions specify which of the external inputs, condition codes, or,
possibly, bits of the instruction register should be checked as a condition for branching to
take place.

*******

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 33

UNIT-III

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 34

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 35

Computer Organization By: H. Ateeq Ahmed

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www.android.universityupdates.in | www.universityupdates.in | www.ios.universityupdates.in

Department of CSE 36

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 37

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 38

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 39

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 40

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 41

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 42

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 43

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 44

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 45

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 46

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 47

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 48

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 49

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 50

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 51

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 52

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 53

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 54

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 55

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 56

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 57

*******

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 58

UNIT-IV

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 59

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 60

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 61

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 62

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 63

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 64

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 65

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 66

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 67

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 68

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 69

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 70

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 71

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 72

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 73

*******

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 74

UNIT-V

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 75

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 76

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 77

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 78

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 79

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 80

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 81

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 82

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 83

LARGE COMPUTER SYSTEMS

Forms of Parallel Processing

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 84

Interconnection Networks

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 85

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 86

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 87

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 88

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 89

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 90

Computer Organization By: H. Ateeq Ahmed

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Department of CSE 91

*******

Computer Organization By: H. Ateeq Ahmed

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