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The document outlines a digital electronics course agenda, including an introduction to the syllabus and basic computer structure. It covers various computer types, functional units, data representation, and performance metrics. Additionally, it discusses historical perspectives on computer generations and number systems, including conversion methods and data types.

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0% found this document useful (0 votes)
17 views71 pages

$UNIT-1

The document outlines a digital electronics course agenda, including an introduction to the syllabus and basic computer structure. It covers various computer types, functional units, data representation, and performance metrics. Additionally, it discusses historical perspectives on computer generations and number systems, including conversion methods and data types.

Uploaded by

sameera ch
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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1

DIGITAL ELECTRONICS (DE) (A27H5)


DIGITAL LOGIC DESIGN AND COMPUTER ORGANIZATON (DLD&CO)

D.SAMEERA
ASSISTANT PROFESSOR, M.TECH (CSE),(Ph.D.)
12+ YR EXP.
BVRIT, NARSAPUR
2

AGENDA FOR TODAY’s CLAss

S.NO CONTENT DURATION


1 INTRODUCTION (FACULTY & STUDENTS) 10 MIN
2 INTRODUCTION OF DE SYLLABUS UNIT WISE 15 MIN
3 INTRODUCTION OF BASIC STRUCTURE OF 15 MIN
COMPUTERS
4 KAHOOT GAMING 15 MIN
5 QUESTIONS/FEEDBACK 5 MIN

D.SAMEERA, ASST.PROF,BVRIT 6/11/2018


3

D.SAMEERA, ASST.PROF,BVRIT 6/11/2018


4

UNIT – 1
PART -1
BASIC STRUCTURE OF COMPUTERS
5
INTRODUCTION :

 It shows computer hardware and computer architecture.


Consists of electronic circuits ,displays, It encompasses the specification of an
magnetic & optical storage media, electro instruction set and the hardware units that
mechanical equipment & communication implement the instruction.
facilities. Hardware + software

 Ex : Embedded Systems

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6
COMPUTER TYPES:

 Digital computer :Fast electronic calculating machine .List of instructions processes and given
output.
 Many types of computers exits that differ widely in size, cost, computational power, and intend
use.
1. Personal computer Ex: desktop
2. Notebook computers Ex: iPad
3. Workstations Ex: movie graphics , bhahubali
4. Enterprise systems Ex: Mainframes
5. Servers Ex: jntu server, all organization servers
6. Supercomputers Ex: whether forecasting, simulation, aircraft etc..

D.SAMEERA, ASST.PROF,BVRIT 6/11/2018


1 4
7

2 5

3 6

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8
Functional units :

 Computer consists of five functionally independent main parts:


1. Input
2. Memory
3. Athematic & logic ARTHEMATIC
INPUT & LOGIC
4. Output
MEMORY
5. Control units

OUTPUT CONTROL

INPUT / OUTPUT PROSESSOR

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9
Examples:

 C Program code for giving instructions(step by step)


Run the program, execute it and get the output
 Binary format for digital circuits having ON & OFF means 0 & 1.
I. Starting 2 possible values 0 & 1. 0 1
II. Occasionally BCD (Binary Coded Decimal) introduced, in which decimal digit is encoded by
4 digits. 0 0 0 1
III. ASCII (American Standard code for information interchange ) , 7 bit code. 0 0 0 0 0 0 1

IV. EBCDIC(Extended binary coded decimal interchange code), 8 bit code


0 0 0 0 0 0 0 1
Max it uses 256 bit code for bit coin
D.SAMEERA, ASST.PROF,BVRIT 6/11/2018
10

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11
BASIC OPERATIONAL CONCEPTS:

 List of instructions is stored in memory, individual instructions are brought from the memory into
processor, execute the specified operations. EX: Tracking with F7 in C
 Ex : ADD Loc A , R0
Register Operand
Instruction added at memory location
 Finally places the sum in R0. [R0 = Value in address + R0 value]
 Ex: LOAD Loc A , R1 [Load instruction of Loc A to R1]
ADD R1 , R0 [Adds the contents of registers R1 & R0,Places sum in R0]

D.SAMEERA, ASST.PROF,BVRIT 8/26/2020


MEMORY
12

MAR : MEMORY ADDRESS REGISTERS


MAR MDR PC : PROGRAM COUNTER
CONTROL IR : INSTRUCTION REGISTER
R0 MDR : MEMORY DATA REGISTER
PC R1
:
Rn-1 ALU
IR
General purpose
registers Processor

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13
Bus structure :

 The bits are transferred simultaneously over many wires , OR lines one Bit per line.
 a group of Lines that serves as a connecting path for several devises is called a bus.
 Is carries data, address and control purpose.
 For Interconnecting functional units and it take one transfer at a time only 2 units can actively use the bus .
 Single bus :structure low cost flexibility
 Multiple buses : high cost it can Carry two or more transfer at same time .

INPUT OUTPUT MEMORY PROCESSOR

Single Bus Structure


It connects buffer registers ,processors , memories and external devices like printers and scanners.
D.SAMEERA, ASST.PROF,BVRIT 8/26/2020
14
SOFTWARE :

 In order for a user to enter and run an application program ,the computer must already contain some system software in
its memory.
 A programmer using a high level language need not to know the details of machine program instructions .
a) Compiler: is system software program called compiler.
 It Translate the high level language program into a suitable machine language programme containing instructions such as the ADD,
LOAD instructions
b) Text editor : entering and editing application programs
 source program entering at a keyboard and stored in a file. (Simply a sequence of alpha numeric characters or binary data stored in
memory )
c) Operating system : is a large program collection of routines that is used to control the sharing of and interaction among
computer units As they execute application programs . Ex: Printer (Interrupt routine)

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Performance:

 The most important measure of the performance of a computer is how quickly it in execute
programs .
 For fetching instructions to getting results . The sum of this period As the processor time
needed to execute a program .

Main Cache
memory Processor
memory

D.SAMEERA, ASST.PROF,BVRIT 6/11/2018


1. Processor Clock :
a) Processor circuits are controlled by a timing signal called a clock.
b) The clock defines regular time intervals, called clock cycles. 16
J1 1-2 1-----1---J1--1-----1-----1
J2 3-4 1-----1-----1-----1—J2---1
J3 1-2 1-----1-----1-----1-----1
2. Basic Performance Equation:
𝑁∗𝑆
The Program execution time is T =
𝑅
T processor time required to execute a program
N Actual no. of instructions for execution
S Average no. of steps needed to execute one machine instruction, in one clock cycle.
R clock rate , Cycle per second.

3. Pipelining and super scalar operations:


ADD R1,R2,R3

It adds R1,R2 and stores results in R3. this processes is called Pipelining.
single Instruction executes in one clock cycle is Pipelining and multiple instructions executes in one clock
cycle is super Scalar execution/operation.

D.SAMEERA, ASST.PROF,BVRIT 6/11/2018


3. Pipelining and super scalar operations:
Ex: Pipeline 17
I1 C1 1—C1---1—C2---1—C3---1
I2 C2
I3 C1 cycle is busy to execute program
I4 C3

Super scalar :
I1 C1 1—C1-C3--1—C2---1—C3---1
I2 C2
I3 C1
Two instructions are executed at same clock cycle.
I4 C3

4. clock rate:
There are 2 possibilities to improve clock rate : 1. Improving Integrated circuits technology
2. reduce the amount of processing done or clock period.
Ex: Old days TV to LCD & LED.

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MULTI PROCESSOR
AND MULTI
COMPUTER :

 Generally one computer having one processor


but large computer system may contain no.
of processor system.
 All these processors are using same memory
and it shares data to interconnected systems
those are multi computers.
 Multiprocessors computers share the data to
multicomputer systems.

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Historical perspective:

 FIRST GENERATION: John Von Neumann


 Using assembly language programs then compiler converts to machine level language.
 For basic athematic operations.
 SECOND GENERATION: AT&T Bell laboratories
 Using high level language (Fortran)
 I/O Processors were developed
 THIRD GENERATION:
 Integrated Circuits were developed (low cost ,fast processing)
 Introduced micro programming , parallelism , and pipelining
 Operating system software allowed and cache & virtual memories were developed.

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 FOURTH GENERATION:
 Introduced large sections of the main memory of small computers could be implemented on single chip.
 Very large scale integration [VLSI] (1000 ‘s of transistors could be placed)

MICROPROCESSOR

 FIFTH GENERATION:
 New features are added and introduced artificial intelligence, parallel mechanism, distributed systems.

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UNIT – 1
PART -2
DATA REPRESENTATION
23

UNIT-I: Number System Classes: 8

Number Systems, Base Conversion Methods, Complements of Numbers,


Signed Numbers-Signed Magnitude, 1’s Complement and 2’s complement
representation, Signed and unsigned addition /subtraction, Binary Codes-
Binary Coded Decimal, Exess-3 code, Gray code, Code Converters-Binary to
Gray, Gray to Binary, Binary to BCD , BCD to Binary and Error Detection
Codes-Parity code, Hamming code.
24
DATA TYPES:

 The term data refer to factual information used for analysis or reasoning.
 Data itself has no meaning, becomes information when it is assigned a meaning.
 The register stored information i.e. in different formats BITS,NUMBERS,& other binary coded information.
 Data types found in registers of digital computers:
 Numbers
 Letters of the alphabet
 Other discrete symbols
Binary coded form made up of flipflops means 0’s and 1’s.

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Number system:

 The numeric system we use daily is the decimal system. But machine understands binary .
 Ex : decimal 7 converted binary with 4 bit code is 0111. means decimal 1 digit is equal to binary 4
digits.
 A base of a number system or radix defines the range of values that a digit may have.
 In the binary system or base 2, there can be only two values for each digit of a number, either a "0"
or a "1".
 In the octal system or base 8, there can be eight choices for each digit of a number:
 "0", "1", "2", "3", "4", "5", "6", "7".
 In the decimal system or base 10, there are ten different values for each digit of a number: "0", "1", "2",
"3", "4", "5", "6", "7", "8", "9".
 In the hexadecimal system, we allow 16 values for each digit of a number: "0", "1", "2", "3", "4", "5", "6",
"7", "8", "9", "A", "B", "C", "D", "E", and "F".
 Where “A” stands for 10, “B” for 11 and so on.

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D.SAMEERA, ASST.PROF,BVRIT 6/11/2018


Conversions: To determine the quantity that the no. represents, it is 27
necessary to multiply each digit by an integer power of “r” and then form the sum of
all weighted digits.

 DECIMAL to DECIMAL:
 The decimal no. system radix = 10. symbols are 0,1,2,3,4,5,6,7,8,9 , String = 724.5
 Conversion (724.5)10 = 7*102+2*101+4*100+5*10-1 [NOTE : n…3 2 1 0 -1 -2 -3… -n ]
 BINARY to DECIMAL: [NOTE : …Thousands Hundreds Tens Ones]
 The binary no. system radix = 2 symbols are 0,1 , String of digits = 101101
 Conversion (101101)2 = 1*25+0*24+1*23+1*22+0*21+1*20 = (45)10
 OCTAL to DECIMAL:
 The Octal no. system radix = 8 symbols are 0,1,2,3,4,5,6,7 , String = 736.4
 Conversion (736.4)8 = 7*82+3*81+6*80+4*8-1 = (478.5)10
 HEXA to DECIMAL:
 The Octal no. system radix = 16 symbols are 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F , String = F3
 Conversion (F3)8 = F*161+3*160 = 15*16+3= (243)10

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CONVERSIONS 1. (673.124)8 = ( )10

EXCERCISES: 2. (306.D)16 =( )10


3. (10111001)2 = ( )10

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Decimal to binary conversion:

 The decimal no. system radix = 10. symbols are 0,1,2,3,4,5,6,7,8,9 , String = 41.6875
 In this string system is carried out by separating the number into 2 parts Integer & fraction .
 (41.6875)10 Integer = 41 & fraction = 0.6875
Divisions by r Multiply by r 0.6875
2 |41 2
|20 | 1 (0.6875)10 = (1011)2
Note : a0,a1,a2…an from
______________________

|10 | 0 1.3750
|5 | 0 bottom to top 2
From top to bottom
|2 | 1
______________________

0.7500
|1 | 0
2
|0 |1 ______________________

(415)10 = (101001)2 1.5000


2
______________________

1.0000

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Octal & hexadecimal to binary vice versa :

 The conversions from and to binary ,octal & hexadecimal representation plays an important
part in digital computers.
 Since, 23 =8, and 24 =16.,each octal digits correspondence to 3 binary digits.
 Each hexadecimal digits correspondence to 4 binary digits.
 Partition the binary number into groups of 3 bits.
 OCT 1 2 7 5 4 3

 Ex: DEC
BINARY 1 0 1 0 1 1 1 1 0 1 1 0 0 0 1 1

 HEXA A F 6 3
 !6-bit Register Can Be Used To Store Any Binary No. From 0 To 216-1.
D.SAMEERA, ASST.PROF,BVRIT 6/11/2018
 BIN OCT HEX DEC
 ----------------------
Code for one octal digit means 7
 0000 00 0 0 bits of octal = 1 digit of octal
 0001 01 1 1
 0010 02 2 2
 0011 03 3 3
 0100 04 4 4 Code for one hexadecimal digit
 0101 05 5 5 means 15 bits of hexadecimal = 1
digit of hexadecimal
 0110 06 6 6
Relationship between
 0111 07 7 7
Binary - Octal and Binary-
 ----------------------
hexadecimal
 001000 10 8 8
 001001 11 9 9
 001010 12 A 10
 001011 13 B 11
 001100 14 C 12
 001101 15 D 13
 001110 16 E 14
 001111 17 F 15
D.SAMEERA, ASST.PROF,BVRIT 6/11/2018 32
 BIN OCT HEX DEC
 -----------------------------------------------------------
-
 001 000 10 08 8
Relationship between Binary -  001 001 11 09 9
Octal and Binary-hexadecimal  010 100 24 14 20
 001 100 011 143 63 99
 F8

D.SAMEERA, ASST.PROF,BVRIT 6/11/2018 33


34
EXCERCISES: DEC,OCT, & HEXA TO BINARY

 CONVERT DECIMAL 41 TO BINARY.


 CONVERT DECIMAL 153.513 TO BINARY.
 CONVERT DECIMAL 683.816,1342.916 TO BINARY

 1 0 1 1 0 0 0 1 1 0 1 0 1 1 . 1 1 1 1
CONVERT BINARY

0 0 0 0 0 1 1 0 TO OCTAL & HEXA DECIMAL.


 CONVERT OCTAL 127.4 TO DECIMAL.
 CONVERT HEXA B65F TO DECIMAL.

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Practice session:
Hex Binary Decimal
0 0000 0
1 0001 1
2 0010 2
3 0011 3
4 0100 4
 Hex-to-Decimal Conversion 5 0101 5
2AF16 = (2 x 162) + (10 x 161) + (15 x 16o) 6 0110 6
7 0111 7
= 51210 + 16010 + 1510 8 1000 8
= 68710 9 1001 9
A 1010 10
 Decimal-to-Hex Conversion B 1011 11
42310 / 16 = 26 remainder 7 (Hex number will end with 7) : LSB C 1100 12
2610 / 16 = 1 remainder 10 D 1101 13
E 1110 14
110 / 16 = 0 remainder 1 (Hex number will start with 1) : MSB
F 1111 15
Read the result upward to give an answer of 42310 = 1A716 14 0001 0100 20
 Hex-to-Binary Conversion F8 1111 1000 248
9F216 = 9 F 2 ◆ Binary-to-Hex Conversion
= 1001 1111 0010 1 1 1 0 1 0 0 1 1 02 = 0 0 1 1 1 0 1 0 0 1 1 0
= 1001111100102 3 A 6
= 3A616
D.SAMEERA, ASST.PROF,BVRIT 6/11/2018
36
Bcd & ascii:
 Binary-Coded-Decimal Code
 Each digit of a decimal number is represented by its binary equivalent
8 7 4 (Decimal)
1000 0111 0100 (BCD)
 Only the four bit binary numbers from 0000 through 1001 are used
 Comparison of BCD and Binary
13710 = 100010012 (Binary) - require only 8 bits
13710 = 0001 0011 0111BCD (BCD) - require 12 bits

 Alphanumeric Representation
 Alphanumeric character set.
 10 decimal digits, 26 letters, special character($, +, =,….)

 ASCII(American Standard Code for Information Interchange)


 Standard alphanumeric binary code uses seven bits to code 128 characters

D.SAMEERA, ASST.PROF,BVRIT 6/27/2018


BCD : (Unassigned numbers)
37
Decimal BCD Unassigned Bit Combinations
0 0000 No. of elements in the set is not a
1 0001 multiple power of 2.
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
------------------------------------------
10 0001 0000
11 0001 0001 BCD – BINARY CONVERSION:
12 0001 0010 1. BCD to DECIMAL
13 0001 0011 2. DECIMAL to BCD
14 0001 0100
15 0001 0101
----------------------------------------------
20 0010 0000
50 0101 0000
99 1001 1001
248 0010 0100 1000

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 Character Binary code Character Binary code Character Binary code Character Binary code
 A 100 0001 U 101 0101 0 011 0000 / 010 1111
B 100 0010 V 101 0110 1 011 0001 , 010 1100
C 100 0011 W 101 0111 2 011 0010 = 011 1101
D 100 0100 X 101 1000 3 011 0011
E 100 0101 Z 101 1010 4 011 0100
F 100 0110 5 011 0101
G 100 0111 6 011 0110
H 100 1000 7 011 0111
I 100 1001 8 011 1000
J 100 1010 9 011 1001
K 100 1011
L 100 1100
M 100 1101 space 010 0000
N 100 1110 . 010 1110
O 100 1111 ( 010 1000
P 101 0000 + 010 1011
Q 101 0001 $ 010 0100
R 101 0010 * 010 1010
S 101 0011 ) 010 1001
T 101 0100 - 010 1101

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Complements:

 Complements are used in digital computers for simplifying the subtraction operation and for
logical manipulation

 There are two types of complements for base r system


 1) r’s complement 2) (r-1)’s complement
 Binary number : 2’s or 1’s complement
 Decimal number : 10’s or 9’s complement

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Complements: for simplifying subtraction and logical
manipulations.

 Diminished Radix Complements or (r-1)’s Complement N : given number


r : base
 (r-1)’s Complement of N = (rn-1)-N n : digit number

 9’s complement of N=546700


(106-1)-546700= (1000000-1)-546700= 999999-546700
546700(N) + 453299(9’s com)
= 453299
=999999
Ex: N=012398

 1’s complement of N=101101


101101(N) + 010010(1’s com)
(26-1)-101101= (1000000-1)-101101= 111111-101101 =111111
= 010010

 or 101101 = 010010 [all 0’s becomes 1’s and 1’s become 0’s]
 Ex: 1. 1011000 2. 0101101 26 =64 LCM (64) = 1000000
D.SAMEERA, ASST.PROF,BVRIT 6/11/2018
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https://www.powtoon.com/s/cdZjT5Xr1o0/1/m

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42
* r’s Complement
(r-1)’s Complement +1 =(rn-1)-N+1= rn-N

Treat this last digit as 10

 Radix Complements or r’s Complement


 r’s Complement of N = rn-N
 10’s complement of 2389 = 7610+1= 7611 or 9999 N=2300 then 9999
 Ex: N=012398 2389 2300
 7611 7600

 2’s complement of 1101100 = 0010011+1= 0010100 or 1101100 = 0010100


 or 0010011 = 1101101

From last 1st 1 will not change.

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6/11/2018
D.SAMEERA, ASST.PROF,BVRIT
 Subtraction of Unsigned Numbers
 1) If M + (rn-N) (M=Minuend, N= Subtrahend) 44
 2) If M  N : Discard end carry, Result = M-N
 3) If M  N : No end carry, Result = - r’s complement of (N-M)

MN
 [x-y means x+(2’s or 10’s complement of y)] MN
13250(M) - 72532(N) = -59282
 Decimal Example)
13250
72532(M) - 13250(N) = 59282 No End Carry
+ 27468 (10’s complement of 72532)
72532 00 40718
Result = -(10’s complement of 40718)
Discard + 86750 (10’s complement of 13250)
End Carry = -(59281+1) = -59282
11 59282
Result = 59282
XY XY 1000011(X) - 1010100(Y) = -0010001
 Binary Example)
1000011
1010100(X) - 1000011(Y) = 0010001 + 0101100 (2’s complement of 1010100)
1010100 0 1101111
Result = -(2’s complement of 1101111)
+ 0111101 (2’s complement of 1000011)
= -(0010000+1) = -0010001
1 0010001
Result = 0010001

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 Two ways of specifying the position of the binary point in a register


 1) Fixed Point : the binary point is always fixed in one position
 A binary point in the extreme left of the register(Fraction : 0.xxxxx)
 A binary point in the extreme right of the register(Integer : xxxxx.0)
 The binary point is not actually present, but the number stored in the register is treated as a fraction or as an integer

 2) Floating Point : the second register is used to designate the position of the binary point in the first register.
 Integer Representation +14 -14
 Signed-magnitude representation 0 0001110 1 0001110

 Signed-1’s complement representation 0 0001110 1 1110001


0 0001110 1 1110010
 Signed-2’s complement representation

Most Common
D.SAMEERA, ASST.PROF,BVRIT 6/11/2018
46
Arithmetic Addition :

 Addition Rules of Ordinary Arithmetic


 The signs are same : sign= common sign, result= add (+23)+(+12)= +35 or (-23)+(-12)= -35
 The signs are different : sign= larger sign, result= larger-smaller (+23)+(-12)= +11
 Addition Rules of the signed 2’s complement + 6 00000110 - 6 11111010
 Add the two numbers including their sign bits + 13 00001101 + 13 00001101
+ 19 00010011 + 7 00000111
 Discard any carry out of the sign bit position
+ 6 00000110 - 6 11111010
 For verifying whether -7 value is correct or not - 13 11110011 - 13 11110011
- 7 11111001 - 19 11101101
need to apply 2’s complement of -7.
2’s(11111001) = 00000111

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47
Arithmetic Subtraction:

 Here take the 2’s complement of the subtrahend(N) (including sign bit) and add it to the Minuend(M)(Including the sign bit).
 Subtraction is changed to an Addition
 (± A) - (+ B) = (± A) + (- B) -6 11111010
 (± A) - ( - B) = (± A) + (+ B) +13 0 0 0 0 1 1 0 1
----------------------------
 Ex: (-6)-(-13) = +7 [ If we take 8 bit code] [Here –n means 2’s complement of (n)] +7 1 0 0 0 0 0 1 1 1
 +6 = 00000110 -6 = 11111010 Discard end carry
 +13 = 00001101 -13 = 11110011
 The binary numbers in the 2’s complement system are added and subtracted by the same basic addition and subtraction
rules as unsigned numbers.

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overflow:

 An overflow may occur if the two numbers added are both positive or both negative
 When two unsigned numbers are added
* Overflow
 an overflow is detected from the end carry out of the MSB position
+ve –ve +ve –ve
 When two signed numbers are added carries 0 1 carries 1 0
+ 70 0 1000110 - 70 1 0111010
 the MSB always represents the sign + 80 0 1010000 - 80 1 0110000
- the sign bit is treated as part of the number -------- ---------------- ------ ---------------
+ 150 1 0010110 - 150 0 1101010
- the end carry does not indicate an overflow

 If these two carries are not equal, an overflow condition is produced(Exclusive-OR gate = 1)

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Fixed-Point Representation :

 Computers must represent everything with 1’s (-ve) and 0’s(+ve), including the sign of a number
and fixed/floating point number
 2 ways to represent Numeric Data
 1) Fixed Point
 2) Floating Point
 Binary/Decimal Point
 The position of the binary/decimal point is needed to represent fractions, integers, or mixed integer-
fraction number

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Decimal Fixed-Point Representation :

 A 4 bit decimal code requires four F/Fs for each decimal digit
 The representation of 4385 in BCD requires 16 F/Fs (0100 0011 1000 0101)
 The representation in decimal is wasting a considerable amount of storage space and the circuits required to perform
decimal arithmetic are more complex
* (+375) + (-240)
375 + (10’s comp of 240)= 375 + 760

0 375 (0000 0011 0111 0101)


+9 760 (1001 0111 0110 0000)
---------- --------------------------------
0 135 (0000 0001 0011 0101)

 Many computers have direct decimal number in BCD for calculations ,if not it convert to binary BCD.

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Floating-Point Representation :

 The floating-point representation of a number has two parts


* Decimal + 6132.789
 1) Mantissa : signed, fixed-point number
Fraction Exponent
 2) Exponent : position of binary(decimal) point +0.6132789 +4

 Scientific notation : m x re (+0.6132789 x 10+4)


Fraction Exponent
 m : mantissa, r : radix, e : exponent 01001110 000100
 Example : m x 2e = +(.1001110)2 x 2+4

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 NORMALIZATION:
 A floating point number is said to be normalized, if the most significant digit of the mantissa is nonzero. 55
 Ex: 350 normalized. 000350 not normalized
8 bit code
 Ex: 00011010 not normalized 11001001 normalized.

 2 main standard formats forms of floating point numbers are:


1. ANSI (American National standard Institute)
2. IEEE (Institute of electrical and electronic engineering)
the ANSI 32 bit floating point representation Single Precision
byte 1 byte 2 byte 3 byte 4
Ex: 13 = 1101 = 0.1101 × 24
0 1 7 8 31 = 00000100 11010000 00000000
Sign Exponent Mantissa -17 = -10001= -0.10001 × 25
= 10000101 10001000 00000000
-0.125 = -0.001 = -.1 × 2-2
0→+
Binary point = 11111110 1000000
1→-
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IEEE FORMAT FOR SINGLE
S EEEEEEEE FFFFFFFFFFFFFFFFFFFFFFF 0 1 8
9 31
PRECISION
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0 1 11 12 63 double Precision
Sign Exponent Mantissa

0 1 15 16 127 Quadruple Precision

Sign Exponent Mantissa

Single Double Quadruple

No. of sign bit 1 1 1

No. of exponent bit 8 11 15

No. of fraction 23 52 111

Total bits used 32 64 128

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Other Binary Codes :

 GRAY CODE:
 This is a variable weighted code and is cyclic.
 This means that it is arranged so that every transition from one value to the next value involves only one bit change. (Ex: K-Map)
 The gray code is sometimes referred to as reflected binary. (mainly used for correcting errors in digital communications)
 Binary number → Gray code
1 0 1 0 1 1 0 0 1 1 1 (binary number)

1 1 1 1 1 0 1 0 1 0 0 (gray code)

Gray code → Binary number

1 1 1 1 1 0 1 0 1 0 0 (gray code)

1 0 1 0 1 1 0 0 1 1 1 (binary number)

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Decimal Binary Gray 58
0 0000 0000
1 0001 0001
2 0010 0011
3 0011 0010
4 0100 0110
5 0101 0111
6 0110 0101
7 0111 0100
8 1000 1100
9 1001 1101
10 1010 1111
11 1011 1110
12 1100 1010
13 1101 1011
14 1110 1001
15 1111 1000

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Other Binary Codes :

 Binary coded Decimal :


 In computing and electronic systems, binary-coded decimal (BCD) is an encoding for decimal numbers in which each digit is
represented by its own binary sequence.
 Its drawbacks are It occupies more space than a pure binary representation.
 To BCD-encode a decimal number using the common encoding, each decimal digit is stored in a four-bit nibble.

Decimal: 0 1 2 3 4 5 6 7 8 9

BCD: 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001

 The position weights of the BCD code are 8, 4, 2, 1. Other codes (shown in the table) use position weights of 8, 4, -2, -1
and 2, 4, 2, 1.

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COMPUTER TYPES:

 EXCESS-3 CODE : (USE : For finding 9’s/1’s complement value easily)


 Binary decimal ADD 3 EXCESS-3
 10012 910 310 1210 1100
 OR

 1001 + 0011 = 1100


 2 4 2 1 code or weighted code or self complementing code:
 If the complement of 0 is 9,1 is 8, 2 is 7 etc.. Then the code is self complementing code. Or sum of codes
of any code is equal to 9 then the code is self complementing code. 0= 1’s com of 0(9).
 Ex : code = 2421 = 2+4+2+1 =9 self complementing code
 code =8421 = 8+4+2+1 = 15 not self complementing code.
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It starts from 3rd digit of
gray code
Decimal
digit
BCD
8421 2421 Excess-3
Excess-3
gray so it is Excess-3 gary code 61
0 0000 0000 0011 0010
1 0001 0001 0100 0110
Self
2 0010 0010 0101 0111 complementing
3 0011 0011 0110 0101 property(1’s
com)
4 0100 0100 0111 0100 Decimal binary

5 0101 1011 1000 1100 0 0000 0000


6 0110 1100 1001 1101 1 0001 0001
7 0111 1101 1010 1111 2 0010 0010
8 1000 1110 1011 1110
9 1001 1111 1100 1010 3 0011 0011
4 0100 0100
1010 0101 0000 0000
5 0101 1011
Unused 1011 0110 0001 0001
bit 1100 0111 0010 0011 6 0110 1100
7 0111
combi- 1101 1000 1101 1000 1101
nations 1110 1001 1110 1001 8 1000
1110
1111 1010 1111 1011 9 1001
1111

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BCD : (Unassigned numbers)
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Decimal BCD Unassigned Bit Combinations
0 0000 No. of elements in the set is not a
1 0001 multiple power of 2.
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
------------------------------------------
10 0001 0000
11 0001 0001 BCD – BINARY CONVERSION:
12 0001 0010 1. BCD to DECIMAL
13 0001 0011 2. DECIMAL to BCD
14 0001 0100
15 0001 0101
----------------------------------------------
20 0010 0000
50 0101 0000
99 1001 1001
248 0010 0100 1000

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Error detection codes: 63
No.of 1’s are odd so to make them even
Parity Code: we keep parity bit 1.with that no.of 1’s
are Even.

 EVEN PARITY
 It is concept of detect errors.  So transmitter knows noise is replacing
 A single bit error is detected by it. Exampl Original signal PARITY any bit in original signal for making no.of
e BIT
1’s even in even parity/odd in odd parity.
1. 0 1 0 0 1
Receiver Transmitter  Transmitter sends this signal like : 0 1 0 1
4-bit signal 2. 1 1 0 0 0 in place of 0 1 0 0.
 ODD PARITY  Receiver itself understand this and
 There are 2 types of parity bits are Example Original signal PARITY identify noise .
there. BIT

 EVEN PARITY 1. 0 1 0 0 0
Here 1 is noise.
 ODD PARITY 2. 1 1 0 0 1 Because it
replaced 0.

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error detection:
Hamming code:
 It is given by R.M Hamming (Author of this code).
 Usually used 7 bit hamming code & it is easy to implement.
 Transmitter transfer data to Receiver receives data from this connection some noise will occur .
 In 7 bit hamming code we have 4 data 3parity bits are there.
 Now we have to decide the position of data and parity bits. For this hamming told that we can take 𝟐𝒏 {where n=0,1,2…n).
 So, 𝟐𝟎 =1 so parity bit is P1 , 𝟐𝟏 =2 so parity bit is P2 , 𝟐𝟐 = 4 so parity bit is P4, 𝟐𝟑 =8 but we don’t have 8th bit.so only 3.
Data bits
D7 D6 D5 P4 D3 P2 P1
Parity bits

 As per hamming rule P1 is depends on D3,D5,D7,

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D7 D6 D5 P4 D3 P2 P1  After receiving 1 1 1 0 1 0 1 from transmitter/receiver it needs to
 As per hamming rule P1 is depends on D3,D5,D7, check whether the code is right or not. 67
 P1 = D3 D5 D7 , Now transmitter need to detect error.
❖ So ,it cross verifies the parity bits
 P2 = D3 D6 D7
 P4 = D5 D6 D7 1 1 1 0 1 0 1
 Now take an example : data which I want to send from
Transmitter to receiver is : 1 0 1 1 ❖ P1 = 1 means D3 D5 D7 are 1 1 1 .for making even P1 is 1. √
1 0 1 0 1 0 1
❖ P2 = 0 means 1 1 1 here odd 1’s but P2 is 0 means ×
 Now need to find parity bits in EVEN CODE based.
 P1 = D3 D5 D7 1 1 1 so odd 1’s so P1 = 1 ❖ P4 = 0 means 1 1 1 here odd 1’s but P4 is 0 means ×
P2 = D3 D6 D7 1 0 1 so even 1’s so P1 = 0

❖ In this way error is detected .
 P4 = D5 D6 D7 1 0 1 so even 1’s so P1 = 0
 Now receiver sends data of 7 bit with noise like:
1 1 1 0 1 0 1 .
Now transmitter need to detect error.

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Error correction :

 After detecting error in code 1 1 1 0 1 0 1 from it needs to correct it.


D7 D6 D5 P4 D3 P2 P1 P1 D3 D5 D7 Here for making
1 1 1 0 1 0 1 1 1 1 1 Even P1 is 1. so
Its correct.
 So,
P4 D5 D6 D7 Odd no. of 1’s even through So, finally will find the value in
0 1 1 1 P4 0 so error is there this order P4 P2 P1 as 1 1 0
Means decimal value is 6.
P2 D3 D6 D7
0 1 1 1 For this no controversy
so P1 is 0.
If u find controversies like this keep that
Parity bit value is 1. means P4 is 1 & P2
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QUARIES PLEASE?

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