Digital Logic Design

Boolean Algebra and Logic

Gate

Professor Samia A. Ali

1
 Algebras
 What is an algebra?
 Mathematical system consisting of
 Set of elements
 Set of operators
 Axioms or postulates
 Why is it important?
 Defines rules of “calculations”
 Example: arithmetic on natural numbers
 Set of elements:N = {1,2,3,4,…}
 Operator: +, –, *
 Axioms: associativity, distributivity, closure, identity elements,
etc.
 Note: operators with two inputs are called binary
 Does not mean they are restricted to binary numbers!
 Operator(s) with one input are calledunary

2
 Axiomatic Definition of Boolean Algebra
 We need to define algebra for binary values
 Developed by George Boole in 1854
 Huntington postulates for Boolean algebra (1904):
 B = {0, 1} and two binary operations, + and ．
 Closure with respect to operator + and operator ·
 Identity element 0 for operator + and 1 for operator ·
 Commutativity with respect to + and ·
x+y = y+x, x·y = y·x
 Distributivity of · over +, and + over ·
x·(y+z) = (x·y)+(x·z) and x+(y·z) = (x+y)·(x+z)
 Complement for every element x isx’ withx+x’=1 , x·x’=0
 There are at least two elementsx,yB such that xy

3
 Boolean Algebra
 Terminology:
Literal:
A variable or its complement
Product term: literals connected by •
Sum term: literals connected by +

4
 Postulates of Two-Valued Boolean Algebra
．
 B = {0, 1} and two binary operations, + and
、
 The rules of operations: AND OR and NOT.

AND OR NOT
x y ．
x y x y x+y x x'
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1
1. Closure (+ and‧)
2. The identity elements
(1) +: 0
．
(2) : 1

5
 Postulates of Two-Valued Boolean Algebra
3. The commutative laws
4. The distributive laws

x y z y+z ．
x (y+z) ．
x y ．
x z ． ．
(x y)+(x z)
0 0 0 0 0 0 0 0
0 0 1 1 0 0 0 0
0 1 0 1 0 0 0 0
0 1 1 1 0 0 0 0
1 0 0 0 0 0 0 0
1 0 1 1 1 0 1 1
1 1 0 1 1 1 0 1
1 1 1 1 1 1 1 1

6
 Postulates of Two-Valued Boolean Algebra
5. Complement
 x+x'=→ 0+0'=0+1=1; 1+1'=1+0=1
1
． → 0．0'=0．1=0; 1．1'=1．0=0
 x x'= 0

6. Has two distinct elements 1 and 0, with 0≠ 1

 Note
 A set of two elements
 ．
+ : OR operation; : AND operation
 A complement operator: NOT operation
 Binary logic is a two-valued Boolean algebra

7
Duality
 The principle ofduality is an important concept.
This says that if an expression is valid in Boolean
algebra, the dual of that expression is also valid.
 To form the dual of an expression, replace all +
operators with . operators, all . operators with +
operators, all ones with zeros, and all zeros with
ones.
 Form the dual of the expression F = a + (bc):
FD = (a+ b)(a + c)
 Following the replacement rules…
a(b + c) = ab + ac
 Be Sure not to alter the location of the
parentheses if they are present.
8
Basic Theorems

9
 Boolean Theorems
 Huntington’s postulates define some rules
Post. 1: closure
Post. 2: (a)x+0=x , (b)x·1=x
Post. 3: (a)x+y=y+x , (b)x·y=y·x
Post. 4: (a)x(y+z) = xy+xz ,
(b)x+yz = (x+y)(x+z)
 Need more rules to modify Post. 5: (a)x+x’=1 , (b)x·x’=0
algebraic expressions
 Theorems that are derived from postulates
 What is a theorem?
 A formula or statement that is derived from
postulates (or other proven theorems)
 Basic theorems of Boolean algebra
 Theorem 1 (a):x + x = x (b):x · x = x
 Looks straightforward, but needs to be proven !

10
 Proof ofx+x=x
 We can only use Huntington postulates:
Huntington postulates:
Post. 2: (a)x+0=x , (b)x·1=x
Post. 3: (a)x+y=y+x , (b)x·y=y·x
Post. 4: (a)x(y+z) = xy+xz ,
(b)x+yz = (x+y)(x+z)
Post. 5: (a)x+x’=1 , (b)x·x’=0
 Show that x+x=x .
x+x = (x+x)·1 by 2(b)
=(x+x)(x+x’) by 5(a)
=x+xx’ by 4(b)
=x+0 by 5(b)
=x by 2(a)
Q.E.D.
 We can now use Theorem 1(a) in future proofs

11
 Proof ofx·x=x
 Similar to previous Huntington postulates:
proof
Post. 2: (a)x+0=x , (b)x·1=x
Post. 3: (a)x+y=y+x , (b)x·y=y·x
Post. 4: (a)x(y+z) = xy+xz ,
(b)x+yz = (x+y)(x+z)
Post. 5: (a)x+x’=1 , (b)x·x’=0
Th. 1: (a)x+x=x

 Show that x·x = x .

x·x = xx+0 by 2(a)
=xx+xx’ by 5(b)
=x(x+x’) by 4(a)
=x·1 by 5(a)
=x by 2(b)
Q.E.D.

12
 Proof ofx+ 1= 1
 Theorem 2(a): x + 1 = 1 Huntington postulates:

．
x + 1 = 1 (x + 1) by 2(b) Post. 2: (a)x+0=x , (b)x·1=x
=(x + x' )(x + 1) 5(a) Post. 3: (a)x+y=y+x , (b)x·y=y·x
Post. 4: (a)x(y+z) = xy+xz ,
=x + x' 1 4(b) (b)x+yz = (x+y)(x+z)
= x + x' 2(b) Post. 5: (a)x+x’=1 , (b)x·x’=0
=1 5(a) Th. 1: (a)x+x=x

 Theorem 2(b): x ．0 = 0 by duality

 Theorem 3: (x‘ )' =x
 Postulate 5 defines the complement ofx, x + x' = 1 andx x' = 0
 The complement ofx' isx is also (x‘ )'

13
 Absorption Property (Covering)
Huntington postulates:
 Theorem 6(a):x +xy =x
 ．
x + xy = x 1 +xy by 2(b) Post. 2: (a)x+0=x , (b)x·1=x
= x (1 +y ) 4(a) Post. 3: (a)x+y=y+x , (b)x·y=y·x
=x (y + 1) 3(a) Post. 4: (a)x(y+z) = xy+xz ,
．
=x 1 Th 2(a) (b)x+yz = (x+y)(x+z)
=x 2(b) Post. 5: (a)x+x’=1 , (b)x·x’=0
Th. 1: (a)x+x=x
 Theorem 6(b):x (x + y ) =x by duality
 By means of truth table (another way to proof )

x y xy x+xy
0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 1

14
 DeMorgan’s Theorem
 Theorem 5(a): (x +y)’ =x’y’
 Theorem 5(b): (xy)’ = x’ + y’
 By means of truth table

x y x’ y’ x+y (x+y) x’y’ xy x’+y' (xy)’

’
0 0 1 1 0 1 1 0 1 1
0 1 1 0 1 0 0 0 1 1
1 0 0 1 1 0 0 0 1 1
1 1 0 0 1 0 0 1 0 0

15
 Consensus Theorem
1 xy + x’z + yz = xy + x’z
2 (x+y)•(x’+z)•(y+z) = (x+y)•(x’+z) -- (dual)
 Proof:
xy + x’z + yz = xy + x’z + (x+x’)yz
= xy + x’z + xyz + x’yz
= (xy + xyz) + (x’z + x’zy)
= xy + x’z
QED (2 true by duality).

16
 Operator Precedence
 The operator precedence for evaluating Boolean
Expression is
 Parentheses
 NOT
 AND
 OR
 Examples
x y' + z
 (x y + z )'

17
 Boolean Functions
 A Boolean function
 Binary variables
 Binary operators OR and AND
 Unary operator NOT
 Parentheses
 Examples
F 1
= x y z'
F 2
=
x+
y
'
z
F 3
=
x'
y'
z+x
'
yz+
x
y
'
F 4
=
xy
'
+x'
z

18
 Boolean Functions
© The truth table of 2n entries

x y z F1F2F3F4
0 0 0 0 0 0 0
0 0 1 0 1 1 1
0 1 0 0 0 0 0
0 1 1 0 0 1 1
1 0 0 0 1 1 1
1 0 1 0 1 1 1
1 1 0 1 1 0 0
1 1 1 0 1 0 0

19
 Boolean Functions
 Implementation with logic gates
 F4
i
s
mor
e
ec
o
n
om
i
c
al

F2
x
=y
'
+z

F3
x
='
y'
z+x
'
yzx
y
'
+

F4
x
=y
'
+x
'z

20
 Algebraic Manipulation
 To minimize Boolean expressions
 Literal: a primed or unprimed variable (an input to a gate)
 Term: an implementation with a gate
 The minimization of the number of literals and the number of
→
terms a circuit with less equipment
 It is a hard problem (no specific rules to follow)
 Example 2.1
1. x (x'+y ) =xx' + xy = 0+xy =xy
2. x+x'y = (x+x' )(x+y ) = 1 (x+y ) =x+y
3. (x+y )(x+y' ) =x+xy+xy'+yy' =x (1+y+y' ) =x
4. xy + x'z + yz =xy + x'z + yz (x+x' ) =xy + x'z + yzx + yzx' =xy (1+z )
+x'z (1+ y ) =xy +x'z
5. (x+y )(x' +z )(y+z ) = (x+y )(x'+z ), by duality from function 4.
consensus
( theorem with duality)

21
 Complement of a Function
 An interchange of 0's for 1's and 1's for 0's in the value
ofF
 By DeMorgan's theorem
 (A+B+C )' = (A+X )' let B+C =X
=A'X' by theorem 5(a) (DeMorgan's)
=A‘ (B+C )' substitute B +C =X
=A‘ (B'C' ) by theorem 5(a) (DeMorgan's)
=A‘ B'C' by theorem 4(b) (associative)
 Generalizations : a function is obtained by interchanging
AND and OR operators and complementing each literal.
 (A+B+C+D+ ... +F )' =A'B'C'D' ...F'
 (ABCD ... F )' =A'+ B'+C'+D' ... +F'

22
 Examples
 Example 2.2
F1
'=x
('yz'+ x
'
y
'
z'
)x
=
('
y
z'
'
)x
('
y
'
z'
)x
=
(+
y
'
+
z)x
+
y
+
(z
'
)
F2
'
=x
[y
'
z
'
(y
+z
'
)
]
=x
'y
+
('
z
'
+yz
'
)
=x
'y
+
('
z
''
)y
z
(‘
)
=x' + (y+z ) (y'+z' )
=x' +yz‘+y'z
 Example 2.3: a simpler procedure
 Take the dual of the function and complement each literal
1. F 1
=x'yz'+ x'
y'
z .
The dual ofF 1
x
i
s
('
+
y+
z'
)x
'
(+
y
'
+z
).
Complement each literal: (x+y'+z )(x+y+z' ) =F 1
'
2. F 2
x
(
=y
'
z'
+y
z)
.
The dual ofF 2
x
i
sy
+
('
+
z‘y
+
)
(z
)
.
Complement each literal:x'+ (y+z )(y' +z‘ ) =F 2
'
23
 2.6 Canonical and Standard
Forms
Minterms and Maxterms
 A minterm (standard product): an AND term consists of all
literals in their normal form or in their complement form.
 For example, two binary variablesx andy,
 xy, xy', x'y, x'y'

 It is also called a standard product.

n variables can be combined to form 2n minterms.

 A maxterm (standard sums): an OR term
 It is also call a standard sum.

 2n maxterms.

24
 Minterms and Maxterms
© Eachmaxterm is the complement of its corresponding
minterm , and vice versa.

25
 Minterms and Maxterms
 A Boolean function can be expressed by:
 A truth table
 Sum of minterms
f 1
= x'
y'z + xy'z
'
+xy
z
=
m+
m
1+
m
4(
M
7i
n
t
er
ms
)
f 2
x
'
=y
z
+x
y
'
z+
xy
z
'
+
xy
zm
+
m
=
3+
m
5+
m
6(
7M
i
n
t
er
ms
)

26
 Minterms and Maxterms
 The complement of a Boolean function
 The minterms that produce a 0
 f1
'=m 0+ m 2+
m 3+ m 5+ m6= x'y'z
'
+
x'
yz
'
+x
'
yz
+
xy
'
z
+x
yz
'
 f1
=
(f
‘
'
)
1 =x
+
y
+
(z
x
)
(+
y
'
+
z)x
+
y
'
(+
z
'
)
x
'
+
y
(+z
'
x
)'
+
(y
'
+zM
)
=
0M
2M
M
3
5M
6

 f2
=
(x
+
y
+z
x
+
y
)
(+
z
'x
+
)
(y
'
+
z)x
'
+
y
(+z
=
M
)
0M
M
1M
2
4

 Any Boolean function can be expressed as:

 A sum of minterms (“sum” meaning the ORing of terms).
 A product of maxterms (“product” meaning the ANDing of terms)
.
 Both Boolean functions are said to be in Canonical form.

27
 Sum of Minterms
 Sum of minterms: there are 2n minterms and 22n
combinations of function withn Boolean variables.
 Example 2.4: expressF = A+BC' as a sum of minterms.
F = A+B'C = A (B+B' )+ B'C = AB +AB' + B'C = AB (C+C' )+ AB' (C+C' )
+ A+A'
( B'C
) = ABC+ABC'+AB'C+AB'C'+A'B'C
 F = A'B'C +AB'C' +AB'C+ABC'+ ABC =m1 +m 4 +m 5+ m 6+ m7
 F(A ,B ,C ) = (1, 4, 5, 6, 7)
 or, built the truth table first

28
 Product of Maxterms
 Product of maxterms: using distributive law to expand.
 x + yz = (x + y )(x + z) = (x+y+zz' )(x+z+yy' )=
x+y+z
( x+y+z' )(x+y'+z )
)(

 Example 2.5: expressF = xy + x'z as a product of

maxterms.
F = xy + x'z = (xy + x' )(xy +z ) =
x+x'
( )(y+x' )(x+z )(y+z )= x'+y
( )(x+z )(y+z )
x'+y = x' + y + zz' = (x'+y+z )(x'+y+z' )

F= (x+y+z )(x+y'+z )(x'+y+z )(x'+y+z' ) =

M0
M 2M 4M5
F (x, y, z ) = (0, 2, 4, 5)
29
Conversion between Canonical Forms
 The complement of a function expressed as the sum of
minterms equals the sum of minterms missing from the
original function.
F (A ,B ,C ) = (1, 4, 5, 6, 7)
 Thus,F' (A ,B ,C ) = (0, 2, 3)
 By DeMorgan's theorem
F (A ,B ,C ) = (0, 2, 3)
F (A ,B ,C ) =  (1, 4, 5, 6, 7)
 mj '= M j
 Sum of minterms = product of maxterms
 Interchange the symbols  and  and list those numbers
missing from the original form
  of 1's
  of 0's

30
Conversion Between Canonical Forms
 Easy to convert between minterm and maxterm
representations
 For minterm representation, SOP, select rows with 1’s
 For maxterm representation, POS, select rows with 0’s

G = xyz + xyz’ + x’yz

x y z G
0 0 0 0
0 0 1 0 G = m7
+
m+
6m
=
Σ
3(
3
,
6,
7)
0 1 0 0
0 1 1 1
G = M0
M
MMM
=Π
(
0,
1
,
2,
4,
5
)
1 0 0 0 124
5
1 0 1 0
1 1 0 1 G = (x+y+z)(x+y+z’)(x+y’+z)(x’+y+z)(x’+y+z’)
1 1 1 1
 Representation of Circuits
 All logic expressions can be represented in 2-level
gate format.
 Circuits can be reduced to minimal 2-level gate
representation
 Sum of products representation most common in
industry.
 Summary
 Truth table, circuit, and Boolean expression formats
are equivalent.
 Easy to translate truth table to SOP and POS
representation.
 Boolean algebra rules can be used to reduce circuit
size while maintaining function.
 All logic functions can be made from AND, OR, and
NOT gates.
 Easiest way to understand: Do examples!
 Example
F =xy +x z
 F (x ,y ,z ) = (1, 3, 6, 7)
 F (x ,y ,z ) =  (0, 2, 4, 6)

34
 Standard Forms
 Canonical forms are very seldom the ones with the
least number of literals.

 Standard forms: Usually, the terms that form the function

may have one, two, or any number of literals. However, in
SSOP or SPOS, each variable of the function must exist in
each term of the function either in complemented or
uncomplemented form.
 Sum of products:F1 =y'+ xy+ x '
yz'
 Product of sums:F2
x
=y
'
+
(z
)x
'
+
y
(+
z'
)
 F3
A
='
B
'C
D+
A
B
C
'
D'

35
 Implementation
 Two-level implementation

F1
=
y
'+
xy
+
x
'
yz
' F2
=
xy
'
+
z
()x
'
+
y
(+z
'
)

 Multi-level implementation

36
2.7Other Logic Operations
 2n rows in the truth table of n binary variables.
 22n functions for n binary variables.
 16 functions of two binary variables.

 All the new symbols except for the exclusive-OR

symbol are not in common use by digital designers.

37
Boolean Expressions

38
 2.8Digital Logic Gates
 Boolean expression: AND, OR and NOT operations.

 Constructing gates of other logic operations

 The feasibility and economy;
 The possibility of extending gate's inputs;
 The basic properties of the binary operations
(commutative and associative);
 The ability of the gate to implement Boolean
functions.

39
 Standard Gates
 Consider the 16 functions in Table 2.8 (slide 38)
 Two are equal to a constant (F 0
a
n
dF
1
5)
.
 Four are repeated twice (F 4
F
,
5F
,1
0F
a
n
d
1)
.
1
 Inhibition (F 2
)
an d i
mpli
cat
ion F
( )
a
1
3r
en
ot
co
m
mu
t
at
i
v
e
o rass o ci
a tiv
e
.
 The other eight: complement (F 1
)
,
t
2r
a
ns
f
er
(F
)
,
A
3N
DF
(
1)
,
O RF( 7 )
,N A NF
D( 1
4)
,NO RF
( )
8 ,X F
O
R
()
6,
a
nde
q
u
i
va
l
en
c
e
(XN O R F
)( 9)a
r
e usedasstand a r
d
g
at
e
s.
 Complement: inverter.
 Transfer: buffer (increasing drive strength).
 Equivalence: XNOR.

40
Summary of Logic Gates

Figure 2.5 Digital logic gates

41
Summary of Logic Gates

Figure 2.5 Digital logic gates

42
 Digital Logic Gates
 More 2-input logic gates (NAND, NOR, XOR)
 Extensions to 3-input gates
 Converting between sum-of-products and NANDs
 SOP to NANDs
 NANDs to SOP
 Converting between Product-of-Sums and NORs
 POS to NORs
 NORs to POS
 Why consider new functions?
 Cheaper hardware, more flexibility.
 The NAND Gate
A
Y
B

 This is a NAND gate. It is a combination of an AND

gate followed by an inverter. Its truth table shows
this…
 NAND gates have several interesting properties…
 NAND(A,A)=(AA)’ = A’ = NOT(A)
A B Y
 NAND’(A,B)=(AB)’’ = AB = AND(A,B)
0 0 1
 NAND(A’,B’)=(A’B’)’ = A+B = OR(A,B)
0 1 1
1 0 1
1 1 0
 The NAND Gate
 These three properties show that a NAND gate
with both of its inputs driven by the same signal is
equivalent to a NOT gate
 A NAND gate whose output is complemented is
equivalent to an AND gate, and a NAND gate with
complemented inputs acts as an OR gate.
 Therefore, we can use a NAND gate to implement
all three of theelementary operators (AND,OR,
NOT).
 Therefore, ANY switching function can be
constructed using only NAND gates. Such a gate
Primitive or
is said to be Functionally Complete or
Universal gate .
 NAND Gates into Other Gates

(what are these circuits?)

A
Y

NOT Gate A
B Y

A AND Gate

Y
B

OR Gate
 The NOR Gate
A
Y
B

 This is a NOR gate. It is a combination of an OR gate

followed by an inverter. It’s truth table shows this…
 NOR gates also have several
interesting properties…
A B Y
 NOR(A,A)=(A+A)’ = A’ = NOT(A)
0 0 1
 NOR’(A,B)=(A+B)’’ = A+B = OR(A,B)
0 1 0
 NOR(A’,B’)=(A’+B’)’ = AB = AND(A,B)
1 0 0


1
Therefore, NOR gate,Primitive orFunctionally Complete 1
or 0
Universal gate .
 NOR Gates into Other Gates

(what are these circuits?)

A
Y

NOT Gate A
B Y

A OR Gate

Y
B

AND Gate
 Functionally Complete Gates
 Just like the NAND gate, the NOR gate is
Functionally Complete…any logic function can be
implemented using just NOR gates.
 Both NAND and NOR gates are very valuable as
any design can be realized using either one.
 It is easier to build an IC chip using all NAND or
NOR gates than to combine AND,OR, and NOT
gates.
 NAND/NOR gates are typically faster at switching
and cheaper to produce.
Example
 Summary
 Basic logic functions can be made from NAND, and
NOR functions
 The behavior of digital circuits can be represented
with waveforms, truth tables, or symbols
 Primitive gates can be combined to form larger
circuits
 Boolean algebra defines how binary variables with
NAND, NOR can be combined
 DeMorgan’s rules are important.
 Allow conversion to NAND/NOR representations
 The XOR Gate (Exclusive-OR)

A
Y
B

 This is a XOR gate.

 XOR gates assert their output A B Y
when exactly one of the inputs 0 0 0

is asserted, hence the name. 0 1 1

1 0 1
 The switching algebra symbol
1 1 0
for this operation is , i.e.
1  1  0 and 1  0  1.
 The XNOR Gate

A
Y
B

 This is a XNOR gate.

 This functions as an
A B Y
exclusive-NOR gate, or
simply the complement of 0 0 1
the XOR gate. 0 1 0
1 0 0
 The switching algebra symbol
for this operation is , i.e. 1 1 1
1  1  1 and 1  0  0.
 Multiple Inputs
 Extension to multiple inputs
 A gate can be extended to multiple inputs.
 If its binary operation is commutative and

associative.
 AND and OR are commutative and associative.
 OR

 x+y = y+x
 (x+y )+z = x+ (y+z )= x+y+z
 AND

 xy = yx
 (x y )z = x (y z )= x y z

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 Multiple Inputs
 NAND and NOR are commutative but not associative →
they are not extendable.

Figure 2.6 Demonstrating the nonassociativity of

↓ ↓
the NOR operator; x( y ) z ≠x ↓ ↓
y( z )
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 Multiple Inputs
 Multiple NOR = a complement of OR gate, Multiple
NAND = a complement of AND.
 The cascaded NAND operations = sum of products.
 The cascaded NOR operations = product of sums.

Figure 2.7 Multiple-input and cascaded NOR and NAND

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 Multiple Inputs
 The XOR and XNOR gates are commutative and
associative.
 Multiple-input XOR gates are uncommon?
 XOR is an odd function: it is equal to 1 if the inputs
variables have an odd number of 1's.

Figure 2.8 3-input XOR 57

 2.9 Integrated Circuits
Level of Integration
 An IC (a chip)
 Examples:
 Small-scale Integration (SSI): < 10 gates
 Medium-scale Integration (MSI): 10 ~ 100 gates
 Large-scale Integration (LSI): 100 ~ xk gates
 Very Large-scale Integration (VLSI): > xk gates
 VLSI
 Small size (compact size)
 Low cost
 Low power consumption
 High reliability
 High speed

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 Digital Logic Families

 Digital logic families: circuit technology

 TTL: transistor-transistor logic (dying?)
 ECL: emitter-coupled logic (high speed, high
power consumption)
 MOS: metal-oxide semiconductor (NMOS,
high density)
 CMOS: complementary MOS (low power)
 BiCMOS: high speed, high density

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 Digital Logic Families
 The characteristics of digital logic families
 Fan-out: the number of standard loads that
the output of a typical gate can drive.
 Power dissipation.
 Propagation delay: the average transition
delay time for the signal to propagate from
input to output.
 Noise margin: the minimum of external noise
voltage that caused an undesirable change in
the circuit output.

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 CAD
 CAD – Computer-Aided Design
 Millions oftransistors
 Computer-based representation can aid
 Automate the design process
 Design entry
 Schematic capture

 HDL – Hardware Description Language

 Verilog, VHDL
 Simulation
 Physical realization
 ASIC, FPGA, PLD

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 Chip Design
 Why is it better to have more gates on a single chip?
 Easier to build systems
 Lower power consumption
 Higher clock frequencies

 What are the drawbacks of large circuits?

 Complex to design
 Chips have design constraints
 Hard to test

 Need tools to help develop integrated circuits

 Computer Aided Design (CAD) tools
 Automate tedious steps of design process
 Hardware description language (HDL) describe
circuits
 VHDL 62