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Unit 4

Unit 4 covers Memory Management and Virtual Memory concepts, including swapping, contiguous memory allocation, paging, and segmentation. It explains how memory management optimizes system performance by managing primary memory and addresses, while discussing techniques like demand paging and page replacement. The document also details the structure of page tables and various memory allocation strategies to handle fragmentation and improve efficiency.

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0% found this document useful (0 votes)
10 views66 pages

Unit 4

Unit 4 covers Memory Management and Virtual Memory concepts, including swapping, contiguous memory allocation, paging, and segmentation. It explains how memory management optimizes system performance by managing primary memory and addresses, while discussing techniques like demand paging and page replacement. The document also details the structure of page tables and various memory allocation strategies to handle fragmentation and improve efficiency.

Uploaded by

sseetha2
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Unit 4 :Memory Management, Virtual

Memory
Dr B.Soujanya
Assistant Professor
Department of Computer Science and Technology
GITAM Institute of Technology (GIT)
Visakhapatnam – 530045
Email: [email protected]
UNIT-4

Memory Management: Swapping, contiguous memory allocation,


paging, segmentation,structure of page the table.
Virtual memory: Demand paging, Copy-on-Write, page-
replacement, allocation of frames,thrashing.
Memory
Management
● Memory Management is the process of controlling and coordinating computer

memory, assigning portions known as blocks to various running programs to

optimize the overall performance of the system.

● It is the most important function of an operating system that manages primary memory.

● It helps processes to move back and forward between the main memory and

execution disk.

● It helps OS to keep track of every memory location, irrespective of whether

it is allocated to some process or it remains free.


Memory
Management
● Program must be brought (from disk) into memory and placed within a

process for it to be run

● Main memory and registers are only storage CPU can access directly

● Memory unit only sees a stream of addresses + read requests, or address +

data and write requests

● Register access in one CPU clock (or less)

● Main memory can take many cycles, causing a stall

● Cache sits between main memory and CPU registers

● Protection of memory required to ensure correct operation


Logical vs. Physical Address
Space
● The concept of a logical address space that is bound to a separate
physical address space is central to proper memory management
○ Logical address – generated by the CPU also referred to as virtual address
○ Physical address – address seen by the memory unit

Logical and physical addresses are the same in compile-time and load-time address-
binding schemes; logical (virtual) and physical addresses differ in execution-time
address-binding scheme.

Logical address space is the set of all logical addresses generated by a program

Physical address space is the set of all physical addresses generated by a program
Base and Limit
● A pair of baseRegisters
and limit registers define the logical address space
● CPU must check every memory access generated in user mode to be sure it
is between base and limit for that user
Hardware Address
Protection
Swappin
g
● Swapping is a method in which the process should be swapped

temporarily from the main memory to the backing store.

● It will be later brought back into the memory for continue execution.

● Backing store is a hard disk or some other secondary storage device that

should be big enough in order to accommodate copies of all memory images

for all users.

● It is also capable of offering direct access to these memory images.


Swappin
g
A process can be swapped temporarily out of memory to a backing store, and then
brought back into memory for continued execution

■Backing store – fast disk large enough to accommodate copies of all memory
images for all users; must provide direct access to these memory images

■ Roll out, roll in – swapping variant used for priority-based scheduling


algorithms; lower-priority process is swapped out so higher-priority process can be
loaded and executed

■ Major part of swap time is transfer time; total transfer time is directly
proportional to the amount of memory swapped

■Modified versions of swapping are found on many systems (i.e., UNIX, Linux, and Windows)
Swappin
g
Benefits of
Swapping
Benefits of Swapping
Here, are major benefits/pros of swapping:

● It offers a higher degree of multiprogramming.


● Allows dynamic relocation. For example, if address binding at
execution time is being used, then processes can be swap in different
locations. Else in case of compile and load time bindings, processes
should be moved to the same location.
● It helps to get better utilization of memory.
● Minimum wastage of CPU time on completion so it can easily be
applied to a priority-based scheduling method to improve its
Benefits of
performance.
Swapping
Contiguous Memory
Allocation
The main memory must accommodate both the operating system and the various
user processes. We therefore need to allocate the parts of the main memory in
the most efficient way possible. This section explains one common method,
contiguous memory allocation.

The memory is usually divided into two partitions:

1. one for the resident operating system and


2. one for the user processes.

We can place the operating system in either low memory or high memory.

In this contiguous memory allocation, each process is contained in a single contiguous section
of memory.
Contiguous Memory
Allocation
Three components

1. Memory Mapping and Protection

2. Memory Allocation

3. Fragmentation
1.Memory Mapping and
Protection
● The relocation register contains the value of the smallest physical address;
● the limit register contains the range of logical addresses (for example,
relocation = 100040 and limit = 74600).
● With relocation and limit registers, each logical address must be less
than the limit register;the MMU maps the logical address dynamically by
adding the value in the relocation register.
● This mapped address is sent to memory .
● When the CPU scheduler selects a process for execution, the dispatcher
loads the relocation and limit registers with the correct values as part of
the context switch.
● The relocation-register scheme provides an effective way to allow the
operating-system size to change dynamically. This flexibility is desirable in
1.Memory Mapping and
many situations.
Protection
1.Memory Mapping and
Protection
Hardware Support for relocation and limit registers.
2. Memory
Allocation
One of the simplest methods for allocating memory is to divide memory into
several fixed-sized partitions.

● Each partition may contain exactly one process.

● Thus, the degree of multiprogramming is bound by the number of partitions.

● In this multiple partition method, when a partition is free, a process is

selected from the input queue and is loaded into the free partition.

● When the process terminates, the partition becomes available for another process.
2. Memory Allocation
This procedure is a particular instance of the general dynamic storage allocation problem,

which concerns how to satisfy a request of size n from a list of free holes. There are

many solutions to this problem. The first-fit, best-fit, and worst-fit strategies are the

ones most commonly used to select a free hole from the set of available holes.

1. First fit. Allocate the first hole that is big enough. Searching can start either at
the beginning of the set of holes or where the previous first-fit search ended.
We can stop searching as soon as we find a free hole that is large enough.
2. Best fit. Allocate the smallest hole that is big enough. We must search the entire list, unless
the list is ordered by size. This strategy produces the smallest leftover hole.
3. Worst fit. Allocate the largest hole. Again, we must search the entire list, unless
it is sorted by size. This strategy produces the largest leftover hole, which may
be more useful than the smaller leftover hole from a best-fit approach.
3.Fragmentati
on
As processes are loaded and removed from memory, the free memory space is broken into

little pieces. It happens after sometimes that processes cannot be allocated to memory

blocks considering their small size and memory blocks remains unused. This problem is

known as Fragmentation.

Fragmentation is of two types −

1. Internal fragmentation

Memory block assigned to process is bigger. Some portion of memory is left unused, as it

cannot be used by another process.

2. External fragmentation

Total memory space is enough to satisfy a request or to reside a process in it, but it is not
3.Fragmentati
on
contiguous, so it cannot be used.
3.Fragmentati
The following diagram shows on
how fragmentation can cause waste of memory and a
compaction technique can be used to create more free memory out of fragmented memory −

External fragmentation can be reduced by compaction or shuffle memory contents to


place all free memory together in one large block. To make compaction feasible, relocation
should be dynamic.
The internal fragmentation can be reduced by effectively assigning the smallest partition
but large enough for the process.
3.Fragmentati
on
Logical Versus Physical Address Space
The address generated by the CPU is a logical address, whereas the address
actually seen by the memory hardware is a physical address.

Addresses bound at compile time or load time have identical logical and
physical addresses.

Addresses created at execution time, however, have different logical and


physical addresses.

In this case the logical address is also known as a virtual address, and
the two terms are used interchangeably by our text.

The set of all logical addresses used by a program composes the


logical address space, and the set of all corresponding physical
addresses composes the physical address space.

The run time mapping of logical to physical addresses is handled by the


memory-management unit, MMU.

The MMU can take on many forms. One of the simplest is a modification
of the base-register scheme described earlier.

The base register is now termed a relocation register, whose value is


added to every memory request at the hardware level.
Pagin
g
● Paging is a memory-management scheme that permits the physical

address space of a process to be noncontiguous.

● Paging avoids the considerable problem of fitting memory chunks of

varying sizes onto the backing store; most memory-management

schemes used before the introduction of paging suffered from this

problem.

● The problem arises because, when some code fragments or data residing

in main memory need to be swapped out, space must be found on the

backing store.
Pagin
g
Basic Method:-

The basic method for implementing paging involves breaking physical memory into fixed-
sized blocks called frames and breaking logical memory into blocks of the same size
called pages.

When a process is to be executed, its pages are loaded into any available memory
frames from the backing store.

The backing store is divided into fixed-sized blocks that are of the same size as the
memory frames.
Every address generated by the CPU is divided into two parts: a page number
(p) and a page offset (d).

The page number is used as an index into a page table. The page table
contains the base address of each page in physical memory.

This base address is combined with the page offset to define the physical
memory address that is sent to the memory unit.
Paging-
Hardware
Pagin
g
The page size (like the frame size) is defined by the hardware.

The size of a page is typically a power of 2, varying between 512 bytes and 16 MB per
page, depending on the computer architecture.

The selection of a power of 2 as a page size makes the translation of a logical address
into a page number and page offset particularly easy.

If the size of logical address space is 2'"* and a page size is 2" addressing units (bytes or
words), then the high-order m - n bits of a logical address designate the page number,
and the n low-order bits designate the page offset.

Thus, the logical address is as follows:

where p is an index into the page table and d is the displacement within the page.
Pagin
g
Address Translation
Page address is called logical address and represented by page number and the offset.

Logical Address = Page number + page offset

Frame address is called physical address and represented by a frame


number and the offset.

Physical Address = Frame number + page offset

A data structure called page map table is used to keep track of the relation
between a page of a process to a frame in physical memory.
Paging model of logical and physical memory
Paging-Example

Consider the example where logical address, n=2 and


m=4.Using a page size of 4 bytes and a physical memory of 32
bytes(8 pages).

We show how the logical address is mapped to physical address.

1) Logical address 0 maps to 20 physical address i.e) [(5*4)+0]

2) Logical address 1 maps to 24 physical address i.e) [(6*4)+0]

3) Logical address 2 maps to 4 physical address i.e) [(1*4)+0]

4) Logical address 3 maps to 8 physical address i.e) [(2*4)+0]


Paging-Hardware-TLB
However memory access just got half as fast, because every memory access now
requires two memory accesses - One to fetch the frame number from memory and
then another one to access the desired memory location.

The solution to this problem is to use a very special high-speed memory device called the
translation look-aside buffer, TLB.

The TLB is associative, high-speed memory. Each entry in the TLB consists of two
parts: a key (or tag) and a value. When the associative memory is presented with
an item, the item is compared with all keys simultaneously.

If the item is found, the corresponding value field is returned.

The TLB contains only a few of the page-table entries. When a logical address is
generated by the CPU, its page number is presented to the TLB. If the page
number is found, its frame number is immediately available and is used to access
memory.
Paging -Hardware Support
Paging-
Protection
● Memory protection in a paged environment is accomplished by protection
bits associated with each frame. Normally, these bits are kept in the page
table. One bit can define a page to be read-write or read-only.
● One additional bit is generally attached to each entry in the page table: a
valid-invalid bit. When this bit is set to "valid," the associated page is in the
process's logical address space and is thus a legal (or valid) page.
● When the bit is set to"invalid,'" the page is not in the process's logical
address space. Illegal addresses are trapped by use of the valid-invalid bit.
● The operating system sets this bit for each page to allow or disallow access to the page.
Paging -
Protection
Structure of Page
Table
Structure of page table simply defines, in how many ways a page table can be structured.
Well, the paging is a memory management technique where a large process is
divided into pages and is placed in physical memory which is also divided into frames.

Frame and page size is equivalent. The operating system uses a page table to map the
logical address of the page generated by CPU to its physical address in the main
memory.

Structure of Page Table

1. Hierarchical Page Table


2. Hashed Page Table
3. Inverted Page Table
1. Hierarchical Paging
Another name for Hierarchical Paging is multilevel paging.
● There might be a case where the page table is too
big to fit in a contiguous space, so we may have a
hierarchy with several levels.
● In this type of Paging the logical address space
is broke up into Multiple page tables.
● Hierarchical Paging is one of the simplest
techniques and for this purpose, a two-level page
table and three-level page table can be used.
● So we will have two-page tables’ inner page
table and outer page table. We have a logical
address with page number 20 and page offset
12.
● As we are paging a page table the page
number will further get split to 10-bit page
number and 10 bit offset .
2. Hashed Page Table
The hashed page table is a convenient way to
structure the page table where logical address
space is beyond 32 bits.

The hash table has several entries where each entry


has a link list.

Each link list has a set of linked elements where each


element hash to the same location.

Each element has three entries page number, frame


number and pointer to the next element.
The page number from the logical address is directed
to the hash function. The hash function produces
a hash value corresponding to the page number.
This hash value directs to an entry in the hash
table.
3. Inverted Page Table
Consider we have six processes in execution.

So, six processes will have some or the other of their


page in the main memory which would compel their
page tables also to be in the main memory consuming a
lot of space. This is the drawback of the paging concept.

The inverted page table is the solution to this wastage of


memory.

The concept of an inverted page table involves the


existence of single-page table which has entries of all
the pages (may they belong to different processes) in
main memory along with the information of the process
to which they are associated.
Segmentati

on
Most users ( programmers ) do not think of their programs as existing in one
continuous linear address space.
● Rather they tend to think of their memory in multiple segments, each dedicated to a
particular use, such as code, data, the stack, the heap, etc.
● Memory segmentation supports this view by providing addresses with a segment
number ( mapped to a segment base address ) and an offset from the

beginning of that segment.


Segmentati
on
Segmentation Hardware Example of Segmentation
Virtual Memory

Virtual Memory is a storage mechanism which offers user an illusion of having a


very big main memory. It is done by treating a part of secondary memory as the
main memory. In Virtual memory, the user can store processes with a bigger size
than the available main memory.

Virtual memory serves two purposes. First, it allows us to extend the use of
physical memory by using disk. Second, it allows us to have memory protection,
because each virtual address is translated to a physical address.

Virtual memory also allows the sharing of files and memory by multiple processes,
with several benefits:

● System libraries can be shared by mapping them into the virtual address
space of more than one process.
● Processes can also share virtual memory by mapping the same block of
memory to more than one process.
● Process pages can be shared during a fork( ) system call, eliminating the
need to copy all of the pages of the original ( parent ) process.
Diagram showing virtual memory that is larger than physical
memory
Demand
Paging
An alternative strategy is to load pages only as needed.This technique is
known as demand-paging and is commonly used in virtual memory systems.

With demand -paged virtual memory ,pages are only loaded when they are
demanded during program execution,pages that are never accessed are thus
never loaded into physical memory.

A demand-paging system is similar to a paging system with swapping where


processes reside in secondary memory(usually a disk).

When we want to execute a process, we swap it into memory.

Rather than swapping the entire process into memory ,however we use a

lazy swapper. A lazy swapper never swaps a page into the memory unless

that page is needed.


Demand
paging
Transfer of a paged memory to contiguous disk space
Demand paging-Basic
Concepts
● The basic idea behind paging is that when a
process is swapped in, the pager only loads into
memory those pages that it expects the process to
need ( right away. )
● Pages that are not loaded into memory are marked
as invalid in the page table, using the invalid bit.
( The rest of the page table entry may either be
blank or contain information about where to find
the swapped-out page on the hard drive. )
● If the process only ever accesses pages that are
loaded in memory ( memory resident pages ), then
the process runs exactly as if all the pages were
loaded in to memory
Steps in handling Page fault
On the other hand, if a page is needed that was not
originally loaded up, then a page fault trap is
generated, which must be handled in a series of
steps:

1. The memory address requested is first checked, to


make sure it was a valid memory request.
2. If the reference was invalid, the process is
terminated. Otherwise, the page must be paged in.
3. A free frame is located, possibly from a free-frame list.
4. A disk operation is scheduled to bring in the necessary
page from disk. ( This will usually block the process on
an I/O wait, allowing some other process to use the
CPU in the meantime. )
5. When the I/O operation is complete, the process's page
table is updated with the new frame number, and the
invalid bit is changed to indicate that this is now a valid
page reference.
6. The instruction that caused the page fault must now be
restarted from the beginning, ( as soon as this process
gets another turn on the CPU. )
Copy-on-Write
● The idea behind a copy-on-write fork is that the pages for a parent process do
not have to be actually copied for the child until one or the other of the
processes changes the page.
● They can be simply shared between the two processes in the meantime, with a
bit set that the page needs to be copied if it ever gets written to. This is a
reasonable approach, since the child process usually issues an exec( ) system
call immediately after the fork.
● Obviously only pages that can be modified even need to be labeled as
copy-on-write. Code segments can simply be shared.
● Pages used to satisfy copy-on-write duplications are typically allocated
using zero-fill-on-demand, meaning that their previous contents are zeroed out
before the copy proceeds.
Copy-on-Write(Before and After
process 1 modifies page C
Bef
Page Replacement
However memory is also needed for other purposes ( such as I/O buffering ), and what happens if
some process suddenly decides it needs more pages and there aren't any free frames available?
There are several possible solutions to consider:

1. Adjust the memory used by I/O buffering, etc., to free up some frames for user processes.
The decision of how to allocate memory for I/O versus user processes is a complex one,
yielding different policies on different systems. ( Some allocate a fixed amount for I/O, and
others let the I/O system contend for memory along with everything else. )
2. Put the process requesting more pages into a wait queue until some free frames become available.
3. Swap some process out of memory completely, freeing up its page frames.
4. Find some page in memory that isn't being used right now, and swap that page only out to
disk, freeing up a frame that can be allocated to the process requesting it. This is known as
page replacement, and is the most common solution.
Basic Page Replacement
Now the page-fault handling must be modified to free up a frame if necessary, as follows:

1. Find the location of the desired page on the disk, either in swap space or in the file system.
2. Find a free frame:
1. If there is a free frame, use it.
2. If there is no free frame, use a page-replacement algorithm to select
an existing frame to be replaced, known as the victim frame.
3. Write the victim frame to disk. Change all related page tables to
indicate that this page is no longer in memory.
3. Read in the desired page and store it in the frame. Adjust all related page and
frame tables to indicate the change.
4. Restart the process that was waiting for this page.
Page Replacement Algorithms
The three replacement algorithms are

1. FIFO( First in First Out)

2. Optimal Page Replacement.

3. LRU(Least Recently Used)


FIFO (First -in First-Out)
● A simple and obvious page replacement strategy is FIFO, i.e. first-in-first-out.
● As new pages are brought in, they are added to the tail of a queue, and the page at the
head of the queue is the next victim. In the following example, 20 page requests result
in 15 page faults:

● Although FIFO is simple and easy, it is not always optimal, or even efficient.
● An interesting effect that can occur with FIFO is Belady's anomaly, in which increasing
the number of frames available can actually increase the number of page faults that
occur!
FIFO Algorithm
Page-fault curve for FIFO replacement on a reference string.
Optimal Page Replacement
● The discovery of Belady's anomaly lead to the search for an optimal page-replacement
algorithm, which is simply that which yields the lowest of all possible page-faults, and
which does not suffer from Belady's anomaly.
● Such an algorithm does exist, and is called OPT or MIN. This algorithm is simply
"Replace the page that will not be used for the longest time in the future."
● In practice most page-replacement algorithms try to approximate OPT by predicting
( estimating ) in one fashion or another what page will not be used for the longest
period of time. The basis of FIFO is the prediction that the page that was brought in the
longest time ago is the one that will not be needed again for the longest future time,
LRU(Least Recently Used)
● The prediction behind LRU, the Least Recently Used, algorithm is that the page that has
not been used in the longest time is the one that will not be used again in the near
future. ( Note the distinction between FIFO and LRU: The former looks at the oldest load
time, and the latter looks at the oldest use time. )
● LRU is considered a good replacement policy, and is often used. The problem is how
exactly to implement it. There are two simple approaches commonly used:
1. Counters. Every memory access increments a counter, and the current value of this
counter is stored in the page table entry for that page. Then finding the LRU page
involves simple searching the table for the page with the smallest counter value.
2. Stack. Another approach is to use a stack, and whenever a page is accessed, pull that
page from the middle of the stack and place it on the top. The LRU page will always
be at the bottom of the stack. Because this requires removing objects from the
middle of the stack, a doubly linked list is the recommended data structure.
● Neither LRU or OPT exhibit Belady's anomaly. Both belong to a class of page-
replacement algorithms called stack algorithms, which can never exhibit Belady's
anomaly.
Allocation of
Frames
1 Minimum Number of Frames

● The absolute minimum number of frames that a process must be allocated is


dependent on system architecture, and corresponds to the worst-case scenario
of the number of pages that could be touched by a single ( machine )
instruction.
● If an instruction ( and its operands ) spans a page boundary, then multiple
pages could be needed just for the instruction fetch.

2 Allocation Algorithms

● Equal Allocation - If there are m frames available and n processes to share them,
each process gets m / n frames, and the leftovers are kept in a free-frame
buffer pool.
● Proportional Allocation - Allocate the frames proportionally to the size of the
process, relative to the total size of all processes. So if the size of process i is
S_i, and S is the sum of all S_i, then the allocation for process P_i is a_i = m * S_i
/ S.
Allocation of
Frames
3 Global versus Local Allocation

● One big question is whether frame allocation ( page replacement ) occurs on


a local or global level.
● With local replacement, the number of pages allocated to a process is fixed,
and page replacement occurs only amongst the pages allocated to this process.
● With global replacement, any page may be a potential victim, whether it
currently belongs to the process seeking a free frame or not.

4 Non-Uniform Memory Access

● The above arguments all assume that all memory is equivalent, or at least has
equivalent access times.
● This may not be the case in multiple-processor systems, especially where each
CPU is physically located on a separate circuit board which also holds some
portion of the overall system memory.
Thrashin
g
● If a process cannot maintain its minimum required number of frames, then it
must be swapped out, freeing up frames for other processes. This is an
intermediate level of CPU scheduling.
● But what about a process that can keep its minimum, but cannot keep all of the
frames that it is currently using on a regular basis? In this case it is forced to
page out pages that it will need again in the very near future, leading to large
numbers of page faults.
● A process that is spending more time paging than executing is said to be thrashing.

1 Cause of Thrashing

● Early process scheduling schemes would control the level of multiprogramming


allowed based on CPU utilization, adding in more processes when CPU utilization
was low.
● The problem is that when memory filled up and processes started spending lots
of time waiting for their pages to page in, then CPU utilization would lower,
Thrashin
causing the schedule to add in even more processes and exacerbating the
g would essentially grind to a halt.
problem! Eventually the system
Thrashin
g
Thrashin
2 Working-Set Model
g
The working set model is based on the concept of locality, and defines a working set window,
of length delta.

● The selection of delta is critical to the success of the working set model - If it is too
small then it does not encompass all of the pages of the current locality, and if it is
too large, then it encompasses pages that are no longer being frequently accessed.
● The total demand, D, is the sum of the sizes of the working sets for all processes. If
D exceeds the total number of available frames, then at least one process is
thrashing, because there are not enough frames available to satisfy its minimum
working set. If D is significantly less than the currently available frames, then
additional processes can be launched.
Thrashin
g
3 Page-Fault Frequency

A more direct approach is to recognize that what we really want to control is the page-fault
rate, and to allocate frames based on this directly measurable value. If the page-fault
rate exceeds a certain upper bound then that process needs more frames, and if it is
below a given lower bound, then it can afford to give up some of its frames to other
processe
Protectio
n

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