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Syllabus VLMR1

The document outlines the course structure for HDL Programming at R.V.R. & J.C. College of Engineering, detailing course objectives and outcomes related to Verilog HDL. It includes four units covering topics such as logic design, behavioral modeling, synthesis of combinational and sequential logic, and programmable logic devices. Learning resources include textbooks and reference materials to support the curriculum.

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0% found this document useful (0 votes)
13 views2 pages

Syllabus VLMR1

The document outlines the course structure for HDL Programming at R.V.R. & J.C. College of Engineering, detailing course objectives and outcomes related to Verilog HDL. It includes four units covering topics such as logic design, behavioral modeling, synthesis of combinational and sequential logic, and programmable logic devices. Learning resources include textbooks and reference materials to support the curriculum.

Uploaded by

msarathkumar9876
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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R.V.R. & J.C. College of Engineering (Autonomous), Guntur-522019, A.P.

R-20

VLMR1 HDL PROGRAMMING L T P C Int Ext


3 1 - 4 30 70

COURSE OBJECTIVES:
1. To know the basic language features of Verilog HDL and the role of HDL in digital logic design.
2. To know the behavioural modeling of combinational and simple sequential circuits.
3. To know the behavioral modeling of algorithmic state machines.
4. To know the synthesis of combinational and sequential descriptions, architectural features of
programmable logic devices.

COURSE OUTCOMES:
After successful completion of the course, the students are able to
1. demonstrate HDL design flow, Digital circuits design, Switch De-bouncing, Metastability and
Programmable logic devices.
2. design combinational and sequential circuits using HDL Programming Language.
3. solve algorithmic state machines using Hardware description language.
4. analyze process of synthesizing the combinational and sequential descriptions, memorize
advantages of programmable logic devices and their description in Verilog.

UNIT I Text Book - 1,2 [CO:1,2] (13)

Introduction to Logic Design with Verilog : Structural models of combination logic, logic simulation,
design verification, test methodology, propagation delay, truth table models of combinational and
sequential logic with verilog modules, ports, gate types, gate delays, dataflow modelling, continuous
assignments delays, expressions, operators, operands, operator types.

UNIT II Text Book - 1 [CO:1,2] (13)

Logic Design With Behavioral Models of Combinational And Sequential Logic: Behavioral
modeling, data types for behavioral modeling, behavioral models of combinational logic, propagation
delay and continuous assignments, lathes and level sensitive circuits in verilog, cyclic behavioural
models of flip flops and latches, cyclic behavior and edge detection, a comparison of styles for
behavioral modeling.

UNIT III Text Book - 1 [CO:2,3] (13)

Behavioral models of multiplexers, encoders and decoders data flow model of a LFSR machines with
multicycle operations, algorthmic state machine charts for behavioral modeling, asmd charts, behavioral
models of counters, shift registers and register files, switch debounce, metastability, synchronizers for
asynchronous signals.

UNIT IV Text Book - 1 [CO:1,4] (13)

Introduction to synthesis : synthesis of combinational logic, synthesis of sequential logic with latches,
synthesis of three state devices and bus interfaces, synthesis of sequential logic with flip flops, synthesis
of explicit state machines registered logic.

Programmable logic devices: Storage Devices, Programmable logic array programmable array logic,
programmability of PLDs CPLDs.

LEARNING RESOURCES:

TEXT BOOK(s):
1. Michael D Ciletti - Advanced Digital Design with the VERILOG HDL, 2ND Edition, PHI, 2009.

B.Tech.(VL)/R-20/2020-2021 Printed through web on 15-03-2024 08:16:36 Page 1/ 2


R.V.R. & J.C. College of Engineering (Autonomous), Guntur-522019, A.P. R-20

2. Samir Palnitkar - Verilog HDL, 2nd edition, Pearson Education, 2003.

REFERENCE BOOK(s):
1. Stephen Brown and Zvonko Vranesic - Fundamentals of Digital Logic with Verilog, 2nd Edition,
TMH, 2008.
2. Z Navabi - Verilog Digital System Design, 2nd Edition, McGraw Hill, 2005.

WEB RESOURCES:
http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-884-
complex-digital-systems-spring-2005/lecture-notes/

B.Tech.(VL)/R-20/2020-2021 Printed through web on 15-03-2024 08:16:36 Page 2/ 2

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