ADDRESSING MODES

Information involved in any operation performed by the CPU needs to be addressed. In

computer terminology, such information is called the operand. Therefore, any instruction
issued by the processor must carry at least two types of information. These are the operation
to be performed, encoded in what is called the op-code field, and the address information of
the operand on which the operation is to be performed, encoded in what is called the address
field.
Instructions can be classified based on the number of operands as: three-address, two-
address, one-and-half-address, one-address, and zero-address. We explain these classes
together with simple examples in the following paragraphs. It should be noted that in
presenting these examples, we would use the convention operation, source, destination to
express any instruction. In that convention, operation represents the operation to be
performed, for example, add, subtract, write, or read. The source field represents the source
operand(s). The source operand can be a constant, a value stored in a register, or a value
stored in the memory. The destination field represents the place where the result of the
operation is to be stored, for example, a register or a memory location.

A three-address instruction takes the form operation add-1, add-2, add-3. In this form, each
of add-1, add-2, and add-3 refers to a register or to a memory location. Consider, for
example, the instruction ADD R1, R2, R3. This instruction indicates that the operation to be
performed is addition. It also indicates that the values to be added are those stored in registers
R1 and R2 that the results should be stored in register R3. An example of a three-address
instruction that refers to memory locations may take the form ADD A, B, C. The instruction
adds the contents of memory location A to the contents of memory location B and stores the
result in memory location C.

A two-address instruction takes the form operation add-1, add-2. In this form, each of add-1
and add-2 refers to a register or to a memory location. Consider, for example, the instruction
ADD R1, R2. This instruction adds the contents of register R1 to the contents of register R2
and stores the results in register R2. The original contents of register R2 are lost due to this
operation while the original contents of register R1 remain intact. This instruction is
equivalent to a three-address instruction of the form ADD R1, R2, R2. A similar instruction
that uses memory locations instead of registers can take the form ADD A, B. In this case, the
contents of memory location A are added to the contents of memory location B and the result
is used to override the original contents of memory location B.
The operation performed by the three-address instruction ADD A, B, C can be performed by
the two two-address instructions MOVE B, C and ADD A, C. This is because the first
instruction moves the contents of location B into location C and the second instruction adds
the contents of location A to those of location C (the contents of location B) and stores the
result in location C.
A one-address instruction takes the form ADD R1. In this case the instruction implicitly
refers to a register, called the Accumulator R acc, such that the contents of the accumulator is
added to the contents of the register R1 and the results are stored back into the accumulator
Racc. If a memory location is used instead of a register then an instruction of the form ADD B
is used. In this case, the instruction adds the content of the accumulator R acc to the content of
memory location B and stores the result back into the accumulator R acc. The instruction ADD
R1 is equivalent to the three-address instruction ADD R1, R acc, Racc or to the two-address
instruction
ADD R1, Racc.
Between the two- and the one-address instruction, there can be a one-and-half address
instruction. Consider, for example, the instruction ADD B, R1. In this case, the instruction
adds the contents of register R1 to the contents of memory location B and stores the result in
register R1. Owing to the fact that the instruction uses two types of addressing, that is, a
register and a memory location, it is called a one-and-half-address instruction. This is because
register addressing needs a smaller number of bits than those needed by memory addressing.
It is interesting to indicate that there exist zero-address instructions. These are the instructions
that use stack operation. A stack is a data organization mechanism in which the last data item
stored is the first data item retrieved.
The different ways in which operands can be addressed are called the addressing modes.
Addressing modes differ in the way the address information of operands is specified.

IMMEDIATE MODE
According to this addressing mode, the value of the operand is (immediately) available in the
instruction itself. Consider, for example, the case of loading the decimal value 1000 into a
register Ri. This operation can be performed using an instruction such as the following:
LOAD #1000, Ri. In this instruction, the operation to be performed is to load a value into a
register. The source operand is (immediately) given as 1000, and the destination is the
register Ri. It should be noted that in order to indicate that the value 1000 mentioned in the
instruction is the operand itself and not its address (immediate mode), it is customary to
prefix the operand by the special character (#).

DIRECT (ABSOLUTE) MODE

According to this addressing mode, the address of the memory location that holds the operand
is included in the instruction. Consider, for example, the case of loading the value of the
operand stored in memory location 1000 into register Ri. This operation can be performed
using an instruction such as LOAD 1000, Ri. In this instruction, the source operand is the
value stored in the memory location whose address is 1000, and the destination is the register
Ri. Note that the value 1000 is not prefixed with any special characters, indicating that it is
the (direct or absolute) address of the source operand. For example, if the content of the
memory location whose address is 1000 was (-345) at the time when the instruction LOAD
1000, Ri is executed, then the result of executing such instruction is to load the value (-345)
into register Ri.

INDIRECT MODE
In the indirect mode, what is included in the instruction is not the address of the operand, but
rather a name of a register or a memory location that holds the (effective) address of the
operand. In order to indicate the use of indirection in the instruction, it is customary to
include the name of the register or the memory location in parentheses. Consider, for
example, the instruction LOAD (1000), R i. This instruction has the memory location 1000
enclosed in parentheses, thus indicating indirection. The meaning of this instruction is to load
register Ri with the contents of the memory location whose address is stored at memory
address 1000. Because indirection can be made through either a register or a memory
location, therefore, we can identify two types of indirect addressing. These are register
indirect addressing, if a register is used to hold the address of the operand, and memory
indirect addressing, if a memory location is used to hold the address of the operand.

INDEXED MODE
In this addressing mode, the address of the operand is obtained by adding a constant to the
content of a register, called the index register. Consider, for example, the instruction LOAD
X(Rind), Ri. This instruction loads register Ri with the contents of the memory location whose
address is the sum of the contents of register Rind and the value X. Index addressing is
indicated in the instruction by including the name of the index register in parentheses and
using the symbol X to indicate the constant to be added.