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Session#2

The pn junction is formed by joining p-type and n-type semiconductor regions, creating a depletion region due to the diffusion of charge carriers. Forward biasing reduces the potential barrier, allowing current flow, while reverse biasing increases the barrier, preventing current flow. The document also discusses the mathematical relationship between diode voltage and current, along with examples of calculating diode current under various conditions.

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Ghassan Ateely
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0% found this document useful (0 votes)
10 views10 pages

Session#2

The pn junction is formed by joining p-type and n-type semiconductor regions, creating a depletion region due to the diffusion of charge carriers. Forward biasing reduces the potential barrier, allowing current flow, while reverse biasing increases the barrier, preventing current flow. The document also discusses the mathematical relationship between diode voltage and current, along with examples of calculating diode current under various conditions.

Uploaded by

Ghassan Ateely
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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The pn Junction

The pn Junction is formed when p‐type region is joined with the n‐type region.
This configuration represents the basic structure of a semiconductor diode.
The n‐type region has many free electrons (majority
carriers) and only a few thermally generated holes.
The p-type region has numerous holes (majority carriers)
and few thermally generated free electrons (minority
carriers).
The free electrons in the n region are randomly drifting in all directions.
Free electrons from the n region diffuse across the junction, filling holes in the p
region near the junction, as depicted in the figure.
When the pn junction is formed, the n region loses free electrons as they diffuse
across the junction.This creates a layer of positive charges near the junction.
As electrons cross the junction, the p region loses holes due to their combination
with electrons.
This creates a layer of negative charges near the junction.
These two layers of positive and negative charges
form the depletion region, as shown in the figure.
The term depletion refers to the fact that the region
near the pn junction is depleted of charge carriers due
to diffusion across the junction.

Note: The depletion region is very thin compared to the n region and p region.

The electric field across the depletion region causes a potential difference,
representing the voltage required for electron movement.
This potential difference is called the barrier potential and is expressed in volts.
The potential barrier is around 0.7V for silicon and 0.3V for germanium pn junctions.
The depletion barrier width, spanning from one side to the other, varies based on
material characteristics.
Energy Diagrams of the pn Junction
An energy diagram for a pn junction at the instant of formation is shown in Figure (a)
In the n region, the valence and conduction bands
have lower energy levels compared to the p region.
The trivalent impurities (in p-type) exert lower forces
on the outer-shell electrons than the pentavalent
impurities (in n-type).In p-type materials, weaker forces
result in slightly larger electron orbits and higher
electron energy compared to n-type materials.
As diffusion proceeds, the formation of the depletion region leads to a decrease in
the energy level of the conduction band in the n-region.
The n-region's conduction band energy decreases as
higher-energy electrons diffuse to the p region.
Briefly, no electrons remain with enough energy to
cross the junction to the p-region's conduction band, as
shown in Figure (b).
At this point, the junction is at equilibrium.The depletion region
is complete, because the diffusion has stopped.
There is an energy gradient across the depletion region
that acts as an “energy hill” that an n-region electron
must climb to get to the p region.
Biasing a pn Junction with DC Voltage
In electronics, biasing refers to using DC voltage
to set operating conditions for an electronic device.
Two bias conditions exist: forward bias and reverse bias.
Forward biasing
Forward biasing occurs when an external DC voltage
applied to the junction cancels the potential barrier,
allowing current flow.
To forward bias, connect the positive terminal of the battery to the p-type region
and the negative terminal to the n-type region.
The applied forward potential establishes
an electric field which acts against the
field due to potential barrier.
Due to the small potential barrier voltage
(0.1 to 0.5 V), only a small forward voltage
is needed to entirely eliminate the barrier.
Once the forward voltage eliminates the
potential barrier, the junction resistance
becomes nearly zero, establishing a low-resistance path for the entire circuit.
Therefore, current flows in the circuit.This is called forward current.
With forward bias to pn-junction, the following points are worth noting :
(i) The potential barrier diminishes, and at a certain forward voltage (0.1 to 0.5 V), it is completely eliminated.
(ii) The junction offers low resistance (called forward resistance, Rf) to current flow.
(iii) Current flows in the circuit due to the establishment of a low-resistance path.
The current magnitude depends on the applied forward voltage.
- Applying a forward biasing voltage on the junction diode
causes the depletion layer to become very thin and narrow.
- This thinning represents a low impedance path through
the junction.
- Consequently, it allows high currents to flow.
The point at which this sudden increase in current takes
place is represented on the static I-V characteristics curve
below as the “knee” point.
This condition represents the low resistance path
through the pn junction allowing very large currents to
flow through the diode with only a small increase in
bias voltage.
The actual potential difference across the junction or
diode is kept constant by the action of the depletion layer
at approximately 0.3v for germanium and approximately
0.7v for silicon junction diodes.
Reverse biasing
Reverse biasing happens when an external DC voltage applied
to the junction increases the width of the potential barrier,
thereby preventing the flow of current.
To Reverse bias, connect the positive terminal of the battery to the
n-type region and the negative terminal to the p-type region.
High resistance at the pn junction leads to minimal current flow
with increasing bias voltage. Reverse leakage current, typically
measured in μA, represents this current flow.
Increasing the reverse bias voltage Vr sufficiently can cause the diode’s pn junction
to overheat and fail due to the avalanche effect.
This can short the diode, leading to maximum
circuit current flow, depicted as a downward step
in the reverse static characteristics curve ahead.
Mathematical Function of a diode
The mathematical function describing the relationship between diode voltage (VD)
and current (ID) is: where Is is reverse saturation current
k = 11,600/η with η = 1 for Ge and η = 2 for Si for relatively low levels of diode
current (at or below the knee of the curve). η = 1 for Ge and Si for higher levels of
diode current. Tk = Tc + 273°
𝑇𝑘
At room Temperature 𝑉𝑇 = = 26 mv
𝑘
A typical Id versus Vd relationship for
a silicon diode is shown on this figure
The current increases exponentially with the voltage

A slight voltage alteration leads to a significant


increase in current, evident in this figure where
the I-V plot is shown.
Example #2 :
Given a silicon diode with a reverse saturation current Is = 10-12A and operated at
room temperature (Tk = 300°K),calculate the diode current when it is forward biased
with a voltage of VD = 0.7 V. Assume η = 1.
𝑘𝑉𝐷 𝑇𝑘 300
ID =Is(𝑒
ൗ𝑇
𝑘 −1) η=1 → k = 11600Τ1=11600 → 𝐾
= 11600=26 mv

0.7
ൗ26𝑥10−3
ID =10-12 (𝑒 −1) = 10-12 (𝑒 26.92 −1)= 10-12 (4.93𝑥1011 − 1) = 4.93x10−1 − 10−12 ≃ 4.93𝑥10−1 ≃ 0.5 𝐴

Example #3 :
If the temperature increases to Tk = 350°K in the previous problem, calculate the
new diode current under the same forward bias condition.
𝑇𝑘 350
= 11600=30 mv
𝐾
0.7
ൗ30𝑥10−3
ID =10-12 (𝑒 −1) = 10-12 (𝑒 23.333 −1)= 10-12 (1.36𝑥1010 − 1) = 1.36x10−2 − 10−12

→ ID ≃ 1.36𝑥10−2 ≃ 13.6 𝑚𝐴
Example #4 :
Determine the reverse bias current for the same diode at room temperature when VD = -5V.
𝑘𝑉𝐷 𝑇𝑘 300
ID =Is(𝑒
ൗ𝑇
𝑘 −1) η=1 → k = 11600Τ2=5800 → 𝐾
= 5800=52 mv
−5
ൗ52𝑥10−3
ID =10-12 (𝑒 −1) = 10-12 (𝑒 −96.154 −1)= 10-12 (1.74𝑥10−42 − 1) = 1.74x10−54 − 10−12 ≃ −10−12 𝐴 = - Is
The negative sign indicates the direction of the current flow but the magnitude is 10−12 A in reverse bias
Example #5 :
Given a silicon diode with Is = 10-14A and VD = 0.6V( η = 2), calculate the diode current.
𝑘𝑉𝐷 𝑇𝑘 300
ID =Is(𝑒
ൗ𝑇
𝑘 −1) η=1 → k = 11600Τ2=5800 → 𝐾
= 5800=52 mv
0.6
ൗ52𝑥10−3
ID =10-14 (𝑒 −1) = 10-14 (𝑒11.54 −1)= 10-14 (3.455𝑥1011 − 1) = 3.455x10−3 − 10−14 ≃ 3.455𝑥10−3 𝐴
ID ≃ 3.455 𝑚𝐴
Example #6 :
Plot the diode current (ID) versus voltage (VD) for a silicon diode (η = 1 or 2) at
room temperature (Tk = 300°K), using the diode equation. Assume Is = 10-12A .

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