2.

Technical Inte rvie w (approx 1 llour): 1 ''

• 1
~: Ask ed to intr odu ce my sel f and give a brie
11
f o.~ the p~ojects ,;:•entioned in the resume.
• Wa s asked ~o ~xplaln FIFO and wh at I
did In the project. Was also asked about
usage, apphcat,ons, advantage and disa its
dvantages. Asked about types of FIFO (shi
reg iste r, con cur ren t (sync and async) and ft
exclusive read/write).
iii. Wa s asked to explain the wor kin g of SYN
C and ASYNC FIFO in depth. Was also given
que stio n for calculating FIFO dep th. a
iv. Asked abo ut the wo rkin g of static CMOS
inverter in depth, different region, effect of
changing the sizes, and logical efforts.
v. Wa s asked abo ut the sho rt channel effects
and ways to reduce power in CMOS circuits.
Wa s del ibe rate ly asked abo ut Back Gate,
OIBL and GIDL. Was asked about GIDL point
and sub -thr esh old slope, and about oth
er devices which can reduce sub-threshold
slo pe (TFET, FinFET, FDSOI, etc).
vi. Dra w inv erte r using rati oed NMOS. was
asked to draw its VTC and advantage and
disadvantage ove r static CMOS logrc Ask
ed what will happen rf we size the NMOS and
wh at will happen if we increase/decreas
e the PUN resistor. and what will happen to

vii. ~:~~d about HI-Skew and Low-Skew circurts, their applications and VTC
of inverter for
bot h of these cases, and cha rgin g/ dischar
ging waveform for both.
- . T. · fa ro·e ct I did on RISC-V pipelrned processor.
-viii. Asked to g1\!P. an overview 0 . p J
RAM and ROM. Asked about the var,ous
ix. wa s as ked to wri te a ven log code Ior
me tho ds of initraliz1ng the memory use d th·s code (using initial block, Smemrea d.
,n '
and case statement).
d RTL vhile using case statement ar.J
X Asked abo ut the di frerent hardware mil e "' '
·11 happen ,f we remove dd, wlt conu ! , ' .
~ta tem ent . Nex t I wn~ a ~kcd about whi lt wi ' '

e and the n y,h~t v1III h,1ppen ,r we ~gain re mo \c any oth N cund1t.on f·o, . t", • •
ca~ • I ' I drd on SRAM
Mk Pd lO p1plar'1 thry:>rPIJ~,clt
I nf't hod , to iP\L llVl' lilt• \l'll' P I .,,. ' ,. ·'' ••
,,.
, 11 . r•l
A~~<·d <11Jout wtu p <1 , o <tt, 1,rm ,,nc ,
1
01) vtti.YeY~

C
1ft 10 "j g,.;"' e,yr\1
n~!)
 I\ • ('

I
 ii 11

(kfPe'ft.l)+ '1e.o·0 ()-')

Q\. r')(p lo.i( )
~• / 1 ,-,e,0k,,- J ,.,; ...
Ql . ~ CN\ O~ Q d(?.",ca. 0-< +~Al'\oloJ.'.f?

~3 - :r:p \/5 \J y!. ~'f°'{' ~ 1 'V'i0 JF5 r

Il
(i?'1. Dt'> JOi. t.. heQ.j , i'r-J C)'fOb l:zn1. tr) lee 'c«J <J..., c...,.·_-

[ ~r +: 1'~2c.1'.11,1t •. lTh.0.,-J .·(.-07,::1~fio'11 e,,_i, ••

I I I 1·
I 'ii) T..,_ ~,-.
111 .' .!J
}.i.,.) .. <>;

I' ... {
tt:: I

I
Round 1 : (45 m
inutes)
QI j"l\~'ttr(r,~j,()
f' .,Cl a°"rII-'ltf 111 \\111 i'lli1
Q1.. oJ! I l}/t>J ~\ 1:-wh• ;<,11i.11t·1•·•·••''' I

. (i) 1\L\\ 111 ,.J;V... t\Ot.<>

I Ii \1111 1 .J
t'.l!.. ,,, ,. ,,
·\\· ' •• ' • f)t.SiJ'
tit
•... d , ~ ; ~
() .1 ~ 1 --

k
,-!-o~ H,is.
I' I

oo~.:l f~1.-lem. T'r,u

!:..2.tf Ir ~ LJ~'

• r c ,J
 W n tt e n T e s t+
ln te rv ie w l2 o r
m ore Rounds)
Round 1 : (45
minutes)
G j,.,J~a

9.:s,511
•IfI o·:..,kl-
,/
(_ 1 '

\ I
2. Round l (Digital): (45 minutes)
• What is Metastability? How to a~oid it?
• G" • •
1ven a two stage and three stage synchronizers, which one do you prefer
and why? .
, .I

• What happens to uninitialized flip-flops on a Si chip. Is the output Oor 1 or

any other? Why? • '
I
• Why do you choose 45nm ~ech·oode,lhari 65nm( My project is in 45nm tech
,I • .:. ·'·
node) I: • '
• What is the difference between institution 45nm tech node and 65nm tech
,,
node. 1
• Testing Basics - Which of the basic gahi~•can't be created using 2xl Mux
Assume complimentary inputs are 1~vailable to ~ou. Given an Nxl Mux, the m,nomurr-
• r1 ' '

number of 2x1 Muxes needed to 11i/plement 1t.

1

I I I I
1ouestions on project. i
•