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BJT AC Introduction

The document discusses the AC analysis of Bipolar Junction Transistors (BJTs), focusing on their operation as amplifiers and oscillators. It explains the emitter-follower and common-emitter configurations, detailing their voltage gains, input and output impedances, and practical design considerations for amplifier circuits. Additionally, it introduces an equivalent model for BJTs used in AC analysis, emphasizing the importance of proper biasing and component selection for effective circuit performance.

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0% found this document useful (0 votes)
16 views11 pages

BJT AC Introduction

The document discusses the AC analysis of Bipolar Junction Transistors (BJTs), focusing on their operation as amplifiers and oscillators. It explains the emitter-follower and common-emitter configurations, detailing their voltage gains, input and output impedances, and practical design considerations for amplifier circuits. Additionally, it introduces an equivalent model for BJTs used in AC analysis, emphasizing the importance of proper biasing and component selection for effective circuit performance.

Uploaded by

theglitch236
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Bipolar Junction Transistors

AC Analysis

I. THEORY OF OPERATION
In the previous experiment, we become familiar with the behavior of BJT device as a current
amplifier in the dc domain. We also recognized that the behavior of this device is dependent
upon the operation point, which is identified by 𝑣𝐶𝐸 and 𝑖𝑐 . In this experiment, we examine
BJT as an amplifier of small signals as well as an oscillator. Although we identified BJT as a
current amplifier, we can demonstrate that BJT can also be viewed as a voltage amplifier. The
gain of the amplifier, however, depends on the circuit arrangement. To understand this
principle, let us examine the circuit in Fig. 1.

Fig. 1. BJT circuit for studying the AC response of BJT


In this circuit, we can insure proper biasing by selecting the dc values of the source and 𝑉𝑐𝑐 .
Now, if we modify the base voltage by Δ𝑣𝑏 , our interest is to see the values of Δ𝑣𝑒 and Δ𝑣𝑐 .
1) Emitter-Follower Voltage Gain
When the output of the circuit in Fig. 1 is the voltage across 𝑅𝑒 , the amplifier is known
as the emitter follower. So, we are interested in

Δ𝑣𝑒
𝐺= (1)
Δ𝑣𝑏
This gain can be shown to be near 1 for 𝛽 ≫ 1. Note that a change in the base voltage
results in a change in the current of the base, denoted by Δ𝐼𝑏 . Such a change causes a
change in 𝑖𝑐 of Δ𝑖𝑐 = 𝛽 Δ𝑖𝑏 and a change in the emitter current of Δ𝑖𝑒 = (1 + 𝛽)Δ𝑖𝑏 . So,
𝑣𝑏 + Δ𝑣𝑏 = 𝑅𝑏 (𝑖𝑏 + Δ𝑖𝑏 ) + 𝑅𝑒 (1 + 𝛽)(𝑖𝑏 + Δ𝑖𝑏 )
Since 𝑣𝑏 = 𝑅𝑏 (𝑖𝑏 ) + 𝑅𝑒 (1 + 𝛽)𝑖𝑏 ,
Δ𝑣𝑏 = 𝑅𝑏 (Δ𝑖𝑏 ) + 𝑅𝑒 (1 + 𝛽)Δ𝑖𝑏
Since 𝛽 ≫ 1, the first term can be ignored. Also. 𝑅𝑒 (1 + 𝛽)Δ𝑖𝑏 = Δ𝑣𝑒 . Hence,
Δ𝑣𝑒
𝐺= ≈1 (2)
Δ𝑣𝑏
This amplifier has a gain of 1. Then, why use such an arrangement? The answer is in the
impedance that this arrangement presents to the input. Note that Δ𝑣𝑏 = 𝑅𝑏 (Δ𝐼𝑏 ) +
𝑅𝑒 (1 + 𝛽)Δ𝑖𝑏
Δ𝑣𝑏
𝑅𝑖 = = 𝑅𝑏 + 𝑅𝑒 (1 + 𝛽) ≈ 𝛽𝑅𝑒 (3)
Δ𝑖𝑏
Which implies that the input impedance of the device has gone from 𝑅𝑏 to 𝑅𝑏 +
𝑅𝑒 (1 + 𝛽) ≫ 𝑅𝑏 when 𝛽 ≫ 1and 𝑅𝑏 𝑎𝑛𝑑 𝑅𝑒 are comparable. This implies that we can
realize a buffer stage not for the sake of amplification, but for the sake of isolating the
voltage source from the output. The output impedance of this arrangement can also be
found as
Δ𝑣𝑒 𝑅𝑠
𝑅0 = = 𝑅𝑒 || (4)
Δ𝐼𝑒 𝛽
where 𝑅𝑠 is the source impedance (we used 𝑅𝑏 in the figure).

2) Common-Emitter Voltage Gain


If the output of the circuit is considered to be collector voltage, then the amplifier is
known as the common-emitter. For this arrangement, Δ𝑣𝑐 = −Δic 𝑅𝑐 . This is due to the
fact that 𝑣𝑐 = 𝑉𝑐𝑐 − 𝑅𝑐 𝑖𝑐 . From the above, we see that Δ𝑣𝑏 = 𝑅𝑒 (1 + 𝛽)Δ𝑖𝑏 . Since Δic =
𝛽Δ𝑖𝑏 , then Δ𝑣𝑐 = −𝛽𝑅𝑐 Δib . We then have
Δ𝑣𝑐 𝛽 𝑅𝑐 𝑅𝑐
=− × ≈− (5)
Δ𝑣𝑏 1 + 𝛽 𝑅𝑒 𝑅𝑒

𝑅
Which implies that this arrangement is an inverting amplifier with the gain of − 𝑅𝑐 for
𝑒
𝛽 ≫ 1. This may suggest that we can have an unreasonably large gain based on values of
emitter and collector resistors. Caution must be exercised when using this arrangement.
Note that this is a small signal analysis. That means this result is valid as long as the output
voltage swing is not large enough to violate the small signal assumption. Furthermore,
the output swing cannot exceed 𝑉𝑐𝑐 . As note the previous experiment, BJT can be
considered to be a linear device over a pre-defined range of input and outputs. Exceeding
those ranges may lead to saturation and cutting off the transistor. Hence, an arbitrarily
large gain may not be possible and the system designed must take these facts into account
when selecting 𝑅𝑐 and 𝑅𝑒 .
In some scenarios, 𝑅𝑒 = 0. In that event, the gain of the amplifier seems to be infinite. In
reality, the following relationship governs the behavior of 𝑖𝑒 and 𝑣𝑏𝑒 . In particular,
𝑞𝑣𝐵𝐸
𝑖𝑒 = 𝐼0 (𝑒 𝐾𝑏𝑇 − 1) (6)

Where 𝑞 is the charge of an electron, 𝐾𝑏 is the Boltzman constant and 𝑇 is the


temperature in Kelvin. Now, the emitter resistance may be written as

Δ𝑣𝐵𝐸 26
𝑟𝑒 = ≈ Ω (7)
Δ𝑖𝑒 𝐼𝑒 (𝑚𝐴)
When 𝑇 = 300 𝐾 (room temperature). 𝑖𝑒 in this equation describes the current through
the emitter at the room temperature. In the event that 𝑅𝑒 = 0, then the gain of this
amplifier is
Δ𝑣𝑐 𝑅𝑐
≈− (8)
Δ𝑣𝑏 𝑟𝑒
The next question is concerned with the input and output impedances of this transistor
circuit. The output impedance can be seen as
Δ𝑣𝑐
𝑅𝑜 = |( )| = 𝑅𝑐 (9)
Δ𝐼𝑐
While the input impedance is approximately
𝑅𝑖 ≈ 𝛽𝑅𝑒 (10)
as was shown earlier. So, this is an ideal amplifier with large gain controlled by the
collector and emitter resistances while offering a high impedance. For this reason,
common-emitter amplifier is commonly used in practice.

3) A Practical Amplifier Circuit


As shown above, a good amplifier circuit is a common-emitter circuit. Let us consider the
circuit below, which is a common-emitter circuit and has coupling capacitor for frequency
response measures.
.
Fig. 2. A practical amplifier circuit using BJT.
There are two steps to the design of this circuit. 1) DC biasing of the circuit, which was
done in the previous experiments. 2) Gain and frequency response considerations.
Note that the amplifier circuit is AC coupled (meaning that the two capacitors isolate the
amplifier from the outside world when DC analysis is considered). These capacitors must
be selected such that the unwanted low frequency components of the input are rejected
before amplification. Furthermore, the output capacitance is designed to reject any low
frequency components of the amplifier that is presented to the output.
Let us use an example to highlight the design procedure.
Example 1
Design an AC-coupled (input and output) amplifier with a gain of -5 which has 3 dB corner
frequencies for the AC coupling in the input and output at 10 kHz and 15 kHz, respectively.
Assume a power supply of 5 volts.

Solution
Without the loss of generality, we choose 𝑅𝑐 = 500 Ω. We also assume 𝑅2 = 1 𝑘Ω.
Given a gain of -5, we have (this assumes a large 𝛽. We will verify this later in this
example)
𝑅𝑐
𝑅𝑒 = = 100 Ω
|𝐺|
Now, using the IV characteristic (shown below) we draw a load line that intersects the
𝑖𝑏 = 0 line at 𝑉𝐶𝐸 = 𝑉𝑐𝑐 = 5 (this is the point where 𝑖𝑏 = 𝑖𝑐 = 0) while crossing the
𝑉𝑐𝑐 5
𝑉𝐶𝐸 = 0 line at 𝑖𝑐 = 𝑅 = 600 = 8 𝑚𝐴. The operating point is selected for 𝑉𝐶𝐸 = 3 𝑉.
𝑒 +𝑅𝑐
3 𝑚𝐴
This results in 𝑖𝑏 = 20 𝜇𝐴. This also results in 𝐼𝑐 = 3 𝑚𝐴. Then, 𝛽 = 20 𝜇𝐴 = 150 ≫ 1.
So, the large beta condition is satisfied. Then, we have

𝑖𝑒 = 𝑖𝑏 + 𝑖𝐶 = 3 𝑚𝐴 + 20 𝜇𝐴 = 3.02 𝑚𝐴
𝑉𝑏 = 0.7 + 𝑅𝑒 𝑖𝑒 ≈ 1

𝑏𝑉
Now, the current through resistor 𝑅2 is 𝐼2 = 1 𝑘Ω = 1 𝑚𝐴. Hence, the current through 𝑅1
𝑉𝑐 −𝑉𝑏 5−1
is 𝐼1 = 𝐼2 + 𝐼𝑏 = 1.02 𝑚𝐴. Then, we have 𝑅1 = = 1.02 𝑚𝐴 = 3.9 𝑘Ω.
𝐼1

The last step of the design is the selection of the two capacitors in the design. For that,
we require the input impedance of the circuit. For an AC operation, the capacitor at the
input sees three resistors in parallel (for an AC analysis, one must ground the power
supply, which will put 𝑅2 in parallel to 𝑅1 and the input impedance of the common-
emitter amplifier. That is, 𝑅1 , 𝑅2 , 𝑎𝑛𝑑 𝑅𝑖 , where 𝑅𝑖 = 𝛽𝑅𝑒 is the input impedance of the
common emitter amplifier, all appear to be in parallel when seen from the input
capacitor. Hence,
1
𝑓𝑖 = (11)
2𝜋𝑅𝑒𝑖 𝐶𝑖
1
where 𝑅𝑒𝑖 = 1 1 = 755 Ω. We then have
+1+
3.9 150×0.1

1 1
𝐶𝑖 = = ≈ 21 nF.
2𝜋𝑅𝑒𝑖 𝑓𝑖 2πR ei 104
For the output capacitance, we have

1
𝑓𝑜 = (12)
2𝜋(𝑅𝑐 + 𝑅𝑙𝑜𝑎𝑑 )𝐶0
where 𝑅𝑙𝑜𝑎𝑑 is the load resistance of the device connected to the output of the
amplifier. In practice, 𝑅𝑙𝑜𝑎𝑑 = 50 Ω. Note that the output resistance of a common-
emitter is 𝑅𝑐 (as shown above). Hence,
1 1
𝐶0 = = = 19.29 nF
2𝜋(𝑅𝑐 + 𝑅𝑙𝑜𝑎𝑑 )𝑓0 2𝜋(500 + 50)15 × 103
This complete our design of a practical amplifier. It is important to note that the BJT circuit
can be DC biased in a number of ways, and the approach used above is only one such way.
You will have some degrees of freedom in completing your design.
4) Equivalent Model for BJT
In the previous experiment, we provided a simply model for DC behavior of BJT. We can
extend this model to a model that can be used for AC analysis of the BJT. In studying the
AC behavior of circuit, all DC voltage sources must be grounded and all DC current sources
must be left open. This simplifies the analysis if a model for BJT can be found. In Fig. 3, we
have model for AC analysis of BJT.
Fig. 3. A simplified AC model for BJT.
In this model,
𝑖𝑐
𝑔𝑚 = ≈ 40𝑖𝑐 (𝑉𝑇 ≈ 0.025), (13)
𝑉𝑇
𝛽
𝑅𝜋 = = 𝛽𝑟𝑒 , (14)
𝑔𝑚
and
𝑉𝐴
𝑅𝑜 = | | (15)
𝑖𝑐
where 𝑉𝐴 is a large negative voltage that corresponds to the 𝑖𝑐 = 0 point of the IV
characteristics. If you note the IV-charactrsitics of a BJT from previous experiments, you
recocnize that the current does not stay constant (alhough it appears so) with changes in
𝑉𝐶𝐸 . In fact, the lines have a positive, albeit small slope. Now, if you extend the IV-
charcteristic lines to the left (extrapolate backwards), all the lines merge to a single point
on 𝑖𝑐 = 0 line. The resulting voltage, which can be as negative as -75 volts, is 𝑉𝐴 . Finally,
𝑟𝑒 was computed earlier. In this model, 𝑔𝑚 is the transconductance, and the capacitors
can be obtained from the BJT datasheet. In some analysis, 𝑟𝑒 is ignored as 𝑅𝜋 ≫ 𝑟𝑒 .
5) Differential Amplifiers
In the previous section, we learned about amplification using a BJT. In many practical
applications, there is an interest in amplifying the difference between two signals. In that
case, one is in need of what is called a “differential amplifier.” Such a device can be
implemented using a pair of BJTs in four basic configuration:
1. Single Input Balanced Output (SIBO)
2. Single Input unbalanced Output (SIUO)
3. Double Input Balanced Output (DIBO)
4. Double Input unbalanced Output (DIUO)

Fig. 4. A differential amplifier using a pair of BJT’s


Fig. 4 depicts a general form for a differential amplifier. As can be seen, two voltage
sources are considered and there are two outputs 𝑉1and 𝑉2 . For SIUO case, one of the
sources is set to 0 and one output is considered. That is, 𝑉𝑖𝑛2 = 0 and we considered
only 𝑉2. In that event, an amplified version of 𝑉𝑖𝑛1is going to appear at 𝑉2. Since this
is DC coupled circuit, the output may have DC level (and, hence, the name
unbalanced). Now, if the output is considered to be 𝑉𝑜𝑢𝑡 = 𝑉1 − 𝑉2, then any DC
offset is removed as 𝑉1and 𝑉2 are considered to have identical DC levels (𝑅1 = 𝑅2 ). In
this case, we have SIBO circuit. Neither of these circuits accommodate a pair of signals,
which can be problematic when one wants to amplify the difference of two signals.
For that scenario, we need two inputs, as shown in Fig. 4. If there are two inputs, but
output is taken to be 𝑉1 or 𝑉2, then we have DIUO scenario. Finally, when the output
is considered to be 𝑉1 − 𝑉2 , we have what is known as DIBO. This arrangement is the
most common form of differential amplifier.
For the case where 𝑅1 = 𝑅2 = 𝑅𝐿 , 𝑟𝑒1 = 𝑟𝑒2 = 𝑟𝑒 (emitter resistances are the same),
𝑅𝑠1 𝑅𝑠2
and & ≪ 𝑅3 & 𝑟𝑒 (where 𝑅𝑠1 and 𝑅𝑠2 are the source resistances for sources 1
𝛽 𝛽
and 2, respectively),
𝑅𝐿
𝑉𝑜𝑢𝑡 = (𝑉 − 𝑉𝑖𝑛2 ) (16)
𝑟𝑒 𝑖𝑛1
𝑅𝐿
Hence, the quantity is the gain of the differential amplifier. This implies that one
𝑟𝑒
can vary the gain using 𝑅𝐿 , provided that all other conditions stated above have been
satisfied. This also assumes that the two BJT’s are identical in terms of their 𝛽’s and
𝑟𝑒 ’s. The equation above clearly shows a circuit that amplifies the difference between
two voltages, thereby achieving differential amplification.
We are also interested in the input and output impedances of this circuit.
Sources 1 and 2 see the following impedances:

𝑅𝑖𝑛1 = 𝑅𝑖𝑛2 = 2𝛽𝑟𝑒 (17)


Furthermore, the output impedance can be shown to be (impedance seen by any
device connected to the output)

𝑅𝑜𝑢𝑡 = 𝑅𝐿 (18)
Before we conclude this section, it is important to discuss the DC biasing of the
differential pair. For the circuit discussed above and under the conditions stated
previously, it can be shown that the operating points of the two BJTs are the same
and are given by (𝛽 ≫ 1, 𝑅1 = 𝑅2 = 𝑅𝐿 )
𝑉𝑒𝑒 − 𝑉𝐵𝐸
𝑖𝑒 = 𝑖𝑐 =
2𝑅3
and
𝑉𝐶𝐸 = 𝑉𝐶𝐶 + 𝑉𝐵𝐸 − 𝑅𝐿 𝑖𝑐
6) Current Mirrors
It is often of interest to duplicate a current in the circuit at one point in another
point of the circuit regardless of loading effect. This task is accomplished using a
current mirror concept, shown below.

𝐼𝑅𝐸𝐹 𝐼𝑜

𝑉𝑜

Assuming that 𝑅1 is connected to a supply voltage 𝑉𝑐 and that the base-emitter


voltage is 𝑉𝐵𝐸 , we have

𝑉𝑐 − 𝑉𝐵𝐸
𝐼𝑅𝐸𝐹 =
𝑅1
and (assume identical BJTs with current gain of 𝛽)

2𝐼𝑐
𝐼𝑅𝐸𝐹 = 𝐼𝑐 +
𝛽
The last equation is obtained by writing the KCL for the junction of the two BJTs.
Now,
𝐼𝑅𝐸𝐹
𝐼𝑜 = 𝐼𝐶 =
2
1+
𝛽
This implies that the output current is entirely determined by the reference
current. This arrangement requires a large 𝑅1 . A more practical design is shown
below.
In this case, 𝐼𝐶1 ≈ 𝐼𝐸1 ≈ 𝐼𝑅𝐸𝐹 . Also, 𝐼𝐶2 = 𝐼𝑜 ≈ 𝐼𝐸2 . We need to find 𝑅1 and 𝑅2 for
a given input and output currents as well as a given 𝑉𝐵𝐸 for a given 𝐼𝐶 . To see this,
let us consider an example.
Example 2
We like to design a current mirror with 𝐼𝑜 = 10 𝜇𝐴, 𝐼𝑅𝐸𝐹 = 1 𝑚𝐴. Assume that for
the BJTs, 𝑉𝐵𝐸 = 0.7 `for 𝐼𝐶 = 1 𝑚𝐴.
Solution
Given 𝑉𝐵𝐸 and 𝐼𝐸 (or 𝐼𝐶 ) relationship,
𝐼𝐶1 𝐼𝑅𝐸𝐹 𝑉𝐵𝐸1 − 𝑉𝐵𝐸2
≈ = exp ( ),
𝐼𝐶2 𝐼𝑂 𝑉𝑇
where 𝑉𝑇 is the threshold voltage for the BJT diode junction (it is assumed to be
𝐼
0.025 V). Hence, 𝑉𝐵𝐸1 = 𝑉𝐵𝐸2 + 𝑉𝑇 ln ( 𝑅𝐸𝐹
𝐼
).
𝑂

From the circuit, we also have (𝐼𝑂 = 𝐼𝐶2 ≈ 𝐼𝐸2 )


𝑉𝐵𝐸1 = 𝑉𝐵𝐸2 + 𝑅2 𝐼𝑂 .
Hence,
𝐼𝑅𝐸𝐹 1𝑚𝐴
𝑅2 𝐼𝑂 = 𝑅2 × 10𝑒 −6 = 𝑉𝑇 ln ( ) = 0.025 ln ( ).
𝐼𝑂 10𝜇𝐴
This results in 𝑅2 = 11.5 𝑘Ω. Also, since the first BJT’s collector current is
approximately 1 mA, we have 𝑉𝐵𝐸1 = 0.7. Subsequently, assuming a supply
voltage of 10 volt for the first BJT,
10 − 0.7
𝑅1 = = 9.3 𝑘Ω
1 𝑚𝐴

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