Standard Combinational Modules & Modular Networks

2. MULTIPLEXERS (SELECTORS)
1. Introduction
A multiplexer, MUX for short, is a combinational logic module.
It is also called a Universal Logic Module or ULM.
It has several data and control input lines and a single data output line.
Figure 1 shows the block diagram of a generic 2n:1 MUX

En
2n
d2n-1 2n-1
d2n-2 2n-2

2n :1
D
di
MUX Y
i

d0 0

n
Sn-1 S0
S
Figure 1 Block diagram of a 2n:1 MUX provided with an active HIGH Strobe

The data inputs to a MUX are the several data input lines (vector D) and the control (select)
input lines (vector S).
The control lines determine which of the digital information (di) from the several sources is
routed onto the single output line (Y).
A MUX acts like a single-pole multiple-position rotary switch where the switching is electronic,
Figure 2.
Depending on the position of the wiper, one of the 2n data sources will be routed (connected) to
the data output (Y).

d2n-1 ●
n
Wiper
d2 -2 ●
● Y

d0 ●

Figure 2 2n :1 rotary switch

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2 Definition of the MUX
The 2n:1 MUX consists of
- 2n 1-bit data input lines (D = d2n-1, d2n-2, …, di, …, d1, d0)
- n control input lines (S = Sn-1, Sn-2, …, Si, …, S1, S0)
- One 1-bit data output line Y.
In general, the MUX module is provided with a Module Enable usually called a Strobe (En).
3 The internal structure of a 4:1 MUX
The truth table and the block diagram of a 4:1 MUX with an active HIGH strobe are shown in
Figure 3.
ii- Truth table i- Block diagram
En
En S1 S0 Y
0 x x 0 d3
4 :1
1 0 0 d0 d2 MUX Y
1 0 1 d1 d1
1 1 0 d2 d0
1 1 1 d3
S1 S0
Figure 3 Truth table and block diagram of a 4:1 MUX with a Strobe

Boolean equations

Y = En d0 X1 X 0 + En d1 X1 X 0 + En d2 X1 X 0 + En d3 X1 X 0
Y = En (d0 X1 X 0 + d1 X1 X 0 + d2 X1 X 0 + d3 X1 X 0 )
Y = En (d0 m0(S) + d1 m1(S) + d2 m2(S) + d3 m3(S))
3
Y = E n ∑ di mi (S)
i =0
The resulting internal circuit of a 4:1 MUX is shown in Figure 4.
d3

d2

Y
d1

d0

S1 S0 En
Figure 4 Logic circuit of a 4:1 MUX with a Strobe

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A 2n:1 MUX can be expressed mathematically as
2n −1
Y = E n ∑ di mi (S)
i =0
A MUX is also called an ULM (Universal Logic Module) because a 2n:1 MUX can implement
any Boolean function of n variables.
4. Application of the MUX
MUXs are useful in many applications.
4.1 Synthesis of logic functions using MUXs
Using an 8:1 MUX, implement the following Boolean function
f(a, b, c) = Σ m(0, 2, 3, 5, 6)
0 7
1 6
1 5
0 4
1 3 f(a, b, c)
1 2
0 1
1 0

a bc
4.2 Waveform generation
A counter and a MUX can be used as a programmable waveform generator.
An easy way to generate an asymmetric waveform
Using a MUX and a counter generate the following waveform

1 ms
Solution
This waveform can be represented by a Boolean expression, such
f(a, b, c) = Σ m(0, 1, 2, 4)
we need a Mod-8 counter to drive the 8:1 MUX.
Because we want each count to last 1 msec, therefore, the frequency of the clock must be a 1
KHz clock signal
0 7
0 6
0 5 8:1 0 7
1 4 MUX f(a, b, c)
0 3
1 2
1 1 1 ms
1 0

1KHz
Mod-8

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5. VHDL descriptions of MUXs
Example 1
Write the behavioral VHDL code to synthesize an 8:1 MUX provided with an active LOW strobe.
Solution
A MUX is a combinational module. It can be described with a concurrent statement such as with-select. It
can also be described using behavioural. In this case, the CASE-WHEN statement is the most appropriate.

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6. Exercises
1. Write a behavioral VHDL code to generate the following waveform (TClk = 1 µs)

Clk

Wave
1 period

2. Show how to use a MUX as a parallel to serial converter similar to a PISO.

4. Consider the following network

3. Show how two 3:1 MUXs without strobes are connected to form a 5:1 MUX
with no extra gates. If select lines DC = 00 then select lines AB select I0, I1, I2.
When DC = .01 I3 is selected whereas I4 will be selected when DC = 10.
Give the table of this 5:1 MUX and its connection diagram.