Phys. Status Solidi A 213, No. 9, 2277–2289 (2016) / DOI 10.1002/pssa.

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applications and materials science
Graphene growth on silicon carbide:
Review Article
A review
Neeraj Mishra1,2, John Boeckl3, Nunzio Motta4, and Francesca Iacopi*,2
1
Queensland Micro- and Nanotechnology Centre, Griffith University, Nathan, 4111 QLD, Australia
2
Environmental Futures Research Institute, Griffith University, Nathan, 4111 QLD, Australia
3
Materials and Manufacturing Directorate, Air Force Research Laboratories, Wright-Patterson AFB, 45433 OH, USA
4
Institute for Future Environments, Queensland University of Technology, 2 George Street, Brisbane, 4001 QLD, Australia

Received 12 January 2016, revised 13 May 2016, accepted 13 May 2016

Published online 7 June 2016

Keywords epitaxial growth, graphene, silicon carbide

* Corresponding author: e-mail f.iacopi@griffith.edu.au, Phone: þ61 7 373 58014, Fax: +61 7 373 54209

Graphene has been widely heralded over the last decade as one technologies is one crucial requirement. We review here,
of the most promising nanomaterials for integrated, miniatur- the enormous scientific and technological advances achieved
ized applications spanning from nanoelectronics, interconnec- in terms of epitaxial growth of graphene from thermal
tions, thermal management, sensing, to optoelectronics. decomposition of bulk silicon carbide and the fine control of
Graphene grown on silicon carbide is currently the most the graphene electronic properties through intercalation.
likely candidate to fulfill this promise. As a matter of fact, the Finally, we discuss perspectives on epitaxial graphene growth
capability to synthesize high-quality graphene over large areas from silicon carbide on silicon, a particularly challenging area
using processes and substrates compatible as much as possible that could result in maximum benefit for the integration of
with the well-established semiconductor manufacturing graphene with silicon technologies.

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1 Introduction Graphene is a two dimensional single lithium ion batteries [8–16]. Furthermore, the peculiar band
atomic layer of sp2 bonded carbon atoms arranged in a structure of graphene makes it different from any other
honeycomb lattice. It is considered as the basic building material. The conduction and valence bands in graphene
block for all carbon allotropes such as 0D fullerenes, 1D meet in six single points (Dirac points) at the corners of
carbon nanotubes, and 3D graphite. Therefore, graphene is the Brillouin Zone. For low carrier energies, the bands
often used as a first approach to theoretically describe feature a linear dispersion E ¼
hkvF , where vF represents
properties of the other carbon allotropes. The first pioneer- Fermi velocity and is about 1  106 m s1 [17]. This linear
ing theoretical investigation of graphene and its band dispersion relation suggests that the electrons behave as
structure was performed by Wallace in 1947 [1]. Nearly “massless.” Since it lacks a bandgap, graphene is described
57 years later, single-layer graphene was successfully as a semimetal. Several other unusual phenomena have
isolated via mechanical exfoliation methods by Geim and been observed, such as the anomalous quantum Hall effect,
Novoselov in 2004 at the University of Manchester [2]. anomalous Berry’s phase, suppression of weak localiza-
They received the Nobel Prize in Physics in 2010 for tion, and quantum confinement [18–21]. Such extra-
ground-breaking experiments on graphene. ordinary phenomena have generated tremendous interest
Graphene exhibits a number of interesting properties in the scientific community thanks to the extraordinary
such as high electron mobility at room temperature technological implications, as well as to the possibility of
(250000 cm2 V1 s1), remarkable optical transparency fully understanding the novel science unlocked by two-
(2.3%), exceptional thermal conductivity (5000 Wm1 K1), dimensional materials.
and superior mechanical properties with Young’s modulus In this review article, first, we briefly discuss various
up to 2.4 TPa [3–7]. Its potential applications include flexible graphene growth techniques along with their potential
electronics, optoelectronics, bio-sensing, nanocomposites, applications and drawbacks. Thereafter, we provide a
and energy storage devices such as supercapacitors and comprehensive scientific progress of graphene growth on

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2278 N. Mishra et al.: Graphene growth on silicon carbide

silicon carbide (SiC) to date and evaluate its future

perspective. After that, we discuss the advantage of growing
Neeraj Mishra received his M.Tech graphene on heteroepitaxial cubic silicon carbide (3C-SiC)
degree in solid state and electronic on large area silicon (Si) substrates. Thermal decomposition
materials from Indian Institute of and metal-mediated graphene growth on 3C-SiC on Si will
Technology Roorkee, India in 2010, be further discussed in detail. Finally, the article concludes
with his thesis focussed on spray- with a brief discussion on the impact of graphene growth on
deposited ferroelectric films on po- SiC in connection to future technology.
rous silicon. He is currently working
toward his PhD degree in the School 2 Graphene growth techniques Since graphene
of Natural Sciences at Griffith Uni- was isolated first time in 2004 [2], several techniques have
versity, Australia. His current research area includes the been demonstrated to produce high quality graphene for
synthesis of high quality graphene on silicon carbide next-generation electronics applications. The most common
microstructures on silicon substrates. techniques are micromechanical exfoliation of single crystal
graphite [2], chemical vapor deposition (CVD) growth on
transition metals and dielectric insulators [22–24], chemical
reduction of graphite oxide (GO) [25], carbon nanotubes
John Boeckl is a research scientist in (CNTs) unzipping [26], and high temperature thermal
the Materials and Manufacturing decomposition of silicon carbide (SiC) [27]. Among these,
Directorate of the Air Force Research micromechanical exfoliation of graphite, CVD growth on
Laboratory located at Wright-Patter- transition metals, and high temperature thermal decompo-
son Air Force Base in Ohio. He has a sition of SiC has gained colossal interest in scientific
BS degree from Cleveland State community.
University and MS and PhD degrees Micromechanical exfoliation of graphite is the com-
in electrical engineering from The monly used technique to produce the highest quality
Ohio State University. Boeckl is a
lead researcher of low-dimensional carbon material
growth on SiC. In addition to managing this growth
Francesca Iacopi is a Materials
effort, Boeckl is also well versed in various characteriza- Scientist and Nanotechnology expert
tion tools that are used to evaluate the resulting material with nearly 20 years research experi-
both electronically and structurally. He has served ence across Industry and Academia.
multiple times as Editor and Chair of topical reviews She received her MSc in Physics in
and symposia with focus on nanocarbon and graphene.
1996 from “La Sapienza” University
(Rome, Italy) and her PhD in EE from
the Katholieke Universiteit Leuven
Nunzio Motta is a Professor and (Belgium) in 2004. Author of over
Principal Research Fellow at Queens- 100 peer-reviewed publications and holder of eight
land University of Technology granted patents, she has achieved international reputation
(QUT). He obtained his PhD in for her contributions to materials and processes for
Physics at the Scuola Normale Supe- advanced CMOS technologies across the area of devices,
riore (Pisa) in 1986. He held Faculty interconnects, and packaging. Research scientist at IMEC
positions in Italy at University of (Belgium) over 1999–2009, she then took up a year Guest
Roma Tor Vergata and University of Professorship at the University of Tokyo (Japan). In
Roma TRE until 2004. At QUT since 2010–2011, she directed the Chip-Package Interaction
2005, he is currently leading research in new materials for strategy for GLOBALFOUNDRIES (CA, USA), the
solar energy and environmental nanotechnology, devel- world’s second-largest semiconductor foundry. At Grif-
oping graphene-based supercapacitors, new solar cells, fith University, she was the inventor of a unique process
and nanosensors. He is internationally recognized in the for high-quality graphene on silicon, with applications in
field of material science, with over 25 years of experience integrated micro-technologies, such as bio-compatible
in growth and characterization of nanostructures, sensing and energy storage. She was a 2003 recipient of a
scanning tunnelling microscopy, and atomic force Gold Graduate Student Award from MRS, a 2012
microscopy. Nunzio Motta obtained several visiting recipient of a Future Fellowship from the Australian
positions in various research institutions across Europe, Research Council, and she was awarded a “Global
published more than 140 papers in materials science and Innovation Award” for “Processes enabling low cost
surface physics, and led many international research graphene/silicon carbide MEMS” in Washington DC,
projects in the area of nanotechnology. May 2014.

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Article

Phys. Status Solidi A 213, No. 9 (2016) 2279

graphene with the best device characteristics. Carrier

mobility in excess of 200000 cm2 V1 s1 has been
reported for suspended single layer exfoliated graphene
at room temperature [28, 29]. However, when transferred
onto the SiO2 substrates, scattering of electrons by optical
phonons of the substrate limits the mobility value to
40,000 cm2 V1 s1 [30]. Unfortunately, this method is
not appropriate for industrial scale production, suffering
from a cumbersome labor intensive process of transfer
and investigation. Further, the thickness, the size, and the
distribution of the graphene layers cannot be controlled
at a large scale. Therefore, undoubtedly a more scalable
technique is required.
CVD growth on transition metals seems promising to
produce high quality graphene, potentially on a large scale.
Figure 1 Growth of epitaxial graphene on silicon carbide wafer
In this method, carbon-containing gases such as methane, via sublimation of silicon atoms (adapted from Ref. [42]).
ethane, or propane decomposes on the catalytic metal (Ni,
Ru, Ir, Cu, Co etc.) surfaces at high-temperature and
converts into graphene [31–35]. After growth, the graphene surface, which subsequently rearranges to form graphitic
layer needs to be transferred onto an appropriate substrate layers (Fig. 1) [42].
for characterization. Typical mobility values recorded Epitaxial graphene on SiC is considered as a potential
for the CVD-grown graphene are in the range of 1000– material for high-end electronics that might be able to
25000 cm2 V1 s1 [36]. Herein, the dominant scattering surpass silicon in terms of key parameters such as feature
mechanisms are dislocations, grain boundaries, and other size, speed, and power consumption [43]. Graphene/SiC-
substrate-related features. Using this CVD process, gra- based electronic devices are believed to have promising
phene can be grown on a large metal surface compared to potential for future high-frequency applications [44]. In
exfoliated graphene. Bae et al. has demonstrated a roll-to- addition, graphene on SiC can be an ideal platform for
roll production of 30 inch graphene film for transparent structured graphene such as transducers and membranes that
electrodes using the CVD method [22]. The single layer are directly grown on patterned SiC on Si substrates,
graphene produced via this technique showed a sheet discussed in Section 4.2 of this article.
resistance value 125 Ω/& with 97.4% optical transmit-
tance. Whereas, a stack of doped four layer graphene has 3 Thermal decomposition of bulk SiC The ther-
demonstrated sheet resistance values as low as 30 Ω/& mal decomposition of hexagonal SiC (bulk) was first
with 90% transparency, which is superior to commercially reported by Badami in 1965 [45]. In his experiments, the
available transparent electrodes such as indium tin SiC crystals were annealed to high temperature (in excess of
oxides [22]. Although the CVD growth shows aforemen- 2180 8C) for an hour in vacuum to obtain a graphite lattice
tioned advantages, the graphene still needs to be transferred on top. Various stages in the development of this graphite
onto an insulating substrate. Furthermore, the graphene may lattice were analyzed using X-ray diffraction methods and a
be contaminated with metals, which can degrade the mechanism of decomposition of the SiC proposed. A decade
performance of graphene-based electronic devices. There- later in 1975, Bommel et al. demonstrated the formation of
fore, a transfer-free method for fabricating large-area monolayer graphite on both the C-face and the Si-face of
single-crystalline graphene domains is needed to overcome hexagonal SiC at a temperature as low as 800 8C in ultra-
these setbacks. high vacuum (UHV) [46]. They suggested that collapse of
Thermal decomposition of SiC has been intensively carbon atoms of three successive SiC layers results in the
studied lately as a promising route for obtaining highly formation of one graphitic layer. Note that graphene was
reproducible and homogenous large-area graphene for referred as monolayer graphite in these early reports.
electronic applications [37]. The main advantage of thermal Although the epitaxial growth of graphene on SiC had
decomposition of SiC over other conventional techniques is been known for longtime [46], its electronic properties
that the graphene layers can be directly obtained on a remained unknown until the early 21st century. In 2004, De
commercially available semiconducting or semi-insulating Heer et al. at the Georgia Institute of Technology performed
substrate, so no transfer is required before processing first transport measurements on multilayer epitaxial
electronic devices [37–41]. In this method, a commercially graphene grown via thermal decomposition of SiC in
available SiC sample is annealed at high temperature (more ultrahigh vacuum [27, 37]. They revealed the Dirac nature of
than 1400 8C) in vacuum or under atmospheric pressure the charge carriers and found the mobility values exceeding
conditions. Since the vapor pressure of carbon is negligible to m ¼ 1100 cm2 V1 s1 in graphene on SiC. Higher mobility
compared to the silicon [37], at high temperature silicon values further obtained by improving the quality of
atoms evaporate and leave behind carbon atoms on the graphene [37, 47]. In addition, the discovery of fractional

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2280 N. Mishra et al.: Graphene growth on silicon carbide

quantum Hall effect, observation of 2D electron gas controlled sublimation (CCS) method [37] and annealing in
behavior along with the appealing possibility to incorporate the presence of an external Si flux [53] have been suggested
the existing silicon technology to mass produce and pattern to further improve the quality of epitaxial graphene. In the
epitaxial graphene makes it an appealing material for future case of the CCS method, high-quality graphene layers
electronics. (single or multiple) are obtained in a near-equilibrium
Even though the thermal decomposition of SiC in environment [37, 43]. Herein, a SiC sample is placed in a
high/ultrahigh vacuum appears promising for large scale graphite enclosure equipped with a small leak. The graphene
production of graphene-based devices, graphene grown via growth rate is regulated by controlling the evaporation rate
this technique consists of small grains (30–200 nm) with of silicon through the leak [37]. While in the Si flux method,
varying thickness [48, 49]. These small-grain structures are quality of the graphene is controlled by controlling the Si
formed due to morphological changes of the SiC surface in vapor pressure using disilane gas [53].
the course of high-temperature annealing. The quality of Epitaxial graphene can be grown on either of the two
graphene produced in high/ultra-high vacuum is poor due to polar faces of a SiC crystal. The growth rate and the
the high sublimation rates at relatively low temperatures. electronic properties found to be dependent on the specific
Therefore, a more controllable technique is required to polar SiC crystal face. Bommel et al. first reported the
overcome this problem. difference between graphene grown on the C-terminated
Emtsev et al. in 2009 demonstrated a novel approach to face (000
1) and the Si-terminated face (0001) [46]. Their
obtain morphologically superior graphene layers on the SiC low-energy electron diffraction (LEED) results revealed the
surface [38]. This method involves annealing the SiC crystallographic orientation relation between the SiC and
samples at high temperature (>1650 8C) in an argon the graphene layer. A monocrystalline graphene film is
environment. The presence of this high pressure of argon obtained on the SiC(0001), with the unitp mesh
ffiffiffi rotated 308
reduces the Si evaporation rate [50]. This is because the with respect to the SiC unit cell (6  3 structure). In
silicon atoms desorbing from the surface have a finite contrast, a polycrystalline graphene film was found on the
probability of being reflected back to the surface by collision SiC(000
1) [46, 54]. In addition, the rate of graphene growth
with argon atoms. The high growth temperature further on the SiC(0001) was found to be much slower compared to
enhances surface diffusion such that the restructuring of the the SiC(000
1) [37]. A detailed discussion on the under-
surface is completed before graphene formation. This standing of graphene grown on both Si- and C-terminated
finally leads to a significant improvement in the surface faces is presented in the following sections.
morphology of graphene on SiC. Figure 2 compares the
surface morphology (AFM) of the monolayer graphene 3.1 Graphene growth on Si-face of SiC A number
grown on 6H-SiC(0001) via thermal decomposition in UHV of groups have succeeded in growing large-area, single
with the graphene grown in an argon environment [38]. It crystalline monolayer (ML) graphene on SiC(0001) with
is obvious from the AFM images that the Ar-mediated good reproducibility [38, 55, 56]. It was reported that the
growth results in a superior morphology compared to the graphene layer is not directly
pffiffiffi grown
pffiffiffi on top of the substrate
UHV graphitization. Furthermore, the graphene domains but rather on a complex (6 3  6 3)R308 non-conducting,
obtained in an Ar environment were much larger in size carbon-rich interfacial layer [43, 57–60], which is partially
(3  50 mm2). Later, several researchers demonstrated covalently bonded to the underlying SiC substrate. This
a wide range of domain size, with reports as large as interfacial layer acts as an electronic “buffer” layer between
50  50 mm2 [51, 52]. the graphene films and SiC substrate and provides a
After the discovery of Ar-assisted thermal decomposi- template for subsequent graphene growth. Since this buffer
tion of SiC, other techniques such as the confinement layer forms a non-interacting interface with the graphene
layers on top of it, monolayer graphene grown on SiC(0001)
is electronically identical to a freestanding graphene
layer [43]. A detailed discussion on decoupling this buffer
layer by intercalation is further presented in Section 3.3.
Figure 3 shows the scanning tunneling microscopy
(STM) images of the monolayer (1 ML) and bilayer (2 ML)
epitaxial graphene grown on SiC(0001) [58]. Monolayer
graphene revealed a perfect hexagonal structure with six
protrusions, highlighted by red dots in Fig. 3a. Such
observation is expected for graphene, where the two atoms
per unit cell are equivalent and lead to a symmetric
appearance in STM. The observed hexagonal pattern seems
Figure 2 AFM image of graphene grown on 6H-SiC(0001) by analogous to the exfoliated graphene on SiO2, a character-
annealing in (a) ultrahigh vacuum at a temperature of about istic of linear band structure. On the other hand, multilayer
1280 8C and (b) Ar environment (900 mbar of pressure) at graphene grown on the SiC(0001) surface is Bernal stacked
1650 8C (adapted from Ref. [38]). and follows either AA0 or AB stacking sequence

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Phys. Status Solidi A 213, No. 9 (2016) 2281

layers and annealing temperatures [56]. It is clear from the

plot that the number of layers increases with increasing the
annealing temperature. Norimatsu et al. also suggested that
an extended sintering time at a lower temperature is more
effective in producing uniform graphene layer than a simple
increase in the temperature. However, at a fixed tempera-
ture, graphene grows rapidly in the first 10 min, slows down
gradually, and then the growth nearly stops within 1 h after
the start of annealing [61]. A full explanation of the
phenomenon was provided recently by Zarotti et al. [63].

3.2 Graphene growth on C-face of SiC In contrast

to the Si-terminated (0001) face, graphene grows much
faster and thicker on the C-terminated (000
1) face [56, 64].
Figure 4 shows that graphene starts forming at a
significantly lower temperature about 1100 8C on SiC(000
1)
compared to 1250 8C on SiC(0001) [56]. At a particular
temperature, a thicker graphene film is obtained on the
SiC(000
1) than on the SiC(0001). For example, at about
1250 8C, nine graphene layers grow on the SiC(000
1) while
a single graphene layer is formed on the SiC(0001).
Figure 3 (a) STM image of monolayer graphene grown on As discussed in the previous section, Bommel et al.
SiC(0001). (b) Schematic of atoms arranged in AB and AA0
revealed the polycrystalline nature of the graphene film on
stacking sequence in a bilayer graphene. (c) STM image of bi-layer
graphene. Red and red–blue hexagon representing AA0 and AB
SiC(000
1). A number of researchers have attempted
stacking sequences, respectively (adapted from Ref. [58]). growing graphene with slightly different growth condi-
tions [52, 65–67]. In early reports, the graphene growth
(Fig. 3b) [58]. Figure 3c displays the atomically resolved regions were described as “islands,” since they appeared as
STM image of bilayer graphene (2 ML) [58]. The left (red) pocket of graphene on the SiC surface [52, 66]. Later, Hite
and right (red–blue) hexagons illustrate the two graphene et al. discovered that these islands actually exist at a lower
layers arranged in AA0 and AB stacking sequences, level than the surrounding surface and referred to them as
respectively. graphene-covered basins (GCBs) [65]. They suggested that
Norimatsu et al. and Luxmi et al. independently reported the crystallographic defects (commonly screw dislocations)
that the number of graphene layers on the SiC(0001) can be in the underlying SiC substrate act as nucleation sites for
controlled by controlling the growth parameters such as these GCBs. During expansion, GCBs coalesce with other
annealing temperature and time [56, 61, 62]. Figure 4 GCBs having different orientation, sizes, and thickness. As
displays the relationship between the numbers of graphene a result, the fully developed graphene film on the SiC(000
1)
contains misoriented grains with non-uniform thickness. In
order to avoid this problem, Ouerghi and his group explored
the growth on off axis 6H-SiC(0001) wafers in UHV,
showing that a perfect uniform graphene monolayer can be
obtained on the terraces at 1300 8C, by limiting the Si
sublimation rate with N2 and Si fluxes [68].
By using STM [40], we recently clarified the detailed
transformation mechanism of the SiC into graphene on
the C-face of 3C-SiC(111): at T > 1200 8C, SiC starts to
lose pSiffiffiffi atoms
pffiffiffi and the top layer rearranges in a
SiCð 3  3ÞR30 reconstruction (Fig. 5a). The loss of
further Si atoms
pffiffiffi leads to a new intermediate distorted stage
SiCð3=2  3ÞR30 nearly matching the graphene (2  2)
structure (Fig. 5b), which evolves into graphene by losing the
residual Si atoms (Fig. 5c and d). Note that as the first four
layers of cubic SiC(111) are arranged in the same order of
SiC(0001), their findings are applicable to both structures [40].
Figure 4 Graphene thickness as a function of annealing Multilayer graphene grown on SiC(000
1) is found to be
temperature for 6H-SiC (0001) surfaces, showing results for both rotationally disordered and defective [59, 69–71]. The
C-face and Si-face (reproduced with permission from Ref. [56], graphene layers are ordered in a particular way with
©2010, American Physical Society). alternating 0 and 308 rotations relative to the substrate [43].

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2282 N. Mishra et al.: Graphene growth on silicon carbide

sheet. Tedesco et al. reported a very high carrier mobility

of 150000 cm2 V1 s1 for near-intrinsic carrier density
at room temperature [72]. This value can reach up to
250000 cm2 V1 s1 undefined for the low temperature
measurement in magnetic field below 50 mT for a multilayer
graphene [73, 74].

3.3 Intercalation on graphene in SiC As dis-

cussed in Section 3.1, the thermal decomposition of
SiC(0001)pproduces
ffiffiffi pffiffiffi a monocrystalline graphene film along
with a (6 3  6 3)R308 reconstructed interfacial carbon
layer. This interfacial carbon layer is partially covalently
bonded with the underlying substrate surface and does not
exhibit the intrinsic electronic structure of graphene and is
often called a zero layer or buffer layer [59]. The buffer
layer plays a vital role in passivating the dangling bonds of
the SiC substrate and induces considerable n-doping
(1  1013 cm2) in the overlying monolayer graphene
film [60, 75]. This induced doping provides a source of
Figure 5 STM images of 3C-SiC(111)/Si(111) after annealing at electronic scattering, which is a major problem for SiC-
1250 8C. (a–b) (3.6  2.8) nm2 STM image (V ¼ 60 mV, I ¼ 80 pA) supported graphene structures for future electronic device
showing the coexistence of two different reconstructed phases. applications [57]. Intercalation of a chemical species
(c) Image acquired in a nearby region, showing the transformation
between the buffer layer and SiC substrate has been
of the 3/2  √3 into graphene. (d) Zoom of the area where the
transformation is occurring (adapted from Ref. [40]). demonstrated to be an effective route to overcome this
problem. The intercalation process is able to transform the
buffer layer into monolayer graphene by decoupling it from
Due to this type of non-Bernal stacking, the symmetry the silicon carbide substrate.
between the atoms in the unit cell is not broken in Several elements such as Si, H, Li, Au, O, F, Na, Rb, and
multilayers. As a consequence, each graphene layer As have been observed to intercalate graphene on SiC
possesses the electronic structure of an isolated graphene substrates [76–84]. Figure 6 displays the model for Si

Figure
pffiffiffi 6p(a)
ffiffiffi A schematic structural model for monolayer graphene on the SiC(0001) substrate including a strongly bound ordered
(6 3  6 3)R308 carbon buffer layer at the interface and defects in the graphene sheet, (b) after Si deposition, (c) after annealing at
800 8C resulting in a Si intercalated layer and bilayer graphene. The p-band around the K-point recorded from ARPES spectra for (d)
monolayer graphene, (e) after Si deposition, and (f) after successive annealing to 800 8C, respectively (adapted from Ref. [83]).

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Phys. Status Solidi A 213, No. 9 (2016) 2283

intercalation as investigated by Xia et al. in 2012 [83]. In this Among the various methods investigated to grow
case, first, a Si layer was deposited on graphene/buffer/SiC graphene on 3C-SiC on Si, two appear as the most
surface (Fig. 6b) and subsequently annealed at 800 8C. promising: (i) Thermal decomposition of 3C-SiC on Si
During annealing, Si atoms migrate through the existing substrate; and (ii) metal-mediated graphene growth. We will
defects in the graphene sheet and the buffer layer, discuss these methods in the next subsections.
consequently passivating the Si dangling bonds at the
SiC–buffer layer interface (Fig. 6c). Finally, the buffer layer 4.1 Thermal decomposition of 3C-SiC on
decouples from the substrate forming bilayer graphene on Si Thermal decomposition is the most widely investigated
top. This phenomenon was experimentally confirmed by technique for obtaining epitaxial graphene on 3C-SiC on Si.
observing angle-resolved photoemission (ARPES) spectra Several research groups have elegantly presented this
of the corresponding samples. The initial monolayer technique in their respective reports with slightly different
graphene shows a single p-band crossing the Dirac point process conditions [39, 40, 87–91]. The first formal report
at an energy of 0.4 eV below the Fermi level (Fig. 6d), on the epitaxial growth of graphene on 3C-SiC(111)/Si(110)
corresponding to an n-type doping concentration of was published by Miyamoto et al. in 2009 [90]. Their
1  1013 cm2. No change in the position of p-band graphene growth process consists of two steps: (i) the
was observed after Si deposition (Fig. 6e) and after growth of a 3C-SiC film on a Si substrate via a gas-source
annealing the sample at 800 8C (Fig. 6f). However, the molecular beam epitaxy (GSMBE) using monomethylsilane
p-band split into two, when the sample was annealed at (MMS, 99.999%) as a single source; and (ii) annealing
800 8C (Fig. 6f), indicating the transformation of the carbon the samples in ultrahigh vacuum at 1300 8C for 30 min to
buffer layer and one monolayer of graphene into two layer obtain epitaxial graphene. Figure 7a shows the C1s core
graphene upon Si intercalation. level spectrum of the graphene grown on 3C-SiC on Si via
this technique, indicating the formation of a well-ordered
4 Graphene on silicon through heteroepitaxial 2D network of sp2 bonded carbon atoms [91], also
3C-SiC Although very high quality graphene has been confirmed by Aristov et al. [92]. They named this epitaxial
achieved on bulk SiC through the thermal decomposition growth method as graphene on silicon (GOS). Although
technique, the use of SiC wafers leads to limitations in terms their results were very promising, a detailed investigation
of wafer sizes, wafers cost, and availability of micro- later clarified that the graphene was actually grew on
machining processes. 3C-SiC(110)/Si(110) instead of 3C-SiC(111)/Si(110) [91].
Direct growth of graphene on hetero-epitaxial cubic In successive years, their group produced graphene on 3C-
silicon carbide (3C-SiC) on silicon (Si) substrates would SiC(100)/Si(100) and 3C-SiC(111)/Si(111) substrates as
overcome such limitations [85, 86]. There are two major well [88]. Recently, they succeeded in fabricating top-gate
advantages associated with using Si as a substrate. First, and back-gate field effect transistors using GOS as a channel
silicon wafers are at the moment still orders of (GOS-FET) [91]. The top-gate GOS-FETs was found to be
magnitude less expensive than silicon carbide and superior for practical devices mainly in high-frequency
available in large size up to 12 inches. Second, using applications, because the influence of the substrate to the
a Si as substrate provides easy access to the well- device performance can be eliminated. A schematic of the
established Si-based integrated circuit technology and top-gate GOS-FET is shown in Fig. 7b [91]. The high-
infrastructure. resolution transmission electron micrograph indicates a

Figure 7 (a) Comparison of C1s core level spectra of epitaxial 3C-SiC (110) before (black) and after (red) thermal annealing at 1300 8C
for 30 min. After graphitization, the sp2 peak is strongly enhanced. (b) Schematic cross section of GOSFET (left) and TEM image of
epitaxial graphene layer (right) (adapted from Ref. [91]).

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2284 N. Mishra et al.: Graphene growth on silicon carbide

multilayer graphene grown on the 3C-SiC surface. The

transfer characteristics of this top-gate GOS-FET revealed
an ambipolar behavior with a minimum conductance at the
gate bias voltage of 3.8 V.
Among other research groups, Ouerghi’s group from
CNRS, France is a major contributor in developing this high
vacuum sublimation process and published three consecu-
tive papers in 2010, explaining the graphene growth
mechanism [85, 87, 93]. Their graphene growth method
consists of several steps. First, SiC/Si substrates were
degassed for several hours at 600 8C under UHV conditions
followed by annealing under a low (0.1 nm min1) Si flux at
900 8C to remove the native oxide. Finally, the samples were
annealed at high temperature (900–1300 8C) to obtain
epitaxial graphene. The XPS spectra recorded for a number
of temperatures to investigate the evaluation of graphene
with increasing the temperature. Figure 8 shows that the
core level C1s peak at 284.8 eV associated with the sp2 Figure 9 Time dependence of normalized XPS C1s intensities
bonded carbon atoms clearly appears at 1200 8C [87]. The from graphene overlayer on SiC/Si(111) (adapted from Ref. [63]).
peak clearly increases with temperature and shift toward
lower binding energy.  
ESi
We recently reported a more comprehensive study on Ea ¼ U d þ =2;
the evolution of graphene layers on SiC/Si substrates as a 2
function of temperature and of annealing time [39, 63]. By
analyzing the time evolution of the graphene C1s peak at where, U d is the activation energy for Si diffusion in the
several temperatures (Fig. 9), we obtain the general growth overlayer and ESi is the energy (standard enthalpy) for
law as hðtÞ=l ¼ btg , where hðtÞ represents the mean releasing the atomic silicon. This quantitative description
overlayer thickness formed on the substrate at the time t, l allows for a fine-tuning of the desired number of graphene
symbolizes the effective escape depth of electrons in the layers.
material and b is a constant. We also found that the time
exponent (g ¼ 1/2) provides the best fit at all temperatures. 4.1.1 Factors affecting graphene growth on
Furthermore, the activation energy of the SiC in the heteroepitaxial SiC Epitaxial graphene obtained via
evolution of graphene has been estimated as Ea ¼ 2.5  0.5 thermal decomposition of 3C-SiC on Si is affected by
eV, using following formula: factors such as crystallographic defects, initial surface
roughness, and orientation of the 3C-SiC films [89, 91, 94].
Among all aforementioned factors, orientation of the 3C-
SiC film and associated crystallographic defects has the
most profound effect on epitaxial graphene. Several
researchers have studied the epitaxy of graphene on
(100), (111), and (110) oriented 3C-SiC film [87, 91, 92,
94, 95]. 3C-SiC heteroepitaxial films grown on (100) Si
substrates were characterized by a high density of defects
such as antiphase boundaries [96]. These antiphase
boundaries can transfer on to the graphene layers
(Fig. 10a) with dissimilar thickness, which can deteriorate
the intrinsic properties of ideal graphene. 3C-SiC films
grown on off-axis (100) Si substrates were used to eliminate
these APBs, and single domain epitaxial graphene films
obtained on the surface (Fig. 10b) [95]. In contrast, 3C-SiC
films grown on (111) Si substrate is believed to be the most
desirable surface to grow epitaxial graphene since it is free
from APBs and has hexagonal symmetry like 6H-SiC and,
therefore, acts as a good template for graphene growth.
Several research groups confirmed this finding by growing
graphene on 3C-SiC on (111) Si substrate [94, 97].
Figure 8 C 1s XPS spectra of the fully grown graphene on Remarkable graphene continuity was observed in this case
3C-SiC(111) for different temperatures (adapted from Ref. [87]). even on the step edges.

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Article

Phys. Status Solidi A 213, No. 9 (2016) 2285

density and uniformity of the graphene remained

challenging.
In response to these limitations, we have recently
demonstrated a novel alloy-mediated catalytic approach to
grow high-quality, highly-uniform bilayer graphene on 3C-
SiC on both (100) and (111) Si substrates [106, 107]. The
graphitization process consists of the following steps: (i)
deposition of double layer of nickel (Ni) and copper (Cu)
onto the 3C-SiC surface; (ii) annealing samples at mild
temperature (900–1100 8C) for 1 h; (iii) removal of metal/
metal-silicide layer by immersing samples in wet chemical
Figure 10 AFM image of epitaxial graphene grown on (a) etch solution. The obtained bilayer graphene covers
3C-SiC(100)/on-axis Si (the white arrows indicate antiphase uniformly a 2” silicon wafer with average Raman ID/IG
domain boundaries), and (b) 3C-SiC(100)/off-axis Si (adapted band ratio as low as 0.2–0.3, indicative of a lowly
from Ref. [95]).
defective material [106]. Note that this ID/IG ratio is
consistent over large surfaces and considerably small
compared to the previously reported graphene on 3C-SiC
Surface roughness of the 3C-SiC film is another on Si [39, 91, 93].
important parameter in determining the quality of the Due to its extraordinary mechanical and electrical
epitaxial graphene as discussed above. It strongly influences properties [2, 6], a graphene coating is expected to greatly
the electron mobility in the graphene epitaxial layer through improve current micro-electro-mechanical systems
strain and misorientation of the graphene crystal struc- (MEMS) [108]. However, the low adhesion of transferred
ture [89, 91]. A surface roughness value less than 1 nm is graphene is a major drawback for device fabrication and
essential to obtain high quality epitaxial graphene. Various reliability. The alloy-mediated graphene has indicated an
methods such as chemical mechanical polishing, plasma- adhesion energy to the underlying 3C-SiC film [106] nearly
assisted polishing, and plasma smoothing have been used to an order of magnitude higher than that of graphene layers
achieved smooth 3C-SiC surface [98–100]. transferred onto a SiO2 layer on Si [109]. Additionally,
wafer-scale fabrication of graphitized SiC microstructures
4.2 Metal mediated graphene growth The ther- (bridges and cantilever) on a silicon substrate through a
mal decomposition approach appears to have two major selective, self-aligned, transfer-free catalytic process was
limitations in the case of silicon carbide on silicon. First, the recently demonstrated [107]. Figure 11a illustrates the
quality of the graphene film produced in high/ultra-high complete fabrication process. First, the microstructures are
vacuum is limited due to the difficulty in controlling patterned on the 3C-SiC surface via standard photolithog-
sublimation rates at relatively low (900–1300 8C) temper- raphy technique. In this, the SiC/Si wafer is coated with
atures [39, 90, 94]. A large D–G band Raman intensity ratio photoresist, and the structures are defined. Unprotected SiC
(ID/IG) about 1 was reported, which is considerably high in areas are selectively removed via plasma etching, and the
comparison to the exfoliated grapheme [39, 90]. Second, the remaining photoresist is removed using O2 plasma.
thermal decomposition technique is commonly limited to The bimetal (Ni and Cu) catalyst layer is deposited on
the use of 3C-SiC(111) surface [39, 85, 91]. the entire wafer. After that, the samples are annealed at
To address these issues, some groups have investigated moderate temperature (1000–1100 8C) in a carbolite HT
an alternative catalyst-based approach for obtaining furnace for 1 h to produce graphene and metal/metal-silicide
graphene on the 3C-SiC on Si [101–104]. This method layer on the patterned 3C-SiC surface. The metal/metal-
involves depositing a metal layer such as nickel or cobalt on silicide layer is then removed by immersing the samples in a
the 3C-SiC surface and subsequently annealing the sample wet chemical etch solution. Finally, a XeF2 isotropic silicon
at temperatures ranging from 750 to 1200 8C, which is much etching is performed to release the graphitized 3C-SiC
lower than the thermal decomposition process. During the structures. Figure 11b and c shows the SEM images of
annealing process, SiC reacts with metal forming a metal graphitized 3C-SiC microstructures including bridges and
silicide and releasing atomic carbon into the system [105]. cantilevers fabricated via this technique [107].
This released atomic carbon precipitates upon cooling and Finally, we have recently demonstrated that the metal-
rearranges into single- to few-layer graphene. In most cases, mediated graphene approach using only nickel can also be
the graphene was found to grow on the metal surface, still optimized to obtain a highly rugged electrode material for
needing to be transferred onto a semiconductor or an on-chip supercapacitors [12]. Therefore, we suggest that
insulating surface to obtain a functional device, which although the graphene quality may not match that of
hinders its utility for large-scale device fabrication [101, graphene grown on silicon carbide wafers, the metal-
103]. Although the earlier attempts at nickel-mediated mediated graphene growth from heteroepitaxial silicon
graphitization from amorphous or crystalline SiC films on carbide offers large flexibility and opens the door for large-
silicon had shown some promise, improving the defect scale fabrication of graphene nanostructures for a large

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2286 N. Mishra et al.: Graphene growth on silicon carbide

Figure 11 (a) Sequential steps for the wafer-

level fabrication of graphitized silicon carbide
microbeams on a silicon substrate. Once the
SiC is patterned, the few-layer graphene is
grown selectively on the SiC structures via
metal-mediated graphitization. The reacted
metal layer is subsequently removed, and the
structures are released from the substrate to
form suspended beams. SEM micrographs of
released Graphene/3C-SiC microstructures
including (b) bridges and (c) cantilevers
(adapted from Ref. [107]).

range of electronic, photonic, optomechanical, energy silicon, leading to straightforward patterning and micro-
storage, and sensing applications on a silicon platform. machining capabilities.

Acknowledgements F. Iacopi would like to acknowledge

5 Conclusions The aim of this review article is to funding support from the Air Force Office of Scientific Research,
provide detailed insight into the graphene growth on SiC Office of Naval Research Global, and Army RDECOM through the
surfaces, its properties, and technological relevance. The grant AFOSR/AOARD 15IOA053. F. Iacopi is also recipient of an
first sections summarize the outstanding properties of Australian Research Council Future Fellowship (FT120100445).
graphene and the leading graphene growth techniques such N. Motta acknowledges the financial support of the Australian
as micromechanical exfoliation, CVD growth on metals, Research Council (ARC) through the Discovery project
and thermal decomposition of SiC. The thermal decompo- DP130102120. We would like here to acknowledge the important
contributions of Prof. H. P. Strunk in the defect management of
sition of SiC appears the most promising from the
silicon carbide crystals.
perspective of electronic device fabrication, thanks to its
direct-growth process on a semiconductor surface, and the
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