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06-Ccd With 7segment

The document outlines a lab focused on combinational circuit design with a specific emphasis on creating a BCD to 7-segment decoder. It details the design process, including truth table construction, Boolean function simplification, and circuit implementation using Quartus II. Additionally, it includes instructions for a lab report that encompasses both parts of the lab and specifies submission requirements.

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15 views20 pages

06-Ccd With 7segment

The document outlines a lab focused on combinational circuit design with a specific emphasis on creating a BCD to 7-segment decoder. It details the design process, including truth table construction, Boolean function simplification, and circuit implementation using Quartus II. Additionally, it includes instructions for a lab report that encompasses both parts of the lab and specifies submission requirements.

Uploaded by

chiaho950317
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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LOGIC CIRCUIT LAB

Lab 06 – Combinational Circuit Design


with Seven-Segment Display
Isack Farady Ph.D.
Outline
▪ Combinational Circuit Design
▪ A BCD to 7-Segment Decoder Design
▪ Part I: A BCD to 7-Segment Decoder
▪ Part II: 3-bit Characters to 7-Segment Decoder
▪ Lab Report

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Combinational Circuit Design
1. From the specifications of the circuit, determine the
required number of inputs and outputs and assign
symbols to each.
2. Derive the truth table that defines the required
relationship between inputs and outputs.
3. Obtain the simplified Boolean functions for each
output as a function of the input variables.
4. Draw the logic diagram and verify the correctness of
the design.

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A BCD to 7-Segment Decoder
A combinational circuit that converts a decimal digit in BCD to an appropriate
code for the selection of segments in an indicator used to display the decimal
digit in a familiar form. The six invalid combinations should result in a blank
display.

Blank Display

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Design Procedure
I. How many inputs and outputs in this
converter/decoder?
II. Construct a truth table for this decoder.

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III. Using Karnaugh maps, design the BCD-to-seven-segment decoder
using a minimum number of gates.

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IV. Implement the above decoder using two-level form with
AND, OR, NOT gates.

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Part I: A BCD to 7-Segment Decoder
1. A BCD to 7-Segment decoder is designed and
simulated using Quartus II. (Pre-Lab Submission )
A. Construct your logic diagram according to those
assigned output functions on previous page in
Quartus II.
B. Waveform Simulation
a. Use 10ns as one-bit period
b. The input waveforms cover decimal 0 to 9 in BCD codes.
c. Make sure your simulated outputs are correct
d. Submit the required captured screens via the Course web.

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2. Demo on DE1 board
A. Assign the four inputs (A, B, C, D) to switches on DE1
board.
B. Assign the seven outputs (a, b, c, d, e, f, g) to the
assigned 7-segment display on DE1.
a. Refer to 4.3 Using the 7-segments document
b. The 7-Segment is common anode. Pay attention to how to
light a segment.
C. Able to display the decimal 0 to 9 correctly. Note that
those six extra inputs should show a blank display.
3. After you finish the Step 2, raise your hand and
wait for TA to check your results. At the same
time, you can work on Part II.

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Part II: 3-bit Characters to 7-Segment Decoder
As a digital circuit design engineer, you are required to design a driver
circuit (驅動電路) that can show the selected characters on a 7 segment
display with three-bit input.
1. Please follow the 4-steps design procedure to design your assigned
characters. Note that all the design details HAVE to show up in your
Lab report.

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❑ Determine the required number of inputs and outputs and assign
symbols to each output.
❑ Derive the truth table
❑ Obtain the simplified Boolean functions for each output
❑ Draw the logic diagram
◦ Check if you have enough AND、OR、NOT gates to implement your
circuit
◦ If you don’t have enough AND、 OR、NOT gates, please change your
output Boolean functions to match your number of ICs.
◦ Common Circuit (共同電路)
◦ Use of XOR (使用XOR)
◦ Replace AND with OR and NOT or OR with AND and NOT (以AND與NOT取代OR, 或是
以OR與NOT取代AND)
◦ Draw you final circuit or use Quartus II to verify your result.

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2. Construct your final circuit on the larger breadboard (大麵包板) and
able to show the correct characters on your 7-segment display with
corresponding input : (000) to (111).

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Class A

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Class B

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Note on Seven-Segment Display (七段顯示器)

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Lab Report
❑ Follow the report template on the course website to write your
report.
❑ For this Lab including the Part I and Part II, the following items
are required
❖ Part I:A BCD to 7-Segment Decoder Design
o The circuit diagram and correct simulated waveform in Quartus II.
o The pictures of the demo on DE1 board.
❖ Part II: 3-bit Characters to 7-Segment Decoder
◦ List your assigned characters followed by your design procedure.
◦ The detail of the FOUR-Step design procedure. (Include the final circuit on p.15)
◦ 大實作麵包板照片、各種輸入的正確結果照片。

❑ Other requirements stated in the template. (其他範本中的要


求項目)
❑ Due day
❖One week after the Lab

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