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Stability Analysis

The document provides a comprehensive guide on loop stability analysis and differential opamp simulation, detailing methods such as Spectre STB analysis and the use of CMDM probes for differential analysis. It includes simulation setups, transient response tests, and Bode plot configurations for both single-ended and fully differential opamps. Additionally, it emphasizes the importance of DC analysis for debugging and offers insights into PSTB analysis for sampled circuits.

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yangzhaolin2000
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43 views44 pages

Stability Analysis

The document provides a comprehensive guide on loop stability analysis and differential opamp simulation, detailing methods such as Spectre STB analysis and the use of CMDM probes for differential analysis. It includes simulation setups, transient response tests, and Bode plot configurations for both single-ended and fully differential opamps. Additionally, it emphasizes the importance of DC analysis for debugging and offers insights into PSTB analysis for sampled circuits.

Uploaded by

yangzhaolin2000
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Department of Electrical and Computer Engineering

Loop Stability Analysis


Differential Opamp Simulation

Vishal Saxena & Zhu Kehan


Boise State University
([email protected])

© Vishal Saxena -1-


Spectre STB Analysis
 The STB analysis linearizes the circuit about the DC operating point
and computes the loop-gain, gain and phase margins (if the sweep
variable is frequency), for a feedback loop or a gain device [1].
 Refer to the Spectre Simulation Refrence [1] and [2] for details.
 Uses return ratio analysis method to calculate loop-gain and phase
margin ([3, 4]).

© Vishal Saxena -2-


Example Single-ended Opamp Schematic

© Vishal Saxena -3-


STB Analysis Test Bench

 Pay attention to the iprobe component (from analogLib)


 Acts as a short for DC, but breaks the loop in stb analysis
 Place the probe at a point where it completely breaks (all) the loops.

© Vishal Saxena -4-


DC Annotation

• Annotating the node voltages and DC operating points of the


devices helps debug the design
• Check device gds to see if its in triode or saturation regions

© Vishal Saxena -5-


Simulation Setup

 Always have dc analysis on for debugging purpose

© Vishal Saxena -6-


Bode Plot Setup

 Results →Direct Plot →Main Form

© Vishal Saxena -7-


Loop Response Bode Plots

 Here, fun=152.5 MHz, PM=41.8º


 Try to use the stb analysis while the circuit is in the desired feedback
configuration
• Break the loop with realistic DC operating points

© Vishal Saxena -8-


Transient Step Response Test Bench

 Transient step-response verifies the closed-loop stability


 Use small as wells as large steps for characterization
 iprobe acts as a short (can remove it from transient sims)

© Vishal Saxena -9-


Small Step Response

 Observe the ringing (PM was 41º)


 Compensate more!
 Correlate small-step response with the open-loop frequency response
for your understanding.

© Vishal Saxena -10-


Large Step Response

 Use large steps for large signal response


 Not captured by the small-signal analysis
 Note the slewing in the output here

© Vishal Saxena -11-


Fully-Differential Opamp
Simulation
Continuous-time CMFB

© Vishal Saxena -12-


CMDM Probe

 Located in library: AnalogLib→cmdmprobe


 Variable CMDM =
 -1 measures differential mode response
 +1 measures common mode response
 In IC615, diffstbprobe is available which handles unbalanced
differential circuits better than the cmdmprobe.
 More information on the differential probes and the STB analysis
algorithm can be found in [4].

© Vishal Saxena -13-


Fully Differential Circuit Analysis
 Use CMDM probe for differential analysis [1, 3]
 Placement of the CMDM probe should break the differential as well
the common-mode loops.

© Vishal Saxena -14-


Fully Differential Circuit Analysis Method1
 For internal loops, isolate those loops individually and perform STB
analysis
 Ensure overall DC feedback for accurate biasing and that all loops are
compensated
 CMDM1 measures only the first-stage CM response
 CMDM2 measures overall DM response and second-stage CM response

© Vishal Saxena -15-


Fully Differential Circuit Analysis Method2
 cmdmprobes placed outside DM loop, only in CMFB loops
 CMDM1 measures only the first-stage CM response
 CMDM2 measures only the second-stage CM response
 But need another CMDM probe to measure DM loop stability
 Results match with iprobe results very well.

© Vishal Saxena -16-


Fully Differential Opamp Schematic

 Two-stage fully differential opamp


 Class AB output stage for large voltage swing
 With individual CMFB.
 1st stage CMFB compensated

© Vishal
© Vishal Saxena Saxena Acharya
and Venkatesh -17-
17
STB Analysis Using Method 1

 Be noted that the nulling resistors should be connected before the


inputs of cmdmprobe in the 1st CMFB loop, or it will generate
incorrect results.

© Vishal
© Vishal Saxena Saxena Acharya
and Venkatesh -18-
18
STB Analysis Using Method 2

 Need one extra cmdmprobe to measure DM loop comparing to


method 1.

© Vishal
© Vishal Saxena Saxena Acharya
and Venkatesh -19-
19
DM Loop Bode Plots M1&M2

 Differential Mode loop gain and phase margin plots


 Same results obtained by using Method 1 and Method 2

© Vishal Saxena -20-


1st Stage CMFB Loop Bode Plots

Method 1 Method 2

© Vishal Saxena -21-


2nd Stage CMFB Loop Bode Plots

Method 1 Method 2

© Vishal Saxena -22-


Simulation Setup

 Use previous oppt (operating point) in the stb analysis

© Vishal Saxena -23-


Bode Plot Setup

 Results → Direct Plot → Main Form

© Vishal Saxena -24-


DM Transient

 Unity- gain inverting amplifier transient response with a 200mV


differential step (rise/fall time=0.1ns, pulse with=100ns)

© Vishal Saxena -25-


CM Transient

 Unity- gain inverting amplifier transient response with a 100mV


common mode step (rise/fall time=0.1ns, pulse with=100ns)

© Vishal Saxena -26-


Fully-Differential Opamp
Simulation
Switched-capacitor CMFB

© Vishal Saxena -27-


Switched Capacitor CMFB Simulation

 2-stage Class AB output Opamp


 Individual SC-CMFB

© Vishal Saxena -28-


PSTB Analysis Using Method 1

 PSTB analysis is essential for sampled circuit

© Vishal
© Vishal Saxena Saxena Acharya
and Venkatesh -29-
29
Simulation Setup---PSS

 We can only set the number of harmonics to 0 by choosing Shooting


method
 tstab parameter can be obtained by tran analysis first
© Vishal Saxena -30-
PSS Accuracy suggestions

 Go to Simulation Options Analog Main in the ADE window to


setup tolerance options accordingly. If the frequency of periodic small
signal analyses followed by PSS is high (e.g. 1G), the maxacfreq
parameter (optionsaccuracy) of the PSS can be used to specify the
highest frequency, otherwise, the frequency analysis in PAC maybe
truncated.
© Vishal Saxena -31-
PSS Time Plot

 Results → Direct Plot → Main Form


 X-axis scale range is 1/sampling clock frequency

© Vishal Saxena -32-


PSTB Setup

 PSTB is always followed by PSS

© Vishal Saxena -33-


PSTB Plot

 Results → Direct Plot → Main Form

© Vishal Saxena -34-


DM Loop Bode Plots

Resistive feedback Capacitive feedback

© Vishal Saxena -35-


1st Stage CMFB Loop Bode Plots

Resistive feedback Capacitive feedback

© Vishal Saxena -36-


2nd Stage CMFB Loop Bode Plots

Resistive feedback Capacitive feedback

© Vishal Saxena -37-


Summary of pstb analysis

© Vishal
© Vishal Saxena Saxena Acharya
and Venkatesh -38-
38
Resistive Feedback DM Transient

 Unity- gain inverting amplifier transient response with a 200mV


differential step (rise/fall time=0.1ns, pulse with=200ns)

© Vishal Saxena -39-


Resistive Feedback CM Transient

 Unity- gain inverting amplifier transient response with a 100mV


common mode step (rise/fall time=0.1ns, pulse with=200ns)

© Vishal Saxena -40-


Sample-Hold Configuration

 Ideal switches with on resistance of 1kΩ

© Vishal Saxena -41-


Sample-Hold Transient Response

 DM and CM outputs waveforms when fin=1/4 MHz, fs=5MHz

© Vishal Saxena -42-


Sample-Hold Transient Response

 DM and CM outputs waveforms when fin=11/4 MHz, fs=5MHz

© Vishal Saxena -43-


References
[1] Spectre User Simulation Guide, pages 160-165
[2] M. Tian, V. Viswanathan, J. Hangtan, K. Kundert, “Striving for Small-Signal
Stability: Loop-based and Device-based Algorithms for Stability Analysis of Linear
Analog Circuits in the Frequency Domain,” Circuits and Devices, Jan 2001.
[3] P. R. Gray, P. J. Hurst, S. H. Lewis, R. G. Meyer, “Analog and Design of Analog
Integrated Circuits,” 4th Ed., Wiley, 2010.
[4] F. Wiedmann, “Loop gain simulation,” Online:
https://sites.google.com/site/frankwiedmann/loopgain

© Vishal Saxena -44-

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