Carnegie Mellon

Machine-Level Programming I: Basics

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 1

 Carnegie Mellon

Today: Machine Programming I: Basics

 History of Intel processors and architectures
 C, assembly, machine code
 Assembly Basics: Registers, operands, move
 Arithmetic & logical operations

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 2

 Carnegie Mellon

Intel x86 Processors

 x86 is a family of instruction set architectures initially developed
by Intel based on the Intel 8086 microprocessor and its 8088
variant.
 The 8086 was introduced in 1978 as a fully 16-bit extension of
Intel's 8-bit 8080 microprocessor, with memory segmentation as
a solution for addressing more memory than can be covered by a
plain 16-bit address.
 The term "x86" came into being because the names of several
successors to Intel's 8086 processor end in "86", including the
80186, 80286, 80386 and 80486 processors.
 Dominate laptop/desktop/server market

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 3

 Carnegie Mellon

Intel x86 Processors

 Evolutionary design
▪ Backwards compatible up until 8086, introduced in 1978
▪ Added more features as time goes on

 Complex instruction set computer (CISC)

▪ Many different instructions with many different formats
But, only small subset encountered with Linux programs
▪
▪ Hard to match performance of Reduced Instruction Set Computers
(RISC)
▪ But, Intel has done just that!
▪ In terms of speed. Less so for low power.

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 4

 Carnegie Mellon

Intel x86 Evolution: Milestones

Name Date Transistors MHz
 8086 1978 29K 5-10
▪ First 16-bit Intel processor. Basis for IBM PC & DOS
▪ 1MB address space
 386 1985 275K 16-33
▪ First 32 bit Intel processor , referred to as IA32
▪ Added “flat addressing”, capable of running Unix
 Pentium 4E 2004 125M 2800-3800
▪ First 64-bit Intel x86 processor, referred to as x86-64
 Core 2 2006 291M 1060-3500
▪ First multi-core Intel processor
 Core i7 2008 731M 1700-3900
▪ Four cores (our shark machines)
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 5
 Carnegie Mellon

 Moore’s Law: In 1965, Gordon Moore, a founder of Intel Corporation,

extrapolated from the chip technology of the day, in which they could
fabricate circuits with around 64 transistors on a single chip, to predict
that the number of transistors per chip would double every year for the
next 10 years. Over more than 45 years, the semiconductor industry has
been able to double transistor counts on average every 18 months.

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 6

 Carnegie Mellon

x86 Clones: Advanced Micro Devices

(AMD)
 Historically
▪ AMD has followed just behind Intel
▪ A little bit slower, a lot cheaper
 Then
▪ Recruited top circuit designers from Digital Equipment Corp. and
other downward trending companies
▪ Built Opteron: tough competitor to Pentium 4
▪ Developed x86-64, their own extension to 64 bits
 Recent Years
Update!!!
▪ Intel got its act together The scenario has
Leads the world in semiconductor technology
▪ changed yet again
▪ AMD has fallen behind
▪ Relies on external semiconductor manufacturer

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 7

 Carnegie Mellon

Our Primary Focus

 The processor (CPU)…

▪ datapath
▪ control
 …implemented using millions of transistors
 …impossible to understand by looking at individual
transistors
 we need...

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 8

 Carnegie Mellon

High-level swap(int v[], int k)

Abstraction language
program
(in C)
{int temp;
temp = v[k];
v[k] = v[k+1];
v[k+1] = temp;
}

 Delving into the depths reveals

C compiler
more information, but…
 An abstraction omits “unneeded”
Assembly swap:
detail, helps us cope with complexity language muli $2, $5,4
program add $2, $4,$2
(for MIPS) lw $15, 0($2)
lw $16, 4($2)
sw $16, 0($2)
sw $15, 4($2)
 From the figure on the right, how jr $31

does abstraction help the programmer

and how does she avoid too much
Assembler
detail?
Binary machine 00000000101000010000000000011000
language 00000000100011100001100000100001
program 10001100011000100000000000000000
(for MIPS) 10001100111100100000000000000100
10101100111100100000000000000000
10101100011000100000000000000100
00000011111000000000000000001000
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 9
 Carnegie Mellon

The Instruction Set:

a Critical Interface

software

instruction set

hardware

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 10

 Carnegie Mellon

Instruction Set Architecture

 A very important abstraction:
▪ interface between hardware and low-level
software
▪ standardizes instructions, machine language bit
patterns, etc.
▪ advantage: allows different implementations of
the same architecture
 Modern instruction set architectures:
▪ x86, IA32, Itanium, x86-64/Pentium/K6, PowerPC,
DEC Alpha, MIPS, SPARC, HP, ARM
Microarchitecture: Implementation of the architecture.
Examples: cache sizes and core frequency.
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 11
 Carnegie Mellon

Assembly/Machine Code View

CPU Memory
Addresses
Registers
Data Code
PC Data
Condition Instructions Stack
Codes

Programmer-Visible State
▪ PC: Program counter ▪ Memory
▪ Address of next instruction ▪ Byte addressable array
▪ Called %rip - “RIP” (x86-64)
▪ Code and user data
▪ Register file ▪ Stack to support procedures
▪ Heavily used program data 16 x 64 bits ▪ No distinguishing between
▪ Condition codes different datatypes, int,
▪ Store status information about most pointers, arrays etc.
recent arithmetic or logical operation
▪ Used for conditional branching

▪ Vector registers 12
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition
 Carnegie Mellon

Turning C into Object Code

▪ Code in files p1.c p2.c
▪ Compile with command: gcc –Og p1.c p2.c -o p
▪ Use basic optimizations (-Og) [New to recent versions of GCC]
▪ Put resulting binary in file p

text C program (p1.c p2.c)

Compiler (gcc –Og -S)

text Asm program (p1.s p2.s)

Assembler (gcc or as)

binary Object program (p1.o p2.o) Static libraries

(.a)
Linker (gcc or ld)

binary Executable program (p)

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 13

 Carnegie Mellon

Compiling Into Assembly

C Code (sum.c) Generated x86-64 Assembly
long plus(long x, long y); sumstore:
pushq %rbx
void sumstore(long x, long y, movq %rdx, %rbx
long *dest) call plus
{ movq %rax, (%rbx)
long t = plus(x, y); popq %rbx
*dest = t; ret
}
Obtain with command
gcc –Og –S sum.c
Produces file sum.s
Warning: Will get very different results on different
machines (Andrew Linux, Mac OS-X, …) due to different
versions of gcc and different compiler settings.
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 14
 Carnegie Mellon

Object Code
Code for sumstore
 Assembler
0x0400595:
0x53
▪ Translates .s into .o
0x48 ▪ Binary encoding of each instruction
0x89 ▪ Nearly-complete image of executable code
0xd3
0xe8
▪ Missing linkages between code in different
0xf2 files
0xff  Linker
0xff
0xff ▪ Resolves references between files
• Total of 14 bytes
0x48 ▪ Combines with static run-time libraries
0x89 • Each instruction
E.g., code for malloc, printf
▪
0x03 1, 3, or 5 bytes
0x5b • Starts at address
▪ Some libraries are dynamically linked
0xc3 0x0400595 ▪ Linking occurs when program begins
execution

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 15

 Carnegie Mellon

Machine Instruction Example

 C Code
*dest = t;
▪ Store value t where designated by
dest
 Assembly
movq %rax, (%rbx)
▪ Move 8-byte value to memory
▪Quad words in x86-64 parlance
▪ Operands:
t: Register %rax
dest: Register %rbx
*dest: Memory M[%rbx]
 Object Code
0x40059e: 48 89 03
▪ 3-byte instruction
▪ Stored at address 0x40059e

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 16

 Carnegie Mellon

Disassembling Object Code

Disassembled
0000000000400595 <sumstore>:
400595: 53 push %rbx
400596: 48 89 d3 mov %rdx,%rbx
400599: e8 f2 ff ff ff callq 400590 <plus>
40059e: 48 89 03 mov %rax,(%rbx)
4005a1: 5b pop %rbx
4005a2: c3 retq

 Disassembler
objdump –d sum
▪ Useful tool for examining object code
▪ Analyzes bit pattern of series of instructions
▪ Produces approximate rendition of assembly code
▪ Can be run on either a.out (complete executable) or .o file
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 17
 Carnegie Mellon

Alternate Disassembly
Disassembled
Object
0x0400595:
0x53 Dump of assembler code for function sumstore:
0x48 0x0000000000400595 <+0>: push %rbx
0x89 0x0000000000400596 <+1>: mov %rdx,%rbx
0xd3 0x0000000000400599 <+4>: callq 0x400590 <plus>
0xe8 0x000000000040059e <+9>: mov %rax,(%rbx)
0xf2 0x00000000004005a1 <+12>:pop %rbx
0xff 0x00000000004005a2 <+13>:retq
0xff
0xff
0x48  Within gdb Debugger
0x89 gdb sum
0x03
0x5b disassemble sumstore
0xc3 ▪ Disassemble procedure
x/14xb sumstore
▪ Examine the 14 bytes starting at sumstore
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 18
 Carnegie Mellon

What Can be Disassembled?

% objdump -d WINWORD.EXE

WINWORD.EXE: file format pei-i386

No symbols in "WINWORD.EXE".
Disassembly of section .text:

30001000 <.text>:
30001000: 55 push %ebp
30001001: 8b ec mov %esp,%ebp
30001003: 6a ffReverse engineering
push forbidden by
$0xffffffff
30001005: 68Microsoft
90 10 00 End User License
30 push Agreement
$0x30001090
3000100a: 68 91 dc 4c 30 push $0x304cdc91

 Anything that can be interpreted as executable code

 Disassembler examines bytes and reconstructs assembly source
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 19
 Carnegie Mellon

Today: Machine Programming I: Basics

 History of Intel processors and architectures
 C, assembly, machine code
 Assembly Basics: Registers, operands, move
 Arithmetic & logical operations

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 20

 Carnegie Mellon

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 21

 Carnegie Mellon

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 22

 Carnegie Mellon

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 23

 Carnegie Mellon

Operand Specifiers – Addressing Modes

 Most instructions have one or more operands specifying the source values to
use
 Operand types: Immediate, Register, Memory

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 24

 Carnegie Mellon

Example

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 25

 Carnegie Mellon

Example

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 26

 Carnegie Mellon

Moving Data %rax

 Moving Data %rcx
movq Source, Dest: %rdx
 Operand Types %rbx
▪ Immediate: Constant integer data %rsi
Example: $0x400, $-533
▪ %rdi
▪ Like C constant, but prefixed with ‘$’
%rsp
▪ Encoded with 1, 2, or 4 bytes
▪ Register: One of 16 integer registers
%rbp
▪ Example: %rax, %r13
%rN
▪ But %rsp reserved for special use
▪ Others have special uses for particular instructions
▪ Memory: 8 consecutive bytes of memory at address given by register
▪ Simplest example: (%rax)
▪ Various other “address modes”
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 27
 Carnegie Mellon

movq Operand Combinations

Source Dest Src,Dest C Analog

Reg movq $0x4,%rax temp = 0x4;

Imm
Mem movq $-147,(%rax) *p = -147;

movq Reg movq %rax,%rdx temp2 = temp1;

Reg
Mem movq %rax,(%rdx) *p = temp;

Mem Reg movq (%rax),%rdx temp = *p;

Cannot do memory-memory transfer with a single instruction

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 28
 Carnegie Mellon

 For most cases, the mov instructions will only update the specific
register bytes or memory locations indicated by the destination operand.

 The only exception is that when movl has a register as the

destination, it will also set the high-order 4 bytes of the register to 0.

 This exception arises from the convention, adopted in x86-64, that any
instruction that generates a 32-bit value for a register also sets the high-
order portion of the register to 0.

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 29

 Carnegie Mellon

This instruction is for dealing with 64-bit immediate data.

The regular movq instruction can only have immediate source operands
that can be represented as 32-bit two’s-complement numbers. This value is then
sign extended to produce the 64-bit value for the destination.

The movabsq instruction can have an arbitrary 64-bit immediate value as its source
operand and can only have a register as a destination.

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 30

 Carnegie Mellon

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 31

 Carnegie Mellon

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 32

 Carnegie Mellon

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 33

 Carnegie Mellon

Practice Problem

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 34

 Carnegie Mellon

Practice Problem

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 35

 Carnegie Mellon

Example

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 37

 Carnegie Mellon

Example

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 38

 Carnegie Mellon

Pushing and Popping Stack Data

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 39

 Carnegie Mellon

Example of Simple Addressing Modes

swap:
movq (%rdi), %rax
movq (%rsi), %rdx
movq %rdx, (%rdi)
movq %rax, (%rsi)
ret

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 40

 Carnegie Mellon

Example of Simple Addressing Modes

void swap
(long *xp, long *yp)
{ swap:
long t0 = *xp; movq (%rdi), %rax
long t1 = *yp; movq (%rsi), %rdx
*xp = t1; movq %rdx, (%rdi)
*yp = t0; movq %rax, (%rsi)
} ret

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 41

 Carnegie Mellon

Understanding Swap()
Memory
void swap Registers
(long *xp, long *yp)
{ %rdi
long t0 = *xp;
%rsi
long t1 = *yp;
*xp = t1; %rax
*yp = t0;
} %rdx

Register Value
%rdi xp
%rsi yp swap:
%rax t0 movq (%rdi), %rax # t0 = *xp
%rdx t1 movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 42
 Carnegie Mellon

Understanding Swap()
Memory
Registers Address
123 0x120
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 0x108
%rdx 456 0x100

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 43

 Carnegie Mellon

Understanding Swap()
Memory
Registers Address
123 0x120
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123 0x108
%rdx 456 0x100

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 44

 Carnegie Mellon

Understanding Swap()
Memory
Registers Address
123 0x120
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123 0x108
%rdx 456 456 0x100

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 45

 Carnegie Mellon

Understanding Swap()
Memory
Registers Address
456 0x120
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123 0x108
%rdx 456 456 0x100

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 46

 Carnegie Mellon

Understanding Swap()
Memory
Registers Address
456 0x120
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123 0x108
%rdx 456 123 0x100

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 47

 Carnegie Mellon

Today: Machine Programming I: Basics

 History of Intel processors and architectures
 C, assembly, machine code
 Assembly Basics: Registers, operands, move
 Arithmetic & logical operations

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 48

 Carnegie Mellon

Address Computation Instruction

 leaq Src, Dst
▪ Src is address mode expression
▪ Set Dst (must be a register) to address (Effective address) denoted
by expression
leaq S,D //D← &S; Load effective address
 Uses
▪ Computing addresses without a memory reference
E.g., translation of p = &x[i];
▪
▪ Computing arithmetic expressions of the form x + k*y
▪ k = 1, 2, 4, or 8 Compilers often find clever uses of leaq that
have nothing to do with effective address

long Example
m12(long x) computations. The destination operand must
{ be a register.
return x*12; Converted to ASM by compiler:
}
leaq (%rdi,%rdi,2), %rax # t <- x+x*2
salq $2, %rax # return t<<2

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 49

 Carnegie Mellon
Carnegie Mellon

Some Arithmetic Operations

 One Operand Instructions
incq Dest Dest = Dest + 1
decq Dest Dest = Dest − 1
negq Dest Dest = − Dest
notq Dest Dest = ~Dest

 See book for more instructions

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 50

 Carnegie Mellon
Carnegie Mellon

Some Arithmetic Operations

 Two Operand Instructions:
Format Computation
addq Src,Dest Dest = Dest + Src
subq Src,Dest Dest = Dest − Src
imulq Src,Dest Dest = Dest * Src
salq Src,Dest Dest = Dest << Src Also called shlq
sarq Src,Dest Dest = Dest >> Src Arithmetic
shrq Src,Dest Dest = Dest >> Src Logical
xorq Src,Dest Dest = Dest ^ Src
andq Src,Dest Dest = Dest & Src
orq Src,Dest Dest = Dest | Src
 Watch out for argument order!
 No distinction between signed and unsigned int (why?)
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 51
 Carnegie Mellon

Shift
Both arithmetic and logical right shifts are
possible. The different shift instructions can specify the shift amount either as
an immediate value or with the single-byte register %cl. (These instructions are
unusual in only allowing this specific register as the operand.)

With x86-64, a shift instruction operating on data values that are

w bits long determines the shift amount from the low-order m bits of register
%cl, where 2m = w. The higher-order bits are ignored. So, for example, when
register %cl has hexadecimal value 0xFF, then instruction salb would shift by
7, while salw would shift by 15, sall would shift by 31, and salq would shift
by 63.

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 52

 Carnegie Mellon

Arithmetic Expression Example

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 53

 Carnegie Mellon

Special Arithmetic Operations

Multiplying two 64-bit signed or unsigned integers can yield a product that requires
128 bits to represent. The x86-64 instruction set provides limited support for
operations involving 128-bit (16-byte) numbers.

The imulq instruction has two different forms One form, serves as a “two operand”
multiply instruction, generating a 64-bit product from two 64-bit operands. The
other version is given below:

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 54

 Carnegie Mellon

Why separate instructions for signed

multiplication and division?

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 55

 Carnegie Mellon

Machine Programming I: Summary

 History of Intel processors and architectures
▪ Evolutionary design leads to many quirks and artifacts
 C, assembly, machine code
▪ New forms of visible state: program counter, registers, ...
▪ Compiler must transform statements, expressions, procedures into
low-level instruction sequences
 Assembly Basics: Registers, operands, move
▪ The x86-64 move instructions cover wide range of data movement
forms
 Arithmetic
▪ C compiler will figure out different instruction combinations to
carry out computation

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 56