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Latch

This document discusses synchronous sequential logic, focusing on storage elements such as latches and flip-flops, and their analysis and design. It differentiates between synchronous and asynchronous sequential circuits, explaining their behaviors and the role of storage elements. Additionally, it covers the operation of SR latches, triggering mechanisms of flip-flops, and the process of converting between different types of flip-flops.

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Milon Khan
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16 views3 pages

Latch

This document discusses synchronous sequential logic, focusing on storage elements such as latches and flip-flops, and their analysis and design. It differentiates between synchronous and asynchronous sequential circuits, explaining their behaviors and the role of storage elements. Additionally, it covers the operation of SR latches, triggering mechanisms of flip-flops, and the process of converting between different types of flip-flops.

Uploaded by

Milon Khan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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UNIT III

SYNCHRONOUS SEQUENTIAL LOGIC

Sequential Circuits - Storage Elements: Latches , Flip-Flops - Analysis of Clocked Sequential Circuits - State
Reduction and Assignment - Design Procedure - Registers and Counters - HDL Models of Sequential
Circuits

SEQUENTIAL CIRCUITS
Sequential circuits:
➢ Sequential circuits employ storage elements in addition to logic gates. Their outputs are a function of
the inputs and the state of the storage elements.
➢ Because the state of the storage elements is a function of previous inputs, the outputs of a sequential
circuit depend not only on present values of inputs, but also on past inputs, and the circuit behavior
must be specified by a time sequence of inputs and internal states.

Types of sequential circuits:


There are two main types of sequential circuits, and their classification is a function ofthe timing
of their signals.
1. Synchronous sequential circuit:
It is a system whose behaviorcan be defined from the knowledge of its signals at discrete
instants of time.
2. Asynchronous sequential circuits:
The behaviorof an asynchronous sequential circuit depends upon the input signals at any
instant of timeand the order in which the inputs change. The storage elements commonly used
in asynchronoussequential circuits are time-delay devices.

LATCHES AND FLIP FLOPS


Flip-Flop:
➢ The storage elements (memory) used in clocked sequential circuits are called flipflops. A flip-flop is
a binary storage device capable of storing one bit of information. In a stable state, the output of a flip-
flop is either 0 or 1.
➢ A sequential circuit may use many flip-flops to store as many bits as necessary. The block diagram of
a synchronous clocked sequential circuit is shown in Fig.

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➢ A storage element in a digital circuit can maintain a binary state indefinitely (as long as power is
delivered to the circuit), until directed by an input signal to switch states.
➢ The major differences among various types of storage elements are in the number of inputs they
possess and in the manner in which the inputs affect the binary state.
Latch:
➢ The storage elements that operate with signal levels (rather than signal transitions) are referred to as
latches; those controlled by a clock transition are flip-flops.Latches are said to be level sensitive
devices; flip-flops are edge-sensitive devices.

SR Latch: Using NOR gate

Realize SR Latch using NOR and NAND gates and explain its operation.
➢ The SR latch is a circuit with two cross-coupled NOR gates or two cross-coupled NAND gates, and
two inputs labeled S for set and R for reset.
➢ The SR latch constructed with two cross-coupled NOR gates is shown in Fig.

➢ The latch has two useful states. When output Q = 1 and Q’= 0, the latch is said to be in the set state .
When Q = 0 and Q’ = 1, it is in the reset state . Outputs Q and Q’ are normally the complement of
each other.
➢ However, when both inputs are equal to 1 at the same time, a condition in which both outputs are
equal to 0 (rather than be mutually complementary) occurs.
➢ If both inputs are then switched to 0 simultaneously, the device will enter an unpredictable or
undefined state or a metastable state. Consequently, in practical applications, setting both inputs to 1
is forbidden.

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FLIP FLOPS
Triggering of Flip Flops:
Explain about triggering of flip flops in detail.
➢ The state of a latch or flip-flop is switched by a change in the control input. This momentary change
is called a trigger, and the transition it causes is said to trigger the flip-flop.

Level Triggering:
➢ SR, D, JK and T latches are having enable input.
➢ Latches are controlled by enable signal, and they are level triggered, either positive level triggered or
negative level triggered as shown in figure (a).
➢ The output is free to change according to the input values, when active level is maintained at the
enable input.

Edge Triggering:
➢ A clock pulse goes through two transitions: from 0 to 1 and the return from 1 to 0.
➢ As shown in above Fig (b) and (c)., the positive transition is defined as the positive edge and the
negative transition as the negative edge.

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Explain the operation of flipflops.(Nov 2017)

FLIP FLOP CONVERSIONS

The purpose is to convert a given type A FF to a desired type B FF using some conversion logic.

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