Lecture Note 3
Lecture Note 3
Gate-Level Minimization
3:1
Introduction
Introduction
• Gate-level minimization is the design task of finding an optimal
gate-level implementation of the Boolean functions describing a
digital circuit.
Figure 3.4 Map for Example 3.1, F(x, y, z) = Σ(2, 3, 4, 5) = x'y + xy'
Examples
• Example 3.2: simplify F(x, y, z) = S(3, 4, 6, 7)
• F(x, y, z) = S(3, 4, 6, 7) = yz+ xz'
Figure 3.6 Map for Example 3-3, F(x, y, z) = Σ(0, 2, 4, 5, 6) = z' +xy'
Examples
• Example 3.4: let F = A'C + A'B + AB'C + BC
a) Express it in sum of minterms.
b) Find the minimal sum of products expression.
Ans:
F(A, B, C) = S(1, 2, 3, 5, 7) = C + A'B