Data Structures and Operations

1) Define a binary search tree (BST) and explain its key properties.
2)Explain the difference between a binary tree and a binary search tree (BST). Provide an example of
each.
3)Discuss the advantages and disadvantages of a singly linked list compared to an array. Provide
specific examples for each.
4)Explain the concept of enqueue and dequeue operations in a queue.
5)#define f(a,b) a+b
#define g(a,b)a*b
main()
{
int m;
m=2*f(3,g(4,5));
printf("\n m is %d", m);
}
What is the value of m?

6)How many different types of trees that can be realized are with six nodes?
7)Consider the following C declaration
struct {
short s [5]
union{
float y;
long z;
}u;
}t;
What is the memory requirement for variable t?
8)Find the maximum number of binary trees that can be formed with three unlabeled nodes.
9)Suppose the numbers 7, 5, 1, 8, 3, 6, 0, 9, 4, 2 are inserted in that order into an initially empty
binary search tree. The binary search tree uses
the usual ordering on natural numbers. What is the inorder traversal sequence of the resultant
tree?
10)Find the number of pointers affected for an insertion operation in a doubly linked list.

answer in details

Sure! Here's a detailed explanation and answer for each of the 10 questions:

1) Define a Binary Search Tree (BST) and Explain Its Key Properties

A Binary Search Tree (BST) is a binary tree in which each node has a key, and satisfies the following
properties:

The left subtree of a node contains only nodes with keys less than the node’s key.

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 The right subtree of a node contains only nodes with keys greater than the node’s key.
Both left and right subtrees must also be binary search trees.

Key properties:

Searching, insertion, and deletion operations have an average time complexity of O(log n) in a
balanced BST.
In-order traversal of a BST gives the sorted order of elements.

2) Difference Between a Binary Tree and a Binary Search Tree (BST)

Aspect Binary Tree Binary Search Tree (BST)

Structure Each node has at most two children Each node has at most two children

Order No ordering rule for node values Left < Root < Right

Purpose Used for hierarchical data Used for fast search, insertion, and deletion

Example

Binary Tree Example:

markdown

` 5
/ \
3 8
/ \
1 6
`

BST Example:

markdown

` 5
/ \
3 8
/ \
1 9
`

3) Singly Linked List vs Array – Advantages and Disadvantages

Feature Singly Linked List Array

Memory allocation Dynamic Static (fixed size)

Insertion/Deletion Efficient (O(1) if position known) Costly (O(n) due to shifting)

Random Access Not allowed (O(n)) Allowed (O(1))
Memory usage Extra space for pointers Compact

Example use-case Dynamic memory scenarios like queues/stacks Fast indexed access like lookup tables

Example:

Linked list: Better for implementing queues where elements are frequently added/removed.
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 Array: Better for accessing items by index quickly (like an image matrix).

4) Enqueue and Dequeue Operations in a Queue

Queue is a FIFO (First In, First Out) data structure.

Enqueue: Adds an element to the rear of the queue.

Dequeue: Removes an element from the front of the queue.

Example:

text

`Queue: [3, 5, 7]
Enqueue(9) → [3, 5, 7, 9]
Dequeue() → returns 3 → Queue becomes [5, 7, 9]
`

5) C Macro Code Analysis

`#define f(a,b) a+b

#define g(a,b) a*b
main()
{
int m;
m=2*f(3,g(4,5));
printf("\n m is %d", m);
}
`

Macro Expansion:

markdown

`m = 2*f(3, g(4,5))
= 2*3 + g(4,5)
= 2*3 + 4*5 = 6 + 20 = 26
`

But due to macro expansion without parentheses, it becomes:

ini

`m = 2*3 + 4*5 = 6 + 20 = 26
`

Output:

csharp

`m is 26
`

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6) How Many Different Types of Trees Can Be Formed with Six Nodes?

The number of binary trees with `n` unlabeled nodes is given by the Catalan number:

(2n)!
Cn =
(n + 1)!n!
​ ​

For 6 nodes:

(2 ∗ 6)! 12!
C6 = = = 132
(6 + 1)!6! 7!6!
​ ​ ​

Answer: 132 different binary trees.

7) Memory Requirement for Variable `t`

`struct {
short s[5];
union {
float y;
long z;
} u;
} t;
`

`short s[5]` = 5 × 2 bytes = 10 bytes

`union` has either a `float` (4 bytes) or `long` (typically 4 or 8 bytes, assume 4 here)

Union takes max size of its members, so:

`union` size = 4 bytes

Total without alignment = 10 + 4 = 14 bytes

Due to padding/alignment, the actual size may be:

`s[5]` might be padded to 12 bytes

So structure `t` might be padded to 16 bytes

Answer: Likely 16 bytes (depends on architecture, but most commonly aligned to 4 or 8 bytes).

8) Maximum Number of Binary Trees with Three Unlabeled Nodes

Again using Catalan number for `n = 3`:

(2 ∗ 3)! 6! 720 720

C3 = = = = =5
(3 + 1)!3! 4!3! 24 ∗ 6 144
​ ​ ​ ​ ​

Answer: 5 different binary trees.

9) Inorder Traversal of BST after Inserting: 7, 5, 1, 8, 3, 6, 0, 9, 4, 2

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Let's build the tree step by step. Then do an inorder traversal (Left, Root, Right).

Inserting gives BST:

markdown

` 7
/ \
5 8
/ \ \
1 6 9
/ \
0 3
/ \
2 4
`

Inorder Traversal: `0 1 2 3 4 5 6 7 8 9`

10) Number of Pointers Affected in Insertion in Doubly Linked List

Inserting a new node between two nodes affects 4 pointers:

1. `prev` pointer of new node

2. `next` pointer of new node
3. `next` pointer of previous node

4. `prev` pointer of next node

Answer: 4 pointers are updated.

Let me know if you'd like diagrams or code samples for any of these!

11)The function of the given Linked List with the first node as the head is:-
void funx1(struct node* head)
{
if (head == NULL)
return;
funx1 (head -> next) ;
printf (" %d ", head -> data ) ;
}
What is the output?

12)Which algorithms among Insertion Sort, Quick Sort, Heap Sort, and Merge Sort, can be used to
sort a random linked list with minimum time complexity? Explain your answer.
13)How many stacks are needed to implement a queue? Consider the situation where no other data
structure like arrays, linked list is available to you.
14)Consider a direct mapped cache of size 32 KB with block size 32 bytes. The CPU generates 32-bit
addresses. Calculate the number of bits needed for cache indexing and the number of tag bits.
15)How many 32K × 1 RAM chips are needed to provide a memory capacity of 256 K bytes?
16)Point out how DMA can improve I/O speed.
17)Consider a 4-way set-associative cache (initially empty) with total 16 cache blocks. The main
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 memory consists of 256 blocks and the request for memory blocks is in the following order:
0, 255, 1, 4, 3, 8, 133, 159, 216, 129, 63, 8, 48, 32, 73, 92, 155
Which one of the following memory block will NOT be in cache if LRU replacement policy is used?
18)A computer has a 256 KB, 4-way set- associative, write-back data cache with block size of 32
bytes. The processor sends 32-bit addresses to the cache controller. Each cache tag directory entry
contains, in addition to address tag, 2 valid bits, 1 modified bit and 1 replacement bit.
What are the number of bits in the tag field of an address?
19)Illustrate the advantages of virtual memory.
20)Define hit ratio.

answer in details

Sure! Here's a detailed explanation and answer for each of the new questions (11–20):

11) Output of the Recursive Function on a Linked List

`void funx1(struct node* head)

{
if (head == NULL)
return;
funx1(head->next);
printf(" %d ", head->data);
}
`

Explanation:

This function uses recursion to traverse to the end of the list.

Then it prints the data in reverse order (during the "unwinding" phase of recursion).

**So, the output is the linked list's elements in reverse order.

Example:
For a linked list: `1 -> 2 -> 3 -> NULL`
Output: `3 2 1`

12) Best Sorting Algorithm for a Linked List (Among: Insertion, Quick, Heap, Merge)

Answer: Merge Sort is the most suitable for sorting a linked list.

Why?

Merge sort doesn't require random access, which is slow for linked lists.
It works in O(n log n) time and can be implemented using only pointers.

Quick Sort is not preferred for linked lists due to inefficient partitioning.

Heap Sort requires random access like arrays.

Conclusion:
✅ Merge Sort is ideal for linked lists due to its efficiency and pointer-based implementation.
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13) Minimum Number of Stacks Required to Implement a Queue

Answer: 2 stacks are sufficient.

Explanation:

Use two stacks: `stack1` for enqueue and `stack2` for dequeue.

Enqueue: Push to `stack1`.

Dequeue: If `stack2` is empty, move all elements from `stack1` to `stack2` (reverse order), then
pop from `stack2`.

This simulates FIFO behavior using LIFO structures.

14) Cache Indexing and Tag Bits Calculation

Given:

Cache Size = 32 KB = 2¹⁵ bytes

Block size = 32 bytes = 2⁵

CPU address = 32 bits

1. Number of blocks in cache:

215
= 210 = 1024 blocks
2 5
​

2. Index bits = log₂(number of blocks) = 10 bits

3. Offset bits = log₂(block size) = 5 bits

4. Tag bits = 32 - (Index + Offset) = 32 - (10 + 5) = 17 bits

✅ Answer:
Index bits = 10

Tag bits = 17

15) How Many 32K × 1 RAM Chips for 256 KB?

Each RAM chip: 32K × 1 bit = 32K bits = 4 KB (since 8 bits = 1 byte)

We need: 256 KB

256
= 64 chips for 8-bit word
4
​

But the chips are 1-bit wide, so for 1 byte (8 bits), we need 8 chips per 4 KB.

64 × 8 = 512 chips ​

✅ Answer: 512 chips are needed.

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16) How DMA Improves I/O Speed

DMA (Direct Memory Access) allows data transfer between I/O devices and memory without CPU
intervention.

Advantages:

CPU is free to do other tasks while data transfer happens.

Speeds up overall system performance, especially in bulk data transfers like disk I/O or audio/video
streams.

Reduces CPU cycles wasted in I/O operations.

17) Which Memory Block Will NOT Be in Cache (LRU, 4-Way Set Associative, 16
Blocks)?

Given:

Cache size = 16 blocks

4-way set associative → Number of sets = 16 / 4 = 4 sets

Memory blocks = 0 to 255

Mapping: `set_index = block_number % 4`

Use Least Recently Used (LRU) policy.

Let's track each set and its 4 blocks using LRU replacement.

After tracing all accesses:

vbnet

`Set 0 (blocks mod 4 == 0): 0, 4, 8, 216 (evicts 0)

Set 1 (mod 4 == 1): 1, 129
Set 2 (mod 4 == 2): 2
Set 3 (mod 4 == 3): 255, 3, 63, 133 → Later 159 and 155 come (mod 3) → One block will be evicted.
`

So LRU in set 3 causes eviction of block 133 when 155 is added.

✅ Answer: Block 133 will NOT be in cache.
18) Bits in Tag Field (4-way set, 256 KB, 32 B block, 32-bit address)

Given:

Cache size = 256 KB = 2¹⁸ bytes

Block size = 32 B = 2⁵

Number of blocks = 2¹⁸ / 2⁵ = 2¹³ blocks

4-way → sets = 2¹³ / 4 = 2¹¹ sets

Offset bits = 5

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 Index bits (set index) = 11

Tag bits = 32 - (5 + 11) = 16 bits

✅ Answer: 16 tag bits

19) Advantages of Virtual Memory

Virtual memory allows a program to use more memory than physically available by using disk space as
a backup.

Advantages:

1. Process Isolation: Each process has its own virtual address space.
2. Efficient Memory Use: Only needed portions of programs are loaded into RAM (paging).

3. Larger Address Space: Programs can use more memory than physically installed.

4. Multitasking: Multiple processes can run without memory conflicts.

5. Security: Prevents one program from accessing another’s memory.

20) Define Hit Ratio

Hit ratio is the ratio of memory accesses that are found in the cache.

Number of Cache Hits

Hit Ratio =
Total Memory Accesses
​

Example: If out of 1000 memory accesses, 900 were cache hits:

900
Hit Ratio = = 0.9 or 90%
1000
​

✅ Higher hit ratio = better cache performance.

Let me know if you'd like diagrams or visual explanations for any of these!

21)A computer has 1GB of memory. Each word in the computer is 32 bits. How many bits are
needed to address any single word in the memory?
22)Illustrate memory hierarchy with example.
23)What are the operations of page replacement algorithm?
24)Consider a direct mapped cache of size 16 KB with block size 256 bytes. The size of main memory
is 128 KB. Find-
a) Number of bits in tag
b) Tag directory size
25)Which Data Structure is useful to find Depth First Search on a given graph?
26)Consider a weighted complete graph G on the vertex set {v1, v2, ..vn} such that the weight of the
edge (vi, vj) is 2|i−j|. Calculate the weight of a minimum spanning tree of G.
27)What are the advantages of DBMS over traditional file-based systems?
28)What is the difference between primary key and unique constraints?

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 29)What is database normalization?
30)What are the differences between DDL, DML, and DCL in SQL?

answer in details

Here are the detailed answers to questions 21–30:

21) Bits Needed to Address 1 GB Memory (32-bit words)

1 GB = 230 bytes

Each word = 32 bits = 4 bytes

Total number of addressable words = 230 /22 = 228

So, to address any single word:

28 bits are needed ​

22) Memory Hierarchy (with Example)

Memory hierarchy organizes memory based on speed, cost, and size:

Level Type Speed Cost/Bit Example

Register CPU registers Fastest Highest AX, BX, R1

Cache L1, L2, L3 Very Fast High Intel Core i7 has L1/L2/L3

Main Memory RAM Fast Medium DDR4 RAM

Secondary SSD/HDD Slow Low SSD, Hard Disk

Tertiary Optical/Cloud Slowest Lowest Blu-ray, AWS S3

Example:

Frequently used instructions/data → kept in cache

Less used → in RAM

Inactive or large data → in disk

This improves performance by minimizing access to slow memory.

23) Operations of a Page Replacement Algorithm

Page replacement algorithms handle memory page faults by replacing one page in memory with
another.

Key operations:

1. Page Fault Detection: CPU references a page not in main memory.

2. Page Selection: Decide which page to remove (victim page).

3. Replacement Policy: Based on algorithm (e.g., LRU, FIFO, Optimal).

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 4. Swap In/Out:

Write back if dirty

Load new page from disk

5. Update Tables: Modify page table with new frame number.

24) Cache Addressing – Direct Mapped Cache

Given:

Cache size = 16 KB = 214

Block size = 256 bytes = 28

Memory size = 128 KB = 217

(a) Number of bits in Tag

Number of blocks in cache = 214 /28 = 26 = 64 → 6 index bits

Offset bits = log₂(256) = 8

Total address bits = log₂(128 KB) = 17 bits

Tag bits = 17 − 6 − 8 = 3 ​

(b) Tag Directory Size

Each block in cache needs:

1 tag (3 bits)

1 valid bit (commonly included)

Total = 4 bits per block × 64 blocks = 256 bits = 32 bytes

✅ Tag Directory Size = 32 bytes
25) Data Structure for Depth First Search (DFS)

Answer: Stack

Explanation:

DFS explores as far as possible along each branch before backtracking.

A stack (explicit or implicit via recursion) is used to keep track of nodes.

Example:

`DFS(Graph g, Node v)
{
mark v visited;
for each neighbor u of v:
if u not visited:
DFS(g, u);

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 }
`

26) MST Weight for Given Weighted Complete Graph

Given:

Complete graph on {v₁, v₂, ..., vₙ}

Edge weight between vi and vj ​ ​ = 2∣i−j∣

Observation:

Minimum weight edges connect consecutive vertices:

(v1 , v2 ), (v2 , v3 ), ..., (vn−1 , vn )
​ ​ ​ ​ ​ ​

Each has weight 21 =2

Weight of MST = (n − 1) × 2 = 2(n − 1) ​

27) Advantages of DBMS over Traditional File-Based Systems

Feature DBMS File-Based

Data Redundancy Minimized High
Data Consistency Ensured Not guaranteed

Security Role-based access Weak control

Data Integrity Enforced via constraints Manual enforcement
Backup/Recovery Automatic support Manual and error-prone

Querying SQL Manual coding

Concurrency Handled well Poor support

✅ DBMS offers efficient, secure, and scalable data handling.

28) Primary Key vs Unique Constraint

Feature Primary Key Unique Constraint

Purpose Uniquely identifies a record Enforces uniqueness

NULL Allowed? No Yes (only one NULL allowed)
Number per table Only one Multiple allowed
Indexing Automatically created Also creates an index

✅ Primary key = unique + not null

✅ Unique key = only uniqueness
29) What is Database Normalization?

Normalization is the process of organizing a database to reduce redundancy and improve data
integrity.
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Steps (Normal Forms):

1. 1NF: Atomic values (no repeating groups)

2. 2NF: Full functional dependency (no partial)

3. 3NF: No transitive dependencies

4. BCNF, 4NF, etc.

Benefits:

Minimizes data anomalies

Saves storage

Improves maintainability

30) DDL vs DML vs DCL in SQL

Category Full Form Purpose Examples

DDL Data Definition Language Defines structure `CREATE`, `ALTER`, `DROP`
DML Data Manipulation Language Manipulates data `INSERT`, `UPDATE`, `DELETE`, `SELECT`

DCL Data Control Language Controls access `GRANT`, `REVOKE`

Example:

sql

`-- DDL
CREATE TABLE Employee (...);

-- DML
INSERT INTO Employee VALUES (...);

-- DCL
GRANT SELECT ON Employee TO user1;
`

Let me know if you want examples or diagrams for memory hierarchy, normalization, or DFS traversal!

31)What is the difference between having and where clause?

32)How to print duplicate rows in a table?
33)What is Identity?
34)What is a view in SQL? How to create a view?
35)What is a Trigger?
36)What is a stored procedure?
37)What are ACID properties?
38)What are clustered and non-clustered Indexes?
39)What is Denormalization?
40)What is the difference between a database schema and a database state?

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Here are detailed answers to questions 31 to 40:

31) Difference Between `HAVING` and `WHERE` Clause

Feature `WHERE` `HAVING`

Used for Filtering rows before aggregation Filtering groups after aggregation
Applied on Individual rows Aggregate functions (like `COUNT`, `SUM`)

Clause position Before `GROUP BY` After `GROUP BY`

✅ Example:
sql

`-- WHERE filters rows before grouping

SELECT dept, COUNT(*)
FROM employees
WHERE salary > 30000
GROUP BY dept;

-- HAVING filters groups after grouping

SELECT dept, COUNT(*)
FROM employees
GROUP BY dept
HAVING COUNT(*) > 5;
`

32) How to Print Duplicate Rows in a Table

Example Query:

sql

`SELECT column1, COUNT(*)

FROM table_name
GROUP BY column1
HAVING COUNT(*) > 1;
`

✅ This shows duplicate values in `column1`.

To show full rows, use a self-join or a CTE with `ROW_NUMBER()`.

33) What is Identity?

An IDENTITY column in SQL is used to generate auto-incrementing numbers.

Syntax (SQL Server):

sql

`CREATE TABLE Employee (

ID INT IDENTITY(1,1),
Name VARCHAR(50)
);
`

`IDENTITY(1,1)` → Starts at 1, increments by 1.

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 Used for primary keys, especially when unique values are needed automatically.

34) What is a View in SQL? How to Create One?

A View is a virtual table based on the result of a query.

It does not store data physically.

Used to simplify queries, secure data access, or customize outputs.

Syntax:

sql

`CREATE VIEW view_name AS

SELECT column1, column2
FROM table_name
WHERE condition;
`

Example:

sql

`CREATE VIEW ActiveEmployees AS

SELECT * FROM Employees WHERE Status = 'Active';
`

35) What is a Trigger?

A Trigger is a special kind of stored procedure that automatically runs in response to certain events on a
table/view.
Types:

`AFTER INSERT`

`BEFORE UPDATE`

`AFTER DELETE`, etc.

Example:

sql

`CREATE TRIGGER trg_Audit

AFTER INSERT ON Employees
FOR EACH ROW
BEGIN
INSERT INTO AuditTable VALUES (NEW.ID, NOW());
END;
`

✅ Triggers are used for logging, enforcing rules, or automated actions.

36) What is a Stored Procedure?
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A Stored Procedure is a precompiled group of SQL statements stored in the database.
Benefits:

Reusability
Improved performance
Security (encapsulate logic)

Example:

sql

`CREATE PROCEDURE GetEmployeeByID (@empID INT)

AS
BEGIN
SELECT * FROM Employees WHERE ID = @empID;
END;
`

Call with:

sql

`EXEC GetEmployeeByID 101;

`

37) What are ACID Properties?

ACID = Atomicity, Consistency, Isolation, Durability

Property Meaning

Atomicity All parts of a transaction succeed or none do.

Consistency Database remains valid before and after transaction.
Isolation Concurrent transactions don’t interfere with each other.

Durability Once committed, changes persist even after crash.

✅ Ensures reliable and consistent database transactions.

38) Clustered vs Non-Clustered Index

Feature Clustered Index Non-Clustered Index

Data Storage Physically sorted in table Has a separate structure

Number per table Only one (table = index) Multiple allowed

Speed Faster for range queries Faster for exact match lookups
Example Index on `ID` in a `Primary Key` Index on `Name` or `Email`

Syntax:

sql

`-- Clustered
CREATE CLUSTERED INDEX idx_ID ON Employees(ID);

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 -- Non-clustered
CREATE NONCLUSTERED INDEX idx_Name ON Employees(Name);
`

39) What is Denormalization?

Denormalization is the process of introducing redundancy by combining tables to improve read

performance.
When used:

To reduce JOINs

Improve reporting speed

Optimize for read-heavy systems

Example: Instead of joining `Customer` and `Order`, you store `CustomerName` directly in `Order`.
✅ Increases performance, but risks data inconsistency.
40) Difference Between Database Schema and Database State

Feature Database Schema Database State

Meaning Structure/Design of the DB Current data in the database

Changes Changes rarely (static) Changes frequently (dynamic)

Example Table definitions, data types Rows/Records in the tables

✅ Schema: Blueprint of the database

✅ State: Snapshot of data at a moment in time
Let me know if you'd like practice questions, examples, or SQL queries for any of these topics!

Uploaded image
41)Explain the concepts of a Primary key and Foreign Key.
42)What is the concept of sub-query in terms of SQL?
43)What is the use of the DROP command and what are the differences between DROP, TRUNCATE
and DELETE commands?
44)What is the main difference between UNION and UNION ALL?
45)Explain Entity, Entity Type, and Entity Set in DBMS?
46)What are the different levels of abstraction in the DBMS?
48)Let L1 be the language represented by the regular expression b*ab*(ab*ab*)* and L2 = {w (a +
b)*| |w| 4, where |w| denotes the length of string w. Find the number of strings in L2 which are
also in L1.
49)Consider the following two regular expressions over the alphabet {0, 1}: r = 0* + 1*, s = 01* + 10*
Find the strings of length less than or equal to 4, which are neither in r nor in s.
50)Which of the following statements is/are correct? explain your answer.
A. The intersection of two regular languages is regular.
B. The intersection of two context-free languages is context-free.

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 C. The intersection of two recursive languages is recursive.
D. The intersection of two recursively enumerable languages is recursively enumerable.

for 47 no question follow the image

Let's go through each of your questions (41 to 50), including an explanation of Question 47 based on
the grammar rules from the image.

47) CFG Analysis and True Statements

Grammar:

`S → aS | aSbS | c
`

Let:

`nₐ(w)`: number of a’s in string `w`

`n_b(w)`: number of b’s

`n_c(w)`: number of c’s

Analysis:

The only terminal derivation is `S → c` (base case)

The rule `S → aS` adds one `a` and continues.

The rule `S → aSbS` adds one `a`, one `b`, and two recursive derivations.

So,

Each `aSbS` increases:

1 `a`, 1 `b`
and calls two sub-strings (which must eventually each reduce to `c`)

The number of `c`’s corresponds to the number of `S → c` uses, i.e., the number of leaves in the
derivation tree.

Let's define a relationship:

If there are `k` occurrences of `S → c`, then:

`n_c(w) = k`

From derivation rules:

Every `aSbS` adds one `a` and one `b`
Every `aS` adds one `a`

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 So the number of `a`s will always be greater than number of `b`s (because `a` is also added
in `aS`)
`b`s only come from `aSbS`, and each such rule also creates two sub-S, increasing potential
`c`s

We can experimentally try:

`S → aS → ac` ⇒ 1 a, 0 b, 1 c ✅
`S → aSbS → a c b c` ⇒ 1 a, 1 b, 2 c ✅
`S → aSbS → a aSbS b c` ... continues recursively

Now test the options:

(i) na (w)
​
✅ TRUE
> nb (w):
​

Because each must come with at least one

`b` , and also comes from
`a` `a` `aS`

(ii) n (w) > n (w) ⋅ 2: ❌ FALSE

a ​

c ​

Try : 1 a, 1 b, 2 c → 1 not greater than 2×2 = 4

`aSbS → a c b c`

(iii) n (w) = n (w) + 1: ✅ TRUE

c ​

b ​

Each `b` comes from `aSbS`, which splits S into two parts (so increases `c` count by 2 eventually).
The total number of `c` is one more than number of `b`
(iv) nc (w) ​ = nb (w) ⋅ 2:​ ❌ FALSE
Not always true. From example: `aSbS → a c b c`: 2 c, 1 b ⇒ matches, but not always generalized

✅ Correct Statements: (i) and (iii)

41) Primary Key vs Foreign Key

Primary Key:

Uniquely identifies a row in a table

Cannot be NULL
Only one primary key per table

Foreign Key:
A field in one table that refers to the primary key in another table
Used to establish relationships between tables

42) Sub-query in SQL

A sub-query is a query nested inside another query.

Types:

Scalar subquery (returns single value)

Row subquery (returns row)

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 Table subquery (used with `IN`, `EXISTS`)

Example:

sql

`SELECT name FROM Employees WHERE dept_id =

(SELECT dept_id FROM Departments WHERE name = 'Sales');
`

43) DROP vs TRUNCATE vs DELETE

Command Deletes Data Removes Structure Rollback Possible Speed

`DROP` ✅ ✅ ❌ Fastest
`TRUNCATE` ✅ ❌ ❌ Faster

`DELETE` ✅ ❌ ✅ (if in transaction) Slower

44) UNION vs UNION ALL

UNION: Combines results and removes duplicates

UNION ALL: Combines results with duplicates

UNION uses sorting, so it's slower.

45) Entity, Entity Type, and Entity Set

Entity: Real-world object (e.g., Student)

Entity Type: Collection of entities with same attributes (e.g., Student(Name, ID))
Entity Set: All actual entities (rows) in a database (e.g., {S1, S2, S3})

46) Levels of Abstraction in DBMS

1. Physical Level: How data is stored (files, indexes)

2. Logical Level: What data is stored (tables, relationships)

3. View Level: What users see (restricted views)

48) Language L2 and L1 Intersection

L2 = strings of length 4
L1 = `b*ab*(ab*ab*)*`

Must have at least one `a`, followed by groups of `ab*ab*`

Generate all 4-letter strings from `{a, b}` and check which match L1. Total 16 strings in L2. Valid
matches are:

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 `abab`

`abba`

`aabb`

✅ Answer: 3 strings
49) Strings not in r or s (length ≤ 4)

r = 0 + 1**: all 0s, or all 1s

s = 01 + 10**: starts with 0 followed by 1s, or 1 followed by 0s

All strings of length ≤ 4 from `{0,1}`: 1 to 4-bit binary

Not in r: Must contain mix of 0 and 1

Not in s: Must not match 01*, 10*

✅ Strings that are in neither:

`0011`

`1100`

`0101`

`1010`

`0110`

`1001` ✅ Answer: 6 strings

50) Language Intersection Statements

A: ✅ TRUE — Regular languages are closed under intersection

B: ❌ FALSE — CFLs not closed under intersection

C: ✅ TRUE — Recursive languages closed under intersection

D: ✅ TRUE — RE languages closed under intersection

✅ Correct statements: A, C, D
Let me know if you'd like a PDF summary, MCQ quiz based on these, or deep dives into any topics!

Uploaded image
Uploaded image
51)Consider the following sets:
S1: Set of all recursively enumerable languages over the alphabet {0, 1}
S2: Set of all syntactically valid C programs
S3: Set of all languages over the alphabet {0, 1}
S4: Set of all non-regular languages over the alphabet {0, 1}
Which of the above sets are uncountable?
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 54)What is left recursion in a grammar? How can it be eliminated? Explain with an example.
55)Write a grammar for the following language: { w ∈ {0, 1}∗ | w = wR and |w| is even }
56)Write a grammar for the following language: { w ∈ {0, 1}∗ | the length of w is odd and the
middle symbol is 0}
58)What is the difference between the performance of a Deterministic PDA and an NPDA?
59)What are the common techniques to simplify a grammar?
60)What is unit production in a grammar? How can it be removed? Show with an example.

Great! Let's break down your latest questions based on the images and text you've shared:

Question 47 (from image)

Given the grammar:

`S → aS | aSbS | c
`

We are to determine which of the following are true:

Let:

na (w) = number of a’s

​

nb (w) = number of b’s

​

nc (w) = number of c’s

​

We can observe that:

The base case `S → c` contributes 1 `c`.

The rule `S → aS` adds 1 `a`.
The rule `S → aSbS` adds 1 `a` and 1 `b`.

Let's define:

Every application of:

`S → aS`: adds 1 `a`

`S → aSbS`: adds 1 `a` and 1 `b`
Ends at `S → c`: adds 1 `c`

Let’s denote:

`x` applications of `aS`

`y` applications of `aSbS`

Then:

Total a's = x + y

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 Total b's = y
Total c's = 1 (from the final `S → c`)

Thus:

na (w) = x + y ​

nb (w) = y ​

nc (w) = 1 ​

Now verify each:

(i) na (w)
​
> nb (w) ​

→ True: x + y > y ⇒ x > 0, which must be true unless x = 0, but then the string has only one a which
occurs from `aSbS`—safe to say it holds in general.
(ii) na (w)
> nc (w) ⋅ 2
​ ​

→ Not necessarily. nc (w) = 1, so this says na (w) > 2. False for small derivations.
​ ​

(iii) nc (w)
= nb (w) + 1
​ ​

→ False. nc (w) = 1, and nb (w) could be any non-negative integer. Holds only if nb = 0.
​ ​ ​

(iv) nc (w)= 2 × nb (w)

​ ​

→ False. nc = 1, so unless nb = 0.5, not valid.

✅ Only statement (i) is true.

​ ​

Question 52 (from image)

We are to determine which of the following languages are context-free:

(i) {am bn cp dq ∣m + p = n + q}
→ Not context-free, because it requires checking an equation involving 4 variables. This cannot be
done by a PDA.
(ii) {am bn cp dq ∣m = n and p = q}
→ Context-free. We can use two PDAs to handle `a^m b^m` and `c^p d^p`. Their concatenation is still
CFL.
(iii) {am bn cp dq ∣m = n = p, p =
 q}
→ Not context-free, because it involves 3-way equality and an inequality. CFLs can't handle this level of
condition.
(iv) {am bn cp dq ∣mm = p + q}
→ This is exponential (`m` occurs twice, squared). Not context-free due to non-linear condition.

✅ Only (ii) is context-free.

Question 53

Give a RE for: L = {0i 1j ∣ i is even, j is odd}

Even number of 0s: (00)∗

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 Odd number of 1s: 1(11)∗

✅ Regular Expression:
scss

`(00)*1(11)*
`

Question 57

Language: L = {abn acabn a ∣ n ≥ 0}

We need the grammar to match `a` followed by `b^n`, then `a c a`, then again `b^n a`.
Grammar:

less

`S → a B a c a B a
B → ε | b B
`

Explanation:

First `a`
Then `b^n` via `B`

Then `aca`
Then again same number of `b`s via second `B`
Ends with final `a`

✅ This grammar generates the language.

Would you like me to continue explaining questions 51, 54–60 next?

yes

Perfect! Let's now go through Questions 51 to 60 in detail:

51) Consider the following sets:

S1: Set of all recursively enumerable (RE) languages over {0, 1}

S2: Set of all syntactically valid C programs
S3: Set of all languages over {0, 1}
S4: Set of all non-regular languages over {0, 1}

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Which are uncountable?

S1: Countable — RE languages can be enumerated by Turing Machines (TM); the set of TMs is
countable.
S2: Countable — C programs are strings over a finite alphabet and can be enumerated.
S3: Uncountable — It's the power set of all strings over {0, 1}, hence uncountable.
S4: Subset of S3, but not all elements are enumerable. Uncountable.

✅ Answer: S3 and S4 are uncountable.

54) What is left recursion in a grammar? How can it be eliminated?

Left recursion: A grammar is left recursive if a non-terminal appears on the leftmost side of its
production, e.g.:

less

`A → Aα | β
`

Here, `A` calls itself first — this causes infinite recursion in top-down parsers.
To eliminate:

1. Identify: `A → Aα | β`

2. Rewrite as:

vbnet

`A → βA'
A' → αA' | ε
`

Example:

mathematica

`Original:
E → E + T | T

After elimination:
E → T E'
E' → + T E' | ε
`

55) Grammar for language: { w ∈ {0,1} | w = wᴿ and |w| is even }*

This language accepts even-length palindromes.

Grammar:

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 nginx

`S → 0S0 | 1S1 | ε
`

Explanation: It builds from the outer symbols inwards, ensuring the same characters on both sides. ε
ensures even length.

56) Grammar for language: { w ∈ {0,1} | |w| is odd and the middle symbol is 0 }*

Odd-length strings with the middle symbol = 0.

Use:

less

`S → A 0 A
A → 0A | 1A | ε
`

Here:

A generates equal-length prefixes and suffixes.

The middle symbol is forced to be `0`.

58) Difference between performance of DPDA and NPDA

DPDA (Deterministic PDA):

Accepts a strict subset of context-free languages.
Simpler to implement.
More efficient, predictable.
Used in deterministic parsing (like LR parsers).

NPDA (Non-deterministic PDA):

Accepts all context-free languages.
Harder to implement efficiently.
Can explore multiple paths simultaneously (via non-determinism).

✅ Performance-wise, DPDAs are more efficient but less powerful than NPDAs.
59) Common techniques to simplify a grammar

1. Remove Useless Symbols:

Eliminate non-terminals that do not derive terminals.
2. Remove ε-productions:
Except for start symbol.

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 3. Remove Unit Productions:
Productions like `A → B`.
4. Eliminate Left Recursion
5. Factor the grammar:
Remove ambiguity by common factoring.
6. Convert to CNF or GNF:

For parsing or algorithmic use.

60) What is unit production? How to remove it?

Unit Production:
A rule where a non-terminal maps to another single non-terminal.
Example:

css

`A → B
`

To eliminate:

1. Find all unit pairs (A → B)

2. Replace with rules B produces

Example:

less

`A → B
B → aB | b

After removing A → B:
A → aB | b
`

Let me know if you’d like these compiled into a PDF or a printable format!

61)What is useless symbol in a grammar? How can it be removed? Show with an example.
62)Compare and contrast Chomsky Normal Form (CNF) and Greibach Normal Form (GNF).
63)Describe the steps for removing ε-productions from a CFG. Use one example to show this.
64)Classify the following languages according to the Chomsky hierarchy: regular, context-free,
context-sensitive, and recursively enumerable:
● Language of all strings over {0, 1} with an equal number of '0's and '1's.
Language of all strings over {a, b} where each 'a' is followed by at least one 'b'.
● Language of all strings over {0, 1} that represent palindromes.
● Language of all strings over {a, b} where the number of 'a's is twice the number of 'b's.

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 65)Explain the significance of Turing machines in recognizing recursively enumerable languages and
the limitations of decidable languages.
66)What is the high-speed memory between the main memory and the CPU called?
67)Which computer’s memory contains the system’s Boot sector files?
68)What is the process of mapping a virtual address of a variable length onto a physical memory?
69)Consider a CPU which takes 2 microseconds as interrupt overhead time, when a device generates
interrupt for CPU and CPU accepts it. After that the CPU takes 9 cycles to service the interrupt. If
CPU runs on 2 MHZ clock rate, what is the total time the CPU spend for interrupt service.
70)In the two-level hierarchy, if the top level has an access time of 30 ns and the bottom level has an
access time of 150 ns, what is the hit rate on the top-level required to give an average access time of
45 ns.

Here are detailed answers to questions 61 to 70:

61) What is a useless symbol in a grammar? How can it be removed?

A useless symbol in a CFG is a non-terminal that never contributes to deriving terminal strings.

There are two types:

1. Non-generating symbols: Cannot derive any string of terminals.

2. Unreachable symbols: Cannot be reached from the start symbol.

Steps to remove:

1. Eliminate non-generating symbols:

Find symbols that can derive terminals.
2. Eliminate unreachable symbols:
Find all symbols reachable from the start symbol.

Example:

mathematica

`S → AB
A → a
B → C
C → D
D → E
E → ε
X → x
`

`X` is unreachable.
`C, D, E` are generating but not reachable.
After cleaning:

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 css

`S → AB
A → a
`

✅ Final grammar has no useless symbols.

62) CNF vs GNF (Chomsky Normal Form vs Greibach Normal Form)

Feature CNF GNF

Form A → BC or A → a A → aα, where α is a string of variables
Use Case Simplifies parsing, CYK algorithm Used in constructing PDAs (top-down)
Terminals Only in A → a First symbol on RHS must be terminal
Structure Binary rules only Starts with terminal, then variables

✅ CNF is better for bottom-up parsing;

✅ GNF is more aligned with top-down parsing and PDA design.
63) Steps for removing ε-productions

Step-by-step:

1. Find nullable non-terminals (which can derive ε).

2. For every rule A → α:

Generate new rules by omitting nullable symbols in α.
3. Remove ε-productions (except possibly S → ε).

Example:

less

`S → AB | a
A → ε
B → b
`

A is nullable.
S → AB produces `S → B` by omitting A.

Final Grammar:

less

`S → AB | B | a
B → b
`

64) Classify Languages by Chomsky Hierarchy

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 Language Classification Reason
Equal number of 0s and 1s Context-Free Can be recognized by PDA (like `a^n b^n`)
Can be described by a regular expression like
Each 'a' followed by at least one 'b' Regular
`a(b)+`
Palindromes over {0,1} Context-Free Needs a stack to compare symmetry
Number of a’s is twice the number of Context-
Not CFL, requires counting and comparison
b’s Sensitive

65) Turing Machines and Recursively Enumerable Languages

Turing Machines (TM) are theoretical models used to recognize recursively enumerable (RE)
languages.
A language is RE if some TM halts and accepts strings in the language (but may not halt for
others).

Significance:

Most powerful language recognizer in the Chomsky hierarchy.

Can simulate any algorithmic computation.

Limitations of Decidable (recursive) languages:

Every recursive language is RE, but not all RE languages are recursive.
For recursive languages, TM halts on every input.
Some RE languages have no halting guarantee.

66) What is the high-speed memory between main memory and CPU called?

✅ Cache Memory
Sits between CPU and RAM
Stores frequently accessed data/instructions
Faster than RAM, slower than registers

67) Which computer memory contains the system’s Boot sector files?

✅ ROM (Read-Only Memory)

Contains firmware/BIOS
Bootloader is stored here
Initiates system startup

68) What is the process of mapping virtual to physical memory?

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✅ Address Translation (or Memory Mapping)
Handled by MMU (Memory Management Unit)
Maps virtual addresses to physical addresses
Supports virtual memory and protection

69) Time for CPU interrupt service

Given:

Interrupt overhead = 2 μs
Clock speed = 2 MHz ⇒ 1 cycle = 0.5 μs
CPU cycles for service = 9
Time = 9 × 0.5 μs = 4.5 μs

Total time = Overhead + service = 2 + 4.5 = 6.5 μs

✅ Answer: 6.5 microseconds

70) Access time calculation (2-level hierarchy)

Given:

Level 1 access time = 30 ns

Level 2 access time = 150 ns
Average = 45 ns

Let hit rate = `h`

Average time formula:

Tavg = h ⋅ T1 + (1 − h) ⋅ T2
​ ​ ​

45 = h ⋅ 30 + (1 − h) ⋅ 150

45 = 30h + 150 − 150h

105
45 = 150 − 120h ⇒ 120h = 105 ⇒ h = = 0.875
120
​ ​

✅ Required hit rate = 87.5%

Let me know if you want a formula cheat sheet, diagram-based revision, or a mock quiz on any topic!

71)Consider a device operating on 2MBPS speed and transferring the data to memory using cycle
stealing mode of DMA. If it takes 2 microseconds to transfer 16 bytes data to memory when it is
read/prepare. Then what is the percentage of time CPU is blocked due to DMA

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 72)The chip selects logic of a certain DRAM chip in a memory system that has 16 address lines. What
is the range of address of the memory system that can get enabled by the chip select (CS) signals?
73)The following sequence of operation is performed on a stack:
PUSH(10), PUSH(20), POP, PUSH(10),
PUSH(20), POP, POP, POP, PUSH(20), POP.
Find the sequence of values popped out.
74)Suppose the numbers 7, 5, 1, 8, 3, 6, 0, 9, 4, 2 are inserted in that order into an initially empty
binary search tree. The binary search tree uses
the usual ordering on natural numbers. Find the inorder traversal sequence of the resultant
tree?
75)global int i = 100, j = 5;
void P(x) {
int i = 10;
print(x + 10);
i = 200;
j = 20;
print (x);
}
main() {P(i + j);}
What will be the values printed by the above program.
76)What are the advantages of using shared, dynamically linked libraries as opposed to using
statically linked libraries?
77)int f(int n)
{
static int i = 1 ;
if (n >= 5) return n;
n = n+i;
i++;
return f(n);
}
What will be the value returned by f(1).
78)Prove that the language L = {a n^ 2} is not regular.
79)Prove that regular language is closed under concatenation.
80)What is usually called a “dead state”? What’s its peculiarity?

Here are the detailed explanations and solutions for questions 71 to 80:

71) CPU Blocked Time Due to DMA (Cycle Stealing Mode)

Device speed = 2 Mbps = 2 × 10⁶ bits/sec

Data per transfer = 16 bytes = 128 bits

Transfer time = 2 μs

How many transfers per second:

2 × 106
Transfers per sec = = 15, 625 transfers/sec
128
​

Each transfer blocks CPU for 2 μs:

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 Total blocked time per second = 15, 625 × 2 μs = 31, 250 μs = 31.25 ms
31.25
Percentage of CPU blocked = × 100 = 3.125%
1000
​ ​

72) Address Range from 16 Address Lines

Number of unique addresses = 216 = 65536

Range = 0 to 65535 (in decimal)
In hexadecimal: 0x0000 to 0xFFFF

✅ Answer: Address range = 0 to 65535

73) Stack Operation Output

Operations:

scss

`PUSH(10) → [10]
PUSH(20) → [10, 20]
POP → 20
PUSH(10) → [10, 10]
PUSH(20) → [10, 10, 20]
POP → 20
POP → 10
POP → 10
PUSH(20) → [20]
POP → 20
`

✅ Popped sequence: 20, 20, 10, 10, 20

74) BST Insertion: Inorder Traversal

Insert: 7, 5, 1, 8, 3, 6, 0, 9, 4, 2
BST Structure (approximate):

markdown

` 7
/ \
5 8
/ \ \
1 6 9
/ \
0 3
/ \
2 4
`

Inorder Traversal (Left → Root → Right):

✅ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9

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75) C Code Output

`global int i = 100, j = 5;

main() {
P(i + j); // P(105)
}
void P(x) {
int i = 10; // local i, shadow global
print(x + 10); // 105 + 10 = 115
i = 200; // local i updated
j = 20; // global j updated
print(x); // x still 105
}
`

✅ Output: 115, 105

76) Shared vs Statically Linked Libraries

Feature Shared/Dynamic Libraries Static Libraries

Memory Less memory (shared across processes) Larger memory usage
Update Easy updates without recompiling apps Recompile needed
Disk Usage Smaller binaries Larger binaries
Performance Slight overhead at runtime Faster execution

Dependency External dependencies Self-contained

✅ Shared libraries reduce redundancy and allow code reuse.

77) Static Variable in Recursion

`int f(int n) {
static int i = 1;
if(n >= 5) return n;
n = n + i;
i++;
return f(n);
}
`

f(1):

i=1, n=1 → n=2

i=2, n=2 → n=4
i=3, n=4 → n=7
n=7 ≥ 5 → return 7

✅ Answer: 7
78) Prove L = {aⁿ² | n ≥ 1} is not regular

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Use Pumping Lemma:
Let L be regular. Then ∃ pumping length p.
Choose w = a^(p²) ∈ L
Split w = xyz, with |xy| ≤ p, |y| > 0

y = a^k (some k ≤ p)

Pumping: w' = a^(p² + k)

But p² + k ≠ (some integer)², so w' ∉ L

❌ Contradiction ⇒ L is not regular
✅ L is not regular
79) Prove Regular Languages Closed Under Concatenation

Let L₁ and L₂ be regular.

DFA₁ accepts L₁, DFA₂ accepts L₂

Build NFA that:
Runs DFA₁, then nondeterministically transitions to DFA₂ after accepting
Resulting NFA accepts L₁L₂

✅ Concatenation of regular languages is regular

80) What is a “Dead State” in Automata?

A dead state (or trap state) is one from which no accepting state can be reached.
Once entered, the machine stays in it and cannot accept any string.

Peculiarity:

It's useful in completing DFA (for total functions).

Ensures all input symbols have transitions from every state.

✅ Used to define total DFAs and error handling.

Let me know if you'd like visuals for automata or memory diagrams!

81)What is an instruction cycle?

82)What is the function of ALU?
83)Define Computer Organization and Computer Architecture.
84)What is the difference between RISC and CISC?
85)List the stages of an instruction cycle.
86)Define pipelining in a processor.
87)What is cache memory?

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 88)Explain virtual memory in simple terms.
89)Differentiate between Harvard and Von Neumann architectures.
90)What is the function of a Program Counter (PC)?

Here are the answers for questions 81 to 90 in simple and clear terms:

81) What is an Instruction Cycle?

An instruction cycle is the complete process a CPU follows to execute a single instruction.
It usually consists of:

1. Fetch – Get the instruction from memory

2. Decode – Understand what the instruction means
3. Execute – Perform the action (like add, move, compare)

4. Store – (if needed) Save the result

✅ This cycle repeats for every instruction a program runs.

82) What is the Function of ALU?

ALU (Arithmetic Logic Unit) performs:

Arithmetic operations: Add, subtract, multiply, divide

Logic operations: AND, OR, NOT, comparisons

✅ It’s a core part of the CPU that handles all calculations and decision-making.
83) Define Computer Organization and Computer Architecture

Computer Architecture:
It describes what the computer can do. Think of it like the blueprint of a house (e.g., instruction
set, data types, addressing modes).
Computer Organization:
It explains how those features are implemented (e.g., hardware design, control signals, memory
hierarchy).

✅ Architecture = What it does | Organization = How it’s built

84) Difference Between RISC and CISC

Feature RISC (Reduced Instruction Set) CISC (Complex Instruction Set)

Instructions Few, simple Many, complex
Execution time Fast (1 instruction per cycle) Slower
Code size Larger Smaller

Example ARM x86 (Intel)

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✅ RISC focuses on speed; CISC focuses on doing more with fewer lines of code.
85) Stages of an Instruction Cycle

1. Fetch – Get instruction from memory

2. Decode – Decode the instruction

3. Execute – Perform the operation

4. Memory Access – Read/write if needed
5. Write Back – Store result in register/memory
6. Update PC – Move to next instruction

✅ These are often overlapped in pipelined processors.

86) Define Pipelining in a Processor

Pipelining is like an assembly line in a CPU.

Different parts of the processor work on different stages of multiple instructions at the same time.
✅ This improves speed and throughput by executing several instructions in parallel (in stages).
87) What is Cache Memory?

Cache memory is a small, fast memory located close to the CPU.

It stores frequently accessed data and instructions so the CPU doesn’t have to fetch them from slower
main memory (RAM).
✅ Improves speed and reduces access time.
88) Explain Virtual Memory in Simple Terms

Virtual memory allows a computer to use hard disk space as extra RAM.
It creates the illusion of a large memory by swapping data between RAM and disk when needed.
✅ Useful when actual RAM is full—keeps programs running smoothly.
89) Harvard vs Von Neumann Architectures

Feature Harvard Von Neumann

Memory Separate for data and instructions Shared for both

Speed Faster Slower (bottleneck)
Example Use Embedded systems General-purpose computers

✅ Harvard allows simultaneous data/instruction access; Von Neumann uses a single path.
90) Function of Program Counter (PC)

The Program Counter (PC) holds the address of the next instruction to be executed.

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 After each instruction, it’s updated to point to the next one.
Controls the flow of the program.

✅ It’s essential for sequencing instructions in a program.

Let me know if you’d like a one-pager or summary sheet for quick revision!
Do you like this personality

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Computer Architecture Q&A

91)List different types of addressing modes.

92)What is an interrupt in a computer system?
93)Convert (47.625)₁₀ into binary.
94)Find the 2’s complement of the binary number 110101.
95)Calculate the effective access time if the cache hit ratio is 90%, cache access time is 10 ns, and
main memory access time is 100 ns.
96)Compute the number of address lines required to address a 1MB memory.
97)Find the physical address if the base address is 4000H and the offset is 200H.
98)How many number of Addresses are required for 2540 video RAM.
99)What is DMA?
100)State an application of Serial Access Memories.
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Here are the detailed answers to your questions:

91) List different types of addressing modes:

Immediate Addressing: Operand is given explicitly in the instruction.

Register Addressing: Operand is in a register.

Direct Addressing: Address of the operand is given in the instruction.

Indirect Addressing: Instruction contains a pointer to the operand address.

Indexed Addressing: Effective address = base + index.

Base Register Addressing: Similar to indexed but uses a base register.

Relative Addressing: Address is determined relative to the current program counter (PC).

92) What is an interrupt in a computer system?

An interrupt is a signal to the processor indicating an event that needs immediate attention. It
temporarily halts the current program, executes a service routine, and then resumes the original task.
Interrupts can be hardware (e.g., I/O completion) or software (e.g., division by zero).

93) Convert (47.625)₁₀ into binary:

Integer part (47):
47 ÷ 2 = 23 R1
23 ÷ 2 = 11 R1
11 ÷ 2 = 5 R1
5 ÷ 2 = 2 R1
2 ÷ 2 = 1 R0
1 ÷ 2 = 0 R1 → 101111

Fractional part (0.625):

0.625 × 2 = 1.25 → 1
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0.25 × 2 = 0.5 → 0
0.5 × 2 = 1.0 → 1 → .101
Answer: (47.625)₁₀ = 101111.101₂

94) Find the 2’s complement of the binary number 110101:

Step 1: Invert the digits → 001010
Step 2: Add 1 → 001010 + 1 = 001011
Answer: 2’s complement = 001011

95) Calculate the effective access time:

Formula:
EAT = (Hit ratio × Cache time) + (Miss ratio × (Cache time + Memory time))
= (0.9 × 10) + (0.1 × (10 + 100))
= 9 + 0.1 × 110
= 9 + 11 = 20 ns

96) Compute the number of address lines for 1MB memory:

1MB = 2²⁰ bytes
So, 20 address lines are needed.
Answer: 20 lines

97) Find the physical address (Base = 4000H, Offset = 200H):

4000H = 16384
200H = 512
Physical Address = 16384 + 512 = 16896
16896 in hex = 4200H

98) How many addresses are required for 2540 video RAM?
Assuming 1 byte per address,
2540 bytes = 2540 addresses
Answer: 2540 addresses

99) What is DMA?

DMA (Direct Memory Access) allows devices to transfer data directly to/from memory without involving
the CPU. It increases system efficiency by freeing up the CPU during data transfers.

100) State an application of Serial Access Memories:

Serial Access Memories like magnetic tapes are used in data backup systems, where data is accessed
sequentially rather than randomly.

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101)How to put a microprocessor in Wait state?

102)Explain the instructions: (i) RST and (ii) LXI.
103)Explain the instructions: (i) JMP and (ii) DAA.
104)State the sequence of events that happen during a typical Fetch operation.

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 105)Discuss the difference between PLA and ROM.

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Here are the detailed answers to your questions:

101) How to put a microprocessor in Wait state?

A microprocessor can be placed in a Wait state by deactivating the READY signal.

The READY signal is an input to the microprocessor.

If READY = 1: The processor continues normal operation.

If READY = 0: The processor enters a Wait state, suspending its operation until READY returns to 1.
This is used when slow memory or I/O devices need extra time to respond.

102) Explain the instructions:

(i) RST (Restart Instruction):

It's a one-byte call instruction used to call fixed memory locations (like interrupt service routines).

Syntax: `RST n` (where n = 0 to 7)

It transfers program control to memory location n × 8 (e.g., RST 1 → 0008H).

(ii) LXI (Load Register Pair Immediate):

Used to load a 16-bit immediate value into a register pair.

Syntax: `LXI rp, data16` (where rp = BC, DE, HL, or SP)

Example: `LXI H, 2500H` → loads 2500H into the HL pair.

103) Explain the instructions:

(i) JMP (Jump):

Used to transfer program control to a specified 16-bit address.

Syntax: `JMP 2050H`

It’s an unconditional jump and replaces the current PC with the target address.

(ii) DAA (Decimal Adjust Accumulator):

Used after BCD addition.

Adjusts the result in the accumulator into valid BCD format.

It considers auxiliary and carry flags to correct the lower and upper nibbles.

104) Sequence of events during a typical Fetch operation:

1. Program Counter (PC) sends the address of the instruction to the Address Bus.
2. Memory Read (RD) signal is activated.

3. The instruction at the given memory address is placed on the Data Bus.

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 4. The Instruction Register (IR) captures the instruction from the Data Bus.

5. PC is incremented to point to the next instruction.

6. The CPU decodes the instruction for execution.

105) Discuss the difference between PLA and ROM:

Feature PLA (Programmable Logic Array) ROM (Read Only Memory)

Fixed OR array, programmable output (Mask
Programmability Programmable AND & OR arrays
or PROM)
High – both logic and connections
Flexibility Limited – logic is fixed after fabrication
programmable
Usage Implement logic functions, state machines Store data, lookup tables, firmware
Speed Generally faster due to optimized logic Slightly slower for logic operations
Cost More expensive and complex Cheaper for large data storage

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