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Ece Final

The document is a lab report from the Microprocessor & Interfacing Lab at the Indian Institute of Information Technology Bhagalpur, detailing various experiments conducted by students. It includes assembly code implementations for tasks such as copying data, generating waveforms, and logical gate operations. The report concludes with a certification of completion for the course by an assistant professor.
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0% found this document useful (0 votes)
12 views17 pages

Ece Final

The document is a lab report from the Microprocessor & Interfacing Lab at the Indian Institute of Information Technology Bhagalpur, detailing various experiments conducted by students. It includes assembly code implementations for tasks such as copying data, generating waveforms, and logical gate operations. The report concludes with a certification of completion for the course by an assistant professor.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Indian Institute of Information Technology Bhagalpur

(An Institute of National Importance Under Act of Parliament)

Microprocessor & Interfacing Lab Report

Submitted by:
Abhishek Shukla (230101005)
Atulya Srivastava (230101038)
Divyanshu Pal (230101051)
Harsh (230101055)

JTS: Mr. Hemant Kumar


Class: B. Tech. – ‘27
Semester: IV

Department of Electronics & Communication Engineering IIIT


BHAGALPUR, BIHAR 813210, INDIA
CERTIFICATE

This is to certify that ABHISHEK SHUKLA (230101005),


ATULYA SRIVASTAVA (230101038), DIVYANSHU PAL (230101051) &
HARSH (230101055) have satisfactorily completed the course in
Microprocessor & Interfacing LAB (EC218) during the academic year
2024-2025.

Date: 11/04/2025
Place: IIIT Bhagalpur

Dr. Suraj
Assistant Professor, ECE
IIIT Bhagalpur, 813210
EXPERIMENTS

1. Write an assembly code to copy 8-bit hexadecimal data 63H to R0,


R1 and R2 at resistor bank 0.

2. Write 8051 assembly code to copy 8-bit hexadecimal data 30H


data to internal memory location 30H, 31H, 32H.

3. Write a program to implement XOR gate using assembly


language.

4. Implement NAND, NOR Gate using an assembly program.

5. Generate a square waveform of frequency 1Khz on pin P1.7.

6. Write a program to clean 16 RAM location starting at RAM


address 60H.

7. Generate a square waveform with a duty cycle of 33% having a


frequency of 2KHz use Timer 1 in mode 2. Crystal frequency is
22MHz

8. Ten hexadecimal numbers are stored in Ram locations. Write a


program to find the biggest number set. The biggest number
should finally be saved in 60H.

9. Write a program to find the sum of the values. At the end of


program register should contain the low byte and R7 the high
byte. All values are in Hexadecimal: 40-7D, 41-EB, 42-C5, 43-5B,
44-30.
EXPERIMENT 1:

Write an assembly code to copy 8-bit hexa-decimal data 63H to R0 R1


and R2 at resistor bank 0.

CODE:

ORG 0000H ; Set program start address

MOV R0, #63H ; Load 63H into R0


MOV R1, #63H ; Load 63H into R1
MOV R2, #63H ; Load 63H into R2

END ; End of program

OUTPUT:
EXPERIMENT 2:

Write 8051 assembly code to copy 8-bit hexadecimal data 30H data to
internal memory location 30H, 31H, 32H.

CODE:

ORG 0000H ; Set program start address

MOV 30H, #30H ; Store 30H at internal RAM location 30H

MOV 31H, #30H ; Store 30H at internal RAM location 31H

MOV 32H, #30H ; Store 30H at internal RAM location 32H

END ; End of program

OUTPUT:
EXPERIMENT 3:

Write a program to implement XOR gate using assembly language.

CODE:

Truth Table of XOR Gate

A B A ⊕ B (XOR Output)
P1.0 P1.1 P2.0
0 0 0
0 1 1
1 0 1
1 1 0

ORG 000H

MOV P1, #0FFH;


MOV P2, #00H;

MAIN:
JB P1.0, TEST1;
JB P1.1, TEST2;
CLR P2.0;
SJMP MAIN;

TEST1:
JB P1.1, TEST3;
SETB P2.0;
SJMP MAIN;

TEST2:
SETB P2.0;
SJMP MAIN;
TEST3:
CLR P2.0;
SJMP MAIN;

END;
OUTPUT:

For P1.0=1, P1.1 =1 Output is LOW or 0 For P1.0=0, P1.1 =1 Output is HIGH OR 1

EXPERIMENT 4:

Implement NOR Gate using an assembly program.

CODE:

Truth Table of NOR Gate:

A B NOR Output
(P1.0) (P1.1) (P2.0)
0 0 1

0 1 0

1 0 0

1 1 0
ORG 000H

MOV P1, #0FFH ;


MOV P2, #00H ;

MAIN:

JB P1.0, TEST1 ; If P1.0 is high, jump to TEST1


JB P1.1, TEST2 ; If P1.1 is high, jump to TEST2
CLR P2.0 ; If none high, clear P2.0
SJMP MAIN

TEST1:
JB P1.1, TEST3 ; If P1.1 is high, go to TEST3
SETB P2.0 ; If P1.1 is low, set P2.0
SJMP MAIN

TEST2:
SETB P2.0 ; If only P1.1 is high, set P2.0
SJMP MAIN

TEST3:
CLR P2.0 ; If both P1.0 and P1.1 are high, clear P2.0
SJMP MAIN ;

END;

OUTPUT:

When one of the input is high output is low

When both the inputs are low output is high


Implement NOR Gate using an assembly program.

CODE:

Truth Table of NAND Gate

A B NAND Output
(P1.0) (P1.1) (P2.0)

0 0 1

0 1 1

1 0 1

1 1 0

ORG 000H

MOV P1, #0FFH ; Set P1 as input (pull-up)


MOV P2, #00H ; Clear P2

MAIN:
JB P1.0, CHECK1 ; If P1.0 is 1
JB P1.1, ONLY_P11 ; P1.0=0 and P1.1=1 → Set
CLR P2.0 ; P1.0=0 and P1.1=0 → Clear
SJMP MAIN ;

CHECK1:
JB P1.1, BOTH_SET ; P1.0=1 and P1.1=1 → Clear
SETB P2.0 ; P1.0=1 and P1.1=0 → Set
SJMP MAIN ;

ONLY_P11:
SETB P2.0 ; Only P1.1 is set
SJMP MAIN ;

BOTH_SET:
CLR P2.0 ; Both are set
SJMP MAIN ;

END
OUTPUT:

NAND implementation on the PORT

EXPERIMENT 5:

Generate a square waveform of frequency 1Khz on pin P1.7.

CODE:

ORG 00H ; Start at address 00H

; Initialize Port 1
MOV P1, #00H ; Clear P1 (P1.0 = 0)

; Configure Timer 1 for Mode 1 (16-bit)


MOV TMOD, #10H ; Timer 1, Mode 1 (GATE=0, C/T=0, M1=0, M0=1)

MAIN:
; --- Half-cycle (500 µs HIGH) ---
MOV TH1, #0FEH ;
MOV TL1, #33H ;
SETB P1.0 ; Set P1.0 HIGH
SETB TR1 ; Start Timer 1

WAIT_HIGH:
JNB TF1, WAIT_HIGH ; Wait for overflow
CLR TF1 ; Clear overflow flag
CLR TR1 ; Stop Timer 1

; --- Half-cycle (500 µs LOW) ---


MOV TH1, #0FEH ; Same values for symmetric wave
MOV TL1, #33H ;
CLR P1.0 ; Set P1.0 LOW
SETB TR1 ; Start Timer 1

WAIT_LOW:
JNB TF1, WAIT_LOW ; Wait for overflow
CLR TF1 ; Clear overflow flag
CLR TR1 ; Stop Timer 1

SJMP MAIN ; Repeat indefinitely


END

OUTPUT:
EXPERIMENT 6:

Write a program to clean 16 RAM locations starting at RAM address


60H.

CODE:

ORG 0000H;
MOV R0, #60H ;
MOV R1, #10H ;

CLEAR_RAM:
MOV @R0, #00H;
INC R0 ;
DJNZ R1, CLEAR_RAM;

END;

Address Before Execution After Execution

0x60 Some Random Value 00H

0x61 Some Random Value 00H

0x62 Some Random Value 00H

... Some Random Value 00H

0X6F Some Random Value 00H


OUTPUT:

EXPERIMENT 7:

Generate a square waveform with a duty cycle of 33% having a


frequency of 2KHz use Timer 1 in mode 2. Crystal frequency is
22MHz

CODE:

ORG 00H
MOV P1, #00H ; Initialize P1.0 as output

MAIN:
; ---- ON Time: 165 µs (2 overflows) ----
MOV TMOD, #20H ; Timer 1, Mode 2 (auto-reload)
MOV TH1, #0D1H ; Reload value = 209 (for second overflow)
MOV TL1, #00H ; Start counting from 0 (first overflow)
SETB P1.0 ; P1.0 HIGH
SETB TR1 ; Start Timer 1
ON_FIRST:
JNB TF1, ON_FIRST ; Wait for first overflow (140 µs)
CLR TF1 ; Clear flag
ON_SECOND:
JNB TF1, ON_SECOND ; Wait for second overflow (25.6 µs)
CLR TF1 ; Clear flag
CLR TR1 ; Stop Timer 1

; ---- OFF Time: 335 µs (3 overflows) ----


MOV TH1, #00H ; Reload value = 0 (for second/third
overflows)
MOV TL1, #99H ; Start counting from 153 (first overflow)
CLR P1.0 ; P1.0 LOW
SETB TR1 ; Start Timer 1

OFF_FIRST:
JNB TF1, OFF_FIRST ; Wait for first overflow (56 µs)
CLR TF1
OFF_SECOND:
JNB TF1, OFF_SECOND ; Wait for second overflow (140 µs)
CLR TF1
OFF_THIRD:
JNB TF1, OFF_THIRD ; Wait for third overflow (140 µs)
CLR TF1
CLR TR1

SJMP MAIN ; Repeat


END

OUTPUT:
EXPERIMENT 8:

Ten hexadecimal numbers are stored in Ram locations. WAP to


find the biggest number set. The biggest number should finally be
saved in 60H.

CODE:

ORG 00H

MOV R0,#60H;
MOV R1,#10;
MOV B,#0;

BACK:
MOV A,@R0;
CJNE A,B,LOOP;

LOOP:JC LOOP1;
MOV B,A;
INC R0;
DJNZ R1,BACK;
SJMP NEXT;

LOOP1:
INC R0;
DJNZ R1,BACK;

NEXT:
MOV A,B;
MOV 60H,A;

END;
OUTPUT:

EXPERIMENT 9:

Write a program to find the sum of the values. At the end of


program register should contain the low byte and R7 the high byte.
All values are in Hexadecimal:40-7D, 41-EB, 42-C5, 43-5B, 44-30.

CODE:

ORG 0000H;

MOV 40H, #7DH;


MOV 41H, #0EBH;
MOV 42H, #0C5H;
MOV 43H, #5BH;
MOV 44H, #30H;

MOV R0, #40H;


MOV R2, #05H;
CLR A;
MOV R7, #00H;
LOOP:
MOV B, @R0;
ADD A,B;
JNC NO_CARRY;
INC R7;

NO_CARRY:
INC R0;
DJNZ R2,LOOP;

END;

OUTPUT:

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