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TCAD Intro 2014

The document provides an overview of Sentaurus TCAD, a simulation tool developed by Synopsys for various semiconductor applications including CMOS, memory, and power devices. It outlines the product portfolio, development focuses, supported platforms, and features of the Sentaurus Workbench, Process Simulator, and Topography Simulator. Additionally, it discusses the capabilities for modeling processes such as implantation, diffusion, oxidation, and etching in both silicon and non-silicon materials.

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0% found this document useful (0 votes)
55 views79 pages

TCAD Intro 2014

The document provides an overview of Sentaurus TCAD, a simulation tool developed by Synopsys for various semiconductor applications including CMOS, memory, and power devices. It outlines the product portfolio, development focuses, supported platforms, and features of the Sentaurus Workbench, Process Simulator, and Topography Simulator. Additionally, it discusses the capabilities for modeling processes such as implantation, diffusion, oxidation, and etching in both silicon and non-silicon materials.

Uploaded by

dons49891
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 79

Sentaurus TCAD

Introduction

Franck Nallet
Paris - 15/09/2014

© Synopsys 2013 1
CONFIDENTIAL INFORMATION
The following material is being disclosed to you pursuant to a non-disclosure
agreement between you or your employer and Synopsys. Information
disclosed in this presentation may be used only as permitted under such an
agreement.

LEGAL NOTICE
Information contained in this presentation reflects Synopsys plans as of the
date of this presentation. Such plans are subject to completion and are
subject to change. Products may be offered and purchased only pursuant to
an authorized quote and purchase order. Synopsys is not obligated to
develop the software with the features and functionality discussed in the
materials.

© Synopsys 2013 2
TCAD Application Segments

CMOS
• Advanced CMOS (Si, SOI, etc.)
• Atomistic modeling
• Statistical modeling
• Reliability Analog/RF
• High-speed devices
• Compound semiconductors

Memory • Flash
• DRAM
• ReRAM
Power • Discrete devices
• Power ICs
• Silicon and wide bandgap
• ESD

Opto • Image Sensors


• Solar Cells
• Photodetectors

© Synopsys 2013 3
TCAD Product Portfolio
Sentaurus Lithography

Sentaurus Process Sentaurus Topography

Sentaurus Process Framework


Process
Sentaurus Lithography Sentaurus Workbench
Simulation
Sentaurus Structure Editor Sentaurus Topography
Sentaurus
Structure Workbench
Sentaurus Structure Editor
Editing

Sentaurus Device
Device and Sentaurus
Interconnect Raphael PCM
Studio
Simulation
Sentaurus Interconnect
Sentaurus PCM Studio

Sentaurus Device

Raphael
Sentaurus Interconnect

© Synopsys 2013 4
TCAD Development Focuses
• New Technology Support
– More Moore
– FinFET, FDSOI, III-V, etc.
– More than Moore
– Analog/RF, CIS, solar, power (Si, SiC, GaN), TSV, etc.

• 3D Support (FinFET, NVM, Power, SRAM, CIS)


– Improved meshing and geometric operations
– Stress modeling
– BEOL reliability modeling
– Topography simulation

• Performance and Usability


– Improved multi-CPU scaling
– Process simulation speed-up
– More intuitive user interface
© Synopsys 2013 5
TCAD Supported Platforms

Platforms supported in I-2013.12 release:


 x86_641 Red Hat Enterprise Linux 5.7, 5.9, 6.2, 6.4
 x86_641 SUSE Linux Enterprise Server 10SP3,
10SP42, 11SP12, 11SP22
 IBM RS6000 64-bit AIX3 6.1-TL6-SP5

1. The 64-bit (x86_64) Linux software is binary compatible with the Intel orAMDx86_64 processors running
Red Hat Enterprise Linux.
2. Binary-compatible hardware platform or operating system. Note, however, that binary compatibility is
not guaranteed.
3. Sentaurus Device Electromagnetic Wave Solver, Sentaurus Interconnect, Sentaurus Topography, and
Sentaurus Topography 3D are not available on AIX.

© Synopsys 2013 6
Sentaurus Workbench – TCAD
Simulation Platform
• Sentaurus Workbench GUI

Tools

Simulation
Tree Simulation
Branch

Projects

Nodes

© Synopsys 2013 7
Sentaurus Workbench – Easy Material &
Manual Access
HTML-
Manuals training

Public
Application
Example
Library

© Synopsys 2013 8
Sentaurus Workbench – Node Explorer
• Node Explorer (F7) provides quick access to all node data

mouse
double-click
on node

© Synopsys 2013 9
Sentaurus Workbench – Flexible
Execution Controls

selected
nodes run
with one
mouse click

© Synopsys 2013 10
Sentaurus Process Simulator
• General purpose multidimensional (2D/3D) process simulator
• Integrated 3D geometric modeling engine (depo/etch/pattern)
• Adaptive meshing (to geometry/species changes)
• API for user-defined models
• Advanced physical models:
– Analytic and Monte Carlo implantation
– Diffusion: laser/flash annealing, kinetic Monte Carlo
– Mechanical stress FinFET SRAM
– Oxidation/Silicidation

Mechanical Stress Kinetic Monte Carlo Adaptive Meshing Oxidation

© Synopsys 2013 11
Implantation
implant Arsenic dose=1e14 energy=50 tilt=7 rotation=0 info=2

 MC Implantation
• Sentaurus MC
• (Crystal-TRIM)

 Analytic Implantation
• Primary Distributions
o Gaussian
o Pearson (4 parameters)
o Dual Pearson (9 parameters)
• Screening
• Damage Model
• Amorphization
• Molecular Implant
• Calibrated Implantation Tables

© Synopsys 2013 12
Dopant Diffusion
 Flash/Laser Anneal
 Dopant Activation and Clustering
 Solid Phase Epitaxial Regrowth
 Epitaxy
 Clustering of Defects
 Pressure-dependent Defect
Diffusion
 Segregation & Dose Loss
 Kinetic MC Diffusion
 Diffusion Model Hierarchy
• Constant (constant diffusion coefficient)
• Fermi (point defects equation not solved, defects in equilibrium)
• Charged Fermi (same as Fermi+total dopant flux is due to dopant-defect pairs)
• Pair (dopant-defects pairs are in local equilibrium with dopant and defect concentrations)
• Charged Pair (same as Pair+reaction rates are state charge dependent)
• React (incl.defects, rates are not charge state dependent)
• Charged React (same as React+mobile charged dopant-defects)

© Synopsys 2013 13
Oxidation/Silicidation
 Oxidation Model Hierarhy
• Deal/Grove Model
• Massoud Model
• Mixed Flows (Hirabayashi approach)
 Stress-Dependent Oxidation (SDO)
 Orientation-Dependent Oxidation
 Doping-Dependent Oxidation
 Trap-Dependent Oxidation
 In Situ Steam-Generated Oxidation
(ISSG)
 Silicidation
 Oxynitridation (N20)
 Moving Boundaries and Adaptive Mesh
 3D Oxidation

© Synopsys 2013 14
Mechanical Stress Modeling
 Stress Model
• Viscoplasticity
• Plasticity
• Viscoelasticity

 Stress Causing Mechanisms


• Stress Induced by Growth of Material
• Stress Induced by Densification
• Stress Induced by Thermal Mismatch
• Lattice Mismatch Stress
• Intrinsic Stress

© Synopsys 2013 15
Etching/Deposition
 Etch Models
• Isotropic
• Anisotropic & Directional
• Polygonal
• CMP
• Fourier
• Crystallographic
• Trapezoidal
 Depo Models
• Isotropic
• Fill & Polygon
 3D Geometry Generation
• Fourier
• MGOALS3D (level-set)
• Selective Deposition
• Integrated SDE
 Algorithms • S-Topo 3D
• Analytic • Meshing with Sentaurus Mesh
• Level-set

© Synopsys 2013 16
Non-Si Materials Process
Simulation
 MC Implantation
• SiGe and Ge
• 4H-, 6H-SiC
• III-V, including III-N
• Diffusion & Activation
• First prototype available in H-
2013.03 release for 4H-SiC and
III-V (InGaAs/InP)

© Synopsys 2013 17
Sentaurus Process Kinetic MC
• Command to switch
SetAtomistic

• Considers only defects and impurities, and ignores the lattice for
diffusion simulation
• Supported options: diffuse, deposit, etch, implant, init, line, photo,
profile, region, select, strip
• LKMC: Fully Atomistic Modeling of SPER (Solid Phase Epitaxial
Regrowth)
 SPER velocity depends on the substrate orientation with approximate
ratios of 20:10:1 for orientations (100), (110), and (111)
amorphous
Si (111) planes

Oxide
crystalline
Si

© Synopsys 2013 18
Sentaurus Topography 3D
General overview
• Sentaurus Topography 3D is a three-dimensional simulator for
evaluating and optimizing critical topography-processing steps
such as etching and deposition
• Simulates deposition and etching processes by using the
level-set method to evaluate the surface evolution during the
process
• Models categories:
– Built-in models
– User-defined models within Rate Formula
Module (RFM)
– User-defined models within a Physical
Model Interface (PMI)
• Support of different reaction species,
different fluxes, re-deposition, …

© Synopsys 2013 19
Sentaurus Topography Simulator

• Multidimensional (2D/3D)
• Robust level-set numerical models
• Deposition models (LPCVD, PECVD, HDP-CVD, APCVD, SOG, reflow)
• Etching models (wet, HDP, RIE, ion milling, CMP)
• Interface to Sentaurus Process & Sentaurus Lithography

Physical vapor deposition Ion milling RIE

O3 / TEOS APCVD Tench filling with void formation

© Synopsys 2013 20
Etching and Deposition Example
DRAM Flow, using built-in models

1
3

5
2

© Synopsys 2013 21
Coupling Topography to Process

Geometry Doping and meshing


Sentaurus Topography Sentaurus Process

© Synopsys 2013 22
Sentaurus Interconnect

© Synopsys 2013 23
Sentaurus Interconnect Tool Overview
 Focus on BEOL device structures
Mechanical Stress Electro-Thermal

Fracture Mechanics TSV Proximity

Crack

© Synopsys 2013 24
Sentaurus Interconnect Simulation Flow
Layout Info
GDSII
Process Info
Deposition material=Oxide ICWB-EV Plus
Etch mask=Metal_2

Material Property
Database
Sentaurus Interconnect

Realistic 3D Structures with :

TSV
• Mechanical Stress Fields
Stress • Electrostatic Potential
• Current Density
• Thermal hot-spots
Current Temperature
• Mobility Variations
• Crack Propagation
Stress
Crack

© Synopsys 2013 25
BEOL Structure Meshing

© Synopsys 2013 26
Self Heating and Temperature Gradients
300K

Silicon
block with
constant
resistivity
Boundary
conditions for
Thermal
Simulation

Current Flow Self Heating and


Temperature Gradient

• Performing electrical and thermal simulation alongside stress simulation, using


the same input file and structure setup helps evaluate reliability and
performance trade-offs efficiently

• Self-heating simulation allows 3D-IC engineers to estimate impact on transistor 300K


performance and validate chip-level models for thermal-aware placement

© Synopsys 2013 27
Sentaurus Structure Editor
• Geometrical operations
• Easy to use GUI
• Scripting language
• Advanced geometrical modeling with analytic doping definitions
• Direct interface to meshing engines

S-RCAD DRAM CIS pixels with microlenses TSV Structure

© Synopsys 2013 28
ACIS Geometry Kernel
 Based on boundary representation.
 An ACIS boundary representation is a hierarchical decomposition of
the topology of the model into lower-level topological objects.
 A typical body contains faces, edges, vertices, and may also includes
lumps, shells, loops, and wires.

Tessellation controls

© Synopsys 2013 29
Scheme Language

 Strings
 Lists
 Arithmetic Expressions
 Boolean Operations
 Loops
 Logical Operations
 Procedures
 System Calls

© Synopsys 2013 30
2D -> 3D Structure Construction

© Synopsys 2013 31
Layout Based Device Design

Loaded Layout Resist for STI Silicon etching

STI formation (oxide filling) and


Polysilicon / gate oxide generation Metal generation for contacts Final boundary structure

© Synopsys 2013 32
Process Emulation Mode
 Translates processing steps into
geometric operations
 Works only in 3D
 Commands not accessible from
GUI
 Support for:
• Iso- & Aniso- Depo/Etch
• Placement of analytical
profiles w.r.t mask
• GDS2 file loading
• Masks definition and
Patterning

© Synopsys 2013 33
Process Emulation - 3D CIS Structure

• A Sentaurus Structure Editor (SDE) script was done to generate


“boundary” and “doping” files for Sentaurus Mesh (S-Mesh)
• GDS2 file is loaded into SDE and layers are built out of GDS2 layers

(define GDSFILE "TCAD_PIXEL_v3.gds")


(define CELLNAME "TCAD_PIXEL_v3")
(define LAYERNAMES (list 'PWELL 'POLY 'ACT 'NO_PW 'NPLUS
'CONT 'PW_LVT 'MET1 'VIA1 'MET2 'VIA2 'MET3 'VIA3 'MET4
'ULENS 'PD1 'PD2 'SN1 'SN2 'SN3 ))
(define LAYERNUMBERS (list '1:0 '8:0 '9:0 '17:82 '32:0 '34:0
'35:0 '40:0 '41:0 '42:0 '43:0 '44:0 '49:0 '50:0 '89:0 '92:82
'93:0 '94:0 '94:43 '94:95 ))

(sdeicwb:gds2mac "gds.file" GDSFILE "cell" CELLNAME


"layer.names" LAYERNAMES "layer.numbers" LAYERNUMBERS
"sim3d" (list 0 -6000 6000 0) "scale" 1.0e-3 "domain.name"
"SIM3D" "mac.file" "TCAD_PIXEL")

© Synopsys 2013 34
Process Emulation - 3D CIS Structure
• Geometry is built step by step using deposition/etch/patterning
features of SDE
• Scripting language (scheme) allows full customization, using
variables, lists, strings and built-in ACIS functions.

(define TSUB 7.0)

(sdepe:add-substrate "material" "Silicon" "thickness" TSUB "region" "substrat")

(sdepe:pattern "mask" "ACT" "polarity" "light" "material" "Resist" "thickness" 1 "type"


"aniso" "algorithm" "sweep" )

(sdepe:etch-material "material" "Silicon" "depth" 0.420 "taper-angle" 5)

(entity:delete (find-material-id "Resist"))

(sdepe:fill-device "material" "Oxide" "height" (+ TSUB 0.008))

(sdepe:pattern "mask" "POLY" "polarity" "light" "material" "PolySilicon" "thickness" 0.3


"type" "aniso" "algorithm" "sweep" )

© Synopsys 2013 35
Process Emulation - 3D CIS Structure
• SDE is based on ACIS (product from Spatial, Dassault-System) and allows complex
solid modeling
• Micro-lens is part of a sphere inserted on top of the CIS

© Synopsys 2013 36
Process Emulation - 3D CIS Structure +
doping
• Doping from analytical or SIMS profiles
• Doping from 1D/2D or 3D process simulation
• Meshing with Sentaurus Mesh

© Synopsys 2013 37
Advanced Tool Operations
2D geometry sweep with SDE / 2D doping sweep with SnMesh
Resulting 3D mesh/profile:

Placements {
2D submesh:
Definitions { SubMesh “trench2D" {

SubMesh “trench2D" { Reference = " trench2D "

Geofile = "trench2D.tdr" EvaluateWindow {

} Element = SweepElement {

} Base = Polygon [ (0 20 3.3288) (8.2 20 3.3288)

(8.2 20 -20) (0 20 -20)]

Path = [ (8.2 20 3.3288) (8.2 22 3.3288) (8.21 22.1 3.3288) … ] }}}}

© Synopsys 2013 38
SnMesh - Quadtree/Octree Spatial
Decomposition
(A) (C) (A) Quadtree algorithm
- mesh step
proportional to
device size
(B) Quadtree algorithm
- mesh step not
proportional to
device size
(C) Quadtree algorithm
(B) (D) - non axis-aligned
boundary
(D) Octree algorithm -
mesh step
proportional to
device size

© Synopsys 2013 39
Unified (octree/quadtree + normal offsetting)
Meshing Algorithm

Definitions {
Refinement "R5" {
Offsetting { MaxElementSize = ( 0.026 0.026 0.026 )
noffset material "Silicon" "Oxide" { }
hlocal=0.002 }
} Placements {
noffset material "Oxide" "Silicon" { Refinement "GDJ_RP" {
hlocal=0.002 Reference = "R5"
} RefineWindow = Cuboid [(-0.2 -0.2 0) (0.20 0.2 0.5)]
} }
}
© Synopsys 2013 40
Doping Deatomization
Particle "BoronParticles" {
ParticleFile = "kmc_final.tdr"
Species = "BoronActiveConcentration"
ScreeningFactor = 3.5e6
AutoScreeningFactor
Normalization
}

© Synopsys 2013 41
Sentaurus Device Simulator
• General purpose multidimensional (2D/3D) device simulator
• Silicon, SiGe, Ge, SiC, III-V compounds (including III-N materials)
• Drift-diffusion, Hydrodynamic, Thermodynamic, and Monte Carlo transport
• Wide range of advanced physical models
– Stress-dependent mobility enhancement
– Quantization and random doping effects
– Circuit mixed-mode, small-signal AC, Harmonic Balance
– Variability Analysis

STI Narrow Width Effect FinFET NAND Flash CMOS Image Sensor UMOS

© Synopsys 2013 42
Sentaurus Device for CMOS
 Carrier quantization in the channel
 Hydrodynamic transport
 Noise analysis
50nm NMOS IdVg
 High-k dielectrics
 Mechanical stress and strain effects
 Stochastic geometry and doping
variability
 Remote Coulomb scattering
 Advanced surface mobility modeling
Line Edge Roughness Variability
 Non-local band-to-band and impact
ionization
 Gate leakage
 Energy dependent energy relaxation
time
 Degradation kinetics
 IFM based variability analysis

Calibration to SIMS, Roll-off and Ion

© Synopsys 2013 43
Sentaurus Device for Memory
 Carrier quantization in the channel
 Spherical Harmonic Expansion
 Non-local tunneling
 Hot Carrier Injection
 3D capacitive effects
SRAM inverter NOR Flash  Multi State Configuration including
the state dependent physical
models and parameters
 Cycling analysis
 Mixed-mode simulations
 Advanced surface mobility modeling
NAND Flash DRAM Cell  Non-local band-to-band, TAT, and
impact ionization
 Interface trap degradation

PRAM
SONOS/NROM

© Synopsys 2013 44
Sentaurus Device for Power
 Thermodynamic carrier transport
 3D geometry effects
 Mixed-mode simulations including
the circuit protective elements,
represented by compact models
ESD Protection  Heat dependent kinetic model
IGBT
parameters
 Non-local gate tunneling
 Trapping dynamic
 Composition dependent model
parameters
UMOS  Heterointerface carrier transport
P-LDMOS
 Carrier thermionic emission
 Carrier quantization in the channel
 Piezo and spontaneous polarization
 Doping Incomplete Ionization
 Material anisotropy
SiC VJFET
III-N HFET

© Synopsys 2013 45
Sentaurus Device for RF
III-V HEMT  Hydrodynamic transport
HBT
 Small-signal AC analysis
 Harmonic balance analysis
 Carrier quantization
 Bulk and interface traps
 Mechanical stress and strain effects
 Energy dependent energy relaxation
time
 Anisotropy effects
 Composition dependent model
parameters
 Non-local barrier tunneling
 Stress dependent models
 Polarization fields

© Synopsys 2013 46
Sentaurus Device for Optics
 Drift-diffusion carrier transport
 Advanced optical solvers:
 Transfer Matrix Method
 Beam Propagation Method
Si, Ge
 Raytracing
mc-Si, a-Si
GaAs, InGaP, …
 FDTD Maxwell solver
CIGS, CdTe
 3D geometry effects
 Mixed-mode simulations including
the circuit periphery elements
Solar Cells CMOS Image  Carrier trapping
Sensors  Composition dependent model
parameters
 Heterointerface carrier transport
 Advanced models for photon and
free carrier absorption
 Organic semiconductors

Photodetectors
CCD

© Synopsys 2013 47
Sentaurus Visual - New TCAD
Visualization Platform
• Visualization product for 1D, 2D and 3D plots and
structures generated by all TCAD tools

© Synopsys 2013 48
Sentaurus Visual - Enhanced GUI
• Better utilization of GUI real estate

Adjustable
Frame Size

Dockable
Frames

© Synopsys 2013 49
Sentaurus Visual - Tcl Scripting Interface

• Powerful TCL
Interface

• Consistent with
Scripting
Capabilities in
other Sentaurus
TCAD tools

Active TCL
Command Window
TCL Script For
Corresponding Saving TCL
GUI Action Script to File

© Synopsys 2013 50
Sentaurus TCAD
Radiation Analysis

© Synopsys 2013 51
Radiation Environment

• Single Event
– Due to single ionizing particle (alpha particle, heavy ion or neutron) ,
generation of electron-hole pairs in semiconductors
– Leading to Soft-Error as Single Event Upset (SEU)
– Leading to Hard-Error as Single Event Gate Rupture (SEGR), Latch-
Up (SELU) or Breakdown (SEB)

• Total Dose
– Due to long radiation exposure (nuclear power, aerospace), resulting
in trapped carriers in insulators
– Leading to performance degradation (increased leakage current,
threshold voltage shift)

© Synopsys 2013 52
Sentaurus Device Models:
Particle Interaction
• Alpha Particles
– Analytical description of the carriers generation depending on the
incident particle energy
– 3D cylindrical distribution
• Heavy Ion
– Analytical description of the carriers generation depending on the
incident ion
– Spatially defined charge description through LET
– 3D cylindrical distribution

© Synopsys 2013 53
2D vs 3D Description of Charge Track

2D Extrusion: Full 3D:


Unphysical Track Realistic Track

+ +
+++ +++
++ ++
++ +++
++ ++
++
+
++
+ +
+ +
++ +
+

© Synopsys 2013 54
Sentaurus Device Heavy Ion Model
Electron-hole generation rate: G(l , w, t )  T (t )  R(w, l )  GLET (l )

  t  time  2 
2  exp        w 
  shi  
T (t )  

   wt (l ) 
R( w, l )  e  w  
GLET (l )  a1  a2  l  a3e a4 l  k  c1  (c2  c3  l ) c4  LET _ f (l ) 
 time    
e  wt (l ) 
shi  1  erf   
 
  hi  
s

time Bragg peak

s wt
Rate

Rate

Rate
0 1 2 3 4 5 6 0
0
Time Radial distance
Distance along track

© Synopsys 2013 55
Simulation of Charge Track

Physics { Recombination ( SRH(DopingDep) )


HeavyIon (
Direction = (0,0,1)
Location = (0.5,0,0.7)
Time = 1.0e-13
Length = [1e-4 1.5e-4 1.6e-4 1.7e-4]
LET_f = [1e6 2e6 3e6 4e6]
wt_hi = [0.3e-4 0.2e-4 0.25e-4 0.1e-4]
Exponential )
}
Lmax

w(L)

© Synopsys 2013 56
Models for Total Dose Radiation

• Electric-Field Dependent Yield Function


• Self-Consistent Trapping Kinetics in Oxide:
– Standard V-model based on carrier concentration
– Proprietary J-model based on carrier current
• Spatial Distribution of Traps
– Region or interface-wise
– User defined profile
• Arbitrary Energy Spectra of Traps
• Electric-Field Dependent Cross Section
• Thermal Ionization of Traps

© Synopsys 2013 57
Mixed-Mode Simulation

• Sentaurus Device is a device and circuit simulator


• Allows numerical devices to be embedded in SPICE netlist

© Synopsys 2013 58
Mixed-Mode Compact Models

• Standard SPICE Models


– BJT
– Berkeley SPICE 3 Version 3F5 models
– BSIM1, BSIM2, BSIM3, BSIM4
– B3SOI
– MESFET

• User-Defined
– Compact model interface (CMI) available for user-defined models.
– Implemented in C++ and linked to executable at run-time

© Synopsys 2013 59
Sentaurus Advantages for Rad-Hard

• 1D / 2D / True 3D
• DC, AC, Transient
• Most Advanced Transport Models in Semiconductors
and Insulators
• Mixed-Mode: Numerical and SPICE Models
• Robust Numerical Algorithms
• Parallel Solvers
• Dynamic Memory Allocation
• Physical Model Interface

© Synopsys 2013 60
2D Application Examples

© Synopsys 2013 61
Total Dose Effect: SOI nMOSFET
SOI nMOS transistor structure Drain current vs.
irradiation time

The leakage current increases with the dose and drain


bias showing electric field dependence

© Synopsys 2013 62
Total Dose Effect: SOI nMOSFET
Electron Current Density in SOI Device after Irradiation

Expected back-channel in irradiated SOI nMOS devices is observed

© Synopsys 2013 63
Total Dose Effect: SOI nMOSFET
Trapped Hole Distribution in Irradiated Device

Because of self-consistent and field-dependent trapping kinetics,


trapped hole distribution strongly depends on electric field

© Synopsys 2013 64
Total Dose Effect: SOI nMOSFET
Transient Evolution of Trapped Hole Density after Irradiation

Sentaurus Device enables the modeling of de-trapping,


depending on the energetic distribution of traps

© Synopsys 2013 65
3D Application Examples

© Synopsys 2013 66
Structure Generation

Loaded Layout Resist for STI Silicon etching

STI formation (oxide filling) and


Polysilicon / gate oxide generation Metal generation for contacts Final boundary structure

© Synopsys 2013 67
Doping Definition

• Constant doping profile in


Polysilicon and Pwell
• Analytical doping profile
(Gaussian) in the Source/Drain
of NMOS and PMOS Transistors
• Analytical doping profile
(Gaussian) in the channel of
NMOS and PMOS Transistors
• Analytical doping profile
(Gaussian) in the access drain
(bit line) and access gate (word
line).

© Synopsys 2013 68
Meshing
• Meshing strategy:
• Refinement on doping (junctions
refinement)
• Refinement at Silicon / Gate Oxide
interface
• Refinement in the channel of NMOS
and PMOS Transistors.
• Relaxed mesh inside the substrate

• Mesh statistics:
• Mesh nodes number: 31825
• Meshing time: 114 s

© Synopsys 2013 69
Bit Flipping

• At t=1e-13s
Vds(nmos2)=1.5V and
Vds(nmos1)=0V.

• The peak of the Gaussian


Distribution of Heavy ion is at
1e-11s.

• At t=1e-8s, Vds(nmos1)=1.5V
and Vds(nmos2)=0V.

• The SRAM cell switched


states

Node voltages versus time for NMOS drains as a result of a single event
strike. The SRAM cell switched states

© Synopsys 2013 70
Generation Rate from Particle Strike

T=10ps T=15ps T=20ps

T=40ps T=80ps T=160ps

© Synopsys 2013 71
Dependence on Impact Points
• The heavy ion direction is set
to (0, 0, -1).

• Four different heavy ions impact


points are simulated:

• Source NMOS2

• Source PMOS2

• Drain PMOS2

• Oxide

• The SRAM cell does not


switches states anymore for
impact points in Source &
Drain PMOS2 and in the oxide.
Node voltages versus time for NMOS drains as a result of a single event
strike. Depending on the impact point ,the SRAM cell switched states

© Synopsys 2013 72
Total Dose Effect: 3D SOI nMOSFET
Trapped Hole and Electron Current Distributions in 3D SOI
nMOS after 300kRad Irradiation

Expected trapped hole profile in the buried oxide


and induced back-channel are observed in 3D

© Synopsys 2013 73
Total Dose Effect: 3D nMOS w/ LOCOS
Noffset meshing of 3D Trapped hole density
MOS with LOCOS after 10kRad irradiation

Noffset3D, normal offsetting mesh, creates fine grid


along the interfaces where traps are located

© Synopsys 2013 74
Total Dose Effect: 3D Trench MOSFET
Threshold Voltage Shift

Geometry and Doping Drain Current vs. Gate Voltage

© Synopsys 2013 75
CMOS SOI
SEU: SOI SRAM Cell Upset

Voltage response for


3D charge deposition profile different ion energies

SEU can be accurately modeled using a mixed-mode approach


including part of the system as SPICE elements

© Synopsys 2013 76
SEU: 3D SRAM Cell Upset
3D SRAM structure Node voltage response
for 2 heavy ion energies

As expected, the three dimensional SRAM flips depending on the


incident particle energy, the ion strikes into the drain of the off-nMOS

© Synopsys 2013 77
SEU: CMOS Inverter Latch-up
CMOS inverter Current response for Ion impact on
structure 2 LETs CMOS structure

Because of parasitic bipolar effects in CMOS structure, the


device latches up when incident particle energy is high enough

© Synopsys 2013 78
Thank You

© Synopsys 2013 79

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