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DVLSI Assignment

This article discusses the trends in power consumption of VLSI semiconductor chips over the years, highlighting the increase in dynamic power consumption due to advancements in technology. It emphasizes the challenges of managing power as transistor counts rise, in line with Moore's law, and mentions corrective measures such as reducing supply voltage and load capacitance. The report provides an analysis of power consumption in terms of dynamic and static components.

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Arnab Mallick
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9 views2 pages

DVLSI Assignment

This article discusses the trends in power consumption of VLSI semiconductor chips over the years, highlighting the increase in dynamic power consumption due to advancements in technology. It emphasizes the challenges of managing power as transistor counts rise, in line with Moore's law, and mentions corrective measures such as reducing supply voltage and load capacitance. The report provides an analysis of power consumption in terms of dynamic and static components.

Uploaded by

Arnab Mallick
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Trend In Power Consumption of VLSI (Very

Large-Scale Integration) Semiconductor Chips


Over the Years.
Arnab Mallick
MTech Microelectronics & VLSI
Indian Institute of Science
Bengaluru, India
[email protected]
Faculty: Dr Viveka Konandur Rajanna, Assistant Professor, DESE, IISC Bangalore

Abstract— This article presents chronological From the plot we can see that with advances in
trends in power consumption which has been semiconductor technology the overall dynamic
observed in VLSI chips over the years. power consumption in VLSI chips got increased.
But in order to mitigate that, corrective
I. Introduction measures like reduction in VDD and load
Power has always been a critical parameter in capacitance has been taken into account as
VLSI chip design. Since the inception of well.
semiconductor chips, it has been a big
challenge to control the power of the chip as
the number of transistors increases in REFERENCES
conformity of Moor’s law. This report portrays [1] J. S. Kilby, “The Integrated Circuit's early
the trend in power consumption for typical VLSI history,” Proceedings of the IEEE, vol. 88, no. 1,
chips over the years for semiconductor pp. 109–111, 2000. J. Clerk Maxwell, A Treatise
industry. on Electricity and Magnetism, 3rd ed., vol. 2.
Oxford: Clarendon, 1892,
II. Analysis pp.68–73.
The power of VLSI chips are measured in watts, [2] I R. R. Schaller, “Moore's law: Past, present
which represents the amount of dynamic and and future,” IEEE
static power consumed in a VLSI chip. Dynamic Spectrum, vol. 34, no. 6, pp. 52–59, 1997.
power component comes into picture when in [3] https://www.researchgate.net/figure/The-
CMOS chip charging and discharging happens power-dissipation-trend-of-integrated-
through PMOS & NMOS respectively. Static circuits_fig1_340618845
power comes into power if there is direct
conducting path from VDD to ground rail.

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