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Mid 3

The document outlines the structure and content of the Mid Term Examinations for the M. Tech in Low Power VLSI Design at GITAM School of Technology, Hyderabad. It includes two parts: Part 1 consists of five short answer questions worth 10 marks, while Part 2 allows students to choose two out of three longer questions worth 20 marks. The exam focuses on topics related to subthreshold operation in VLSI design, including inverter characteristics, SRAM challenges, and energy efficiency.

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Chetan Cherry
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20 views1 page

Mid 3

The document outlines the structure and content of the Mid Term Examinations for the M. Tech in Low Power VLSI Design at GITAM School of Technology, Hyderabad. It includes two parts: Part 1 consists of five short answer questions worth 10 marks, while Part 2 allows students to choose two out of three longer questions worth 20 marks. The exam focuses on topics related to subthreshold operation in VLSI design, including inverter characteristics, SRAM challenges, and energy efficiency.

Uploaded by

Chetan Cherry
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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GITAM School of Technology – Hyderabad Campus

MID Term Examinations-III

Branch/Semester: M. Tech/I Date: 29-11-2024


Course Code:19EEC770 Course Name: Low Power VLSI Design
Max. Marks: 15 Exam Duration: 60 min
=======================================================================

Part 1

Answer all the questions (5 x 2 Marks = 10


Marks)

1 Question CO PO BL
a Why does an inverter in subthreshold mode exhibit exponential 4 1 1
delay dependency?
b How does an inverters voltage transfer characteristic change in the 4 2 1
subthreshold region?
c What are the main challenges of designing SRAM for subthreshold 5 2 1
operation?
d What is static noise margin (SNM) in SRAM, and why is it 5 4 1
important?
e How can sense amplifier circuits be optimized for energy efficiency 5 3 1
in subthreshold SRAM?

Part 2

Answer any 2 from the following. (2 x 10 Marks = 20 Marks)

Question CO PO BL
2 Discuss the CMOS inverter operation in sub-threshold region with 4 2 4
its VTC.
3 Explain how to reduce the power in write driver circuit using 5 3 4
domino NOR decoder.
4 Explain the impact of reducing voltage swings on bit lines in sub- 5 2 4
threshold SRAM on overall power consumption.

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