VRS COLLEGE OF ENGINEERING AND TECHNOLOGY

ARASUR
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
EC 3301 - Electronic Devices and Circuits

UNIT II
TRANSISTORS AND THYRISTORS
BJT, JFET, MOSFET – Structure, operation, characteristics and Biasing UJT, Thyristors and IGBT –
Structure and characteristics.

1. What is a Transistor?
Transistor is a semiconductor device that can amplify electronic signals such as radio and
television signals. Transistor consists of two junctions formed by sandwiching either P type or
N-type semiconductor between a pair of opposite types.
2. Why an ordinary transistor is called bipolar?
The operation of the transistor depends on both majority and minority carriers. So, a
transistor is called a bipolar device.
3. Why transistor is so called?
 It is named as transistor which is an acronym of two terms: “transfer-of-resistor.”
 It means that the internal resistance of transistor transfers from one value to another
values depending on the biasing voltage applied to the transistor.
 Thus it is called TRANSfer- resISTOR: i.e. TRANSISTOR.
4. What are the advantages of transistor over the vacuum tube?
Transistor has the following advantage than the vacuum tube such as,
 Smaller in size
 No filament and no need of power for heating filament
 Low operating voltage
 Higher efficiency
5. What are the types of transistor?
The types of transistor are,
 Unipolar Junction transistor (UJT)
 Bipolar Junction transistor (BJT)
6. What is a Bipolar Junction Transistor?
A Bipolar Junction Transistor is a three terminal semiconductor device in which the
operation depends on the interaction of both majority and minority carriers.

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7. Mention the applications of BJT.
The applications of BJT are:
 Used in amplifiers and oscillators
 Used as a switch in digital circuits
 Used in computers and satellites
8. What are the types of Bipolar Junction Transistor?
The two types of Bipolar Junction Transistor are,
 NPN transistor
 PNP transistor
9. What is NPN transistor?
In NPN transistor, P-type semiconductor is sandwiched between two n-type
Semiconductors. The emitter region is made up of N-type semiconductor, base region is made of
P-type semiconductor, and collector region is made of N-type semiconductor.
10. What is PNP transistor?
In PNP transistor, N-type semiconductor is sandwiched between two p-type
semiconductors. The emitter region is made up of P-type semiconductor, base region is made of
N-type semiconductor, and collector region is made of P-type semiconductor.
11. Why BJT is called a current controlled device?
The output voltage, current, or power is controlled by the input current in a transistor. So it
is called the current controlled device.
12. What are the three terminals in a BJT?
The three terminals in BJT are,
 Emitter (E)
 Collector (C)
 Base (B)
13. Enumerate the function of Emitter.
Emitter main function is to supply majority charge carriers. The emitter is always forward
biased with respect to the base so that it is able to supply majority charge carriers to the base.
The emitter is heavily doped so that it may be able to inject a large number of charge carriers.
14. What is the function of collector?
Collector main function is to collect majority charge carriers. Collector is always reverse
biased so as to remove the charge carriers away from its junction with the base. It is moderately
doped.
15. What is the function of base?

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 Base is the middle section of the transistors and is very lightly doped. It is very thin so that it
may pass most of the injected charge carriers to the collector.
16. Collector region of a transistor is larger than emitter. Why? [May/June 2007, 2012]
Collector is made physically larger than emitter and base, because collector dissipates more
Power than emitter
17. Will a transistor result if two diodes are connected back to back?
A transistor has two p-n junctions. One junction is between the emitter and the base and is
called emitter base junction and the other junction is between the base and the collector and is
called collector base junction. Thus transistor is like two PN junction diodes connected back to
back.
18. What is biasing? What is the need for biasing? [May/June 2014, Dec 2014] (OR) What
are the requirements for biasing circuits? (Nov/Dec 21)
 Applying external voltage to a transistor is called biasing. In order to operate transistor
properly as an amplifier, it is necessary to correctly bias the two PN junctions with
external voltages.
 In a transistor, emitter-base junction is forward biased and collector-base junction is
reverse biased.
19. Define the different operating regions of transistor.(Or) Recall the biasing arrangement
for an NPN transistor to operate in cut off and saturation region.(May 2023)
The operating regions of transistor are
Active region - EB junction is forward biased
CB junction is reverse biased
Cut-Off region - EB junction is reverse biased
CB junction is reverse biased
Saturation region - EB junction is forward biased
CB junction is forward biased
20. What do you mean by configuration? What are the types of transistor configuration?
The way in which transistors are connected in a circuit is called as configuration. There are
three types of transistor configuration such as
 Common base (CB) configuration
 Common Collector (CC) configuration
 Common Emitter (CE) configuration
21. Explain about the characteristics of a transistor.
Input characteristics: It is drawn between input voltage & input current while keeping
Output voltage as constant.
Output characteristics: It is drawn between the output voltage & output current while

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 Keeping input current as constant.
22. Define Early effect. [Dec 2009,16] [May 11]
In the common Base characteristics of BJT when reverse bias voltage VCB increases, the
width of the depletion region also increases. This reduces the efficient base width. This effect is
called "Early Effect" or "Base width modulation".
23. What are the consequences of early effect? [June 2010]
The Early effect has three consequences.
 There is less chance of recombination within the base region.

 The charge gradient is increased within the base and consequently the current of the minority
carriers injected across the junction increases.

 For extremely large voltages, the effective base width may be reduced to zero, causing
breakdown in the transistor. This phenomenon is called the punch through.
24. Define Punch through (or) Reach through.
For extremely large reverse voltage, the effective base width may be reduced to zero, causing
voltage breakdown in the transistor. This phenomenon is called Punch Through (or) Reach
Through.
25. Define large-signal current gain.
The large signal current gain of a transistor is defined as the ratio of the negative of the collector
current increment to emitter current change from cut off.

i.e. magnitude of ICBO is negligible when compared to IE. so α = Ic/Ie

26. Define D. C. current gain.
The D.C. current gain is defined as the ratio of the collector current IC to the base current IB.
27. Which is the most commonly used transistor configuration? Why?
The CE configuration is most commonly used. The reasons are due to:
 High current gain
 High power gain
 High voltage gain
 Moderate input to output ratio.

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28. Draw the characteristics of CE transistor

29. Define the term current amplification factor (α). (May 2011)
α is defined as the ratio of the collector current resulting from carrier injection to the total emitter
current. Current amplification factor,

30. Define the term current amplification factor (β).

β is defined as the ratio of collector current to base current.
Current amplification factor,

31. In a CB Transistor Circuit, the Emitter Current is 10mA, Collector Current is 9.8mA.Find
The Base Current (Ib).
Given:
Emitter Current I E  10 mA ; CollectorC urrent I C  9 . 8 mA

WKT,
IE  IB  IC

 IB  IE  IC
3 3
 10 * 10  9 . 8 * 10
3
I B  0 . 2 * 10

 Base current I B  0 . 2 mA

32. The common base DC current gain of a transistor is 0.967, if IE=10mA. Find base current
Given:
Emitter Current I E  10 mA ; DC current gain   0 . 967

WKT,

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 IE  IB  IC

 IB  IE  IC

To find I C :

IC
   I C   I B
IE

3
I C  0 . 967 * 10 * 10

I C  9 . 67 mA

 I B  10 mA  9 . 67 mA

 Base current I B  0 . 33 mA

33. If a transistor has α=0.97, Find the value of β. If β=200, find α?

Solution:
DC current gain   0 . 97 ;   200
Given:
case (i):
 0 . 97
If   0.97,     32 . 33
1 1  0 . 97

case (ii):
 200
If   200 ,     0 . 995
1  1  200

34. What is meant by thermal runaway (Dec 2017 , Dec 2019)

The excess heat produced at the collector base junction may even burn and destroy the
transistor. This causes damage to the device. The phenomenon is called thermal runaway.

35. List out the various biasing circuits for BJT (Dec 08, 11)
Fixed bias circuit
Emitter bias circuit
Voltage divider bias circuit
Collector to base bias circuit
36. What is meant by operating point or Q-point?
 In order to produce distortion-free output in amplifier circuits, the supply voltages and
resistances in the circuit must be suitably chosen.
 These voltages and resistances establish a set of D.C. voltage VCEQ and ICQ to operate
the transistor in the active region.
 These voltages and currents are called quiescent values which determine the operating
point or Q-point for the transistor.

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37. Calculate the values of Ic and Ie if α=0.97 and Ib = 50µA. determine β for the device.
β = (α/1-α)
β = 32.33,
β = Ic/Ib , Ic = 1.616 mA
Ie = Ib +Ic , = 1.616mA

38. Calculate the values of Ic and Ie if α=0.99 and Ib = 150µA. determine β for the device.
(Dec 2015)
𝛼
We know that 𝛽=
1− 𝛼
0.99
= = 99
1−0.99
𝐼𝐶 = 𝛽. 𝐼𝐵
= 99 x 150 x 10-6
= 14.85 mA
𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶
= 14. 85 mA + 150 µA
= 15mA

39. Why collector region of a transistor is larger in area than emitter region? (May 2012)
Collector is made physically larger than emitter and base, because collector dissipates more power
than emitter.
40. What is FET?
The FET is a device in which the flow of current through the conducting region is controlled by
an electric field.
41. Why FET is called a voltage controlled device?
The current from source to drain can be controlled by the voltage on the gate terminal. That is,
the current flowing through the JFET can be controlled by the application of voltage at gate
terminal. Therefore, FET is called as a Voltage controlled device.
42. What are the features of FET?
Its operation depends upon the flow of majority carrier only. So, it is called unipolar device.
 It is relatively immune to radiation and good thermal stability.
 It exhibits a high input resistance, typically in mega ohms.
 It is less noisy than a tube of a bipolar transistor.

43. What are the types of FET?

There are two basic types of FET,
 Junction Field Effect Transistor (JFET).

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  Metal Oxide Semiconductor Field Effect transistor (MOSFET) (or) Insulated Gate
Field Effect Transistor (IGFET)
44. Define Pinch off region. [Nov/Dec-2006]
When the gate to source voltage (VGS) is increased further, a stage is reached at which two
depletion regions touch each other. It is called as “Pinch off region”. This reduces the drain
current to zero.
45. Mention the three regions that are present in the drain to source characteristics (Dec 04)
 Ohmic region
 Pinch – off or saturation or amplifier region
 Breakdown region
46. What are the parameters which determine the drain current?
The magnitude of drain current depends on,
 The number of majority carriers (electrons) available in the channel, the
conductivity of the channel.
 The length (L) of the channel.
 The cross-sectional area (A) of the channel.
 The magnitude of the applied voltage VDS .
47. Define Pinch off voltage. [Nov/Dec-2006, 07, 08, 09] [May/June-2005]
At the drain to source voltage corresponding to point B, the channel width is reduced to a
minimum value and is known as “Pinch-off”. The drain to source voltage at which the channel
pinch off occurs is known as pinch off voltage (VP).
48. List the characteristics of JFET.
There are two important characteristics of JFET,
 Transfer characteristics
 Drain characteristics.
49. Define transfer characteristics in JFET.
Transfer characteristics represent the relation between gate source voltage (VGS) and drain
current ID at constant drain source voltage (VDS).
50. Define drain characteristics.
The drain characteristics represents the relation between the drain current, ID and the drain to
source voltage VDS at constant VGS.
51. List the characteristics parameters of JFET. (MAY 08)
The parameters of JFET are,
(i) Transconductance (gm) or Mutual conductivity.
(ii) Drain resistance (rd)

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 (iii) Power dissipation (PD)
(iv) Amplification factor (μ)
52. Define transconductance.
Transconductance is the ratio of a small change in the drain current to the corresponding small
change in the gate voltage at a constant drain voltage.
 I D  I D
gm     , V DS   he l d cons tan t
 
  V GS  V DS  V GS

53. Define drain resistance.

Drain resistance is the ratio of a small change in the drain voltage to the corresponding small
change in the drain current at a constant gate voltage; it has the unit of resistance in ohms.
  V DS   V DS
rd     , V GS    cons tan t
 
 I D  V GS I D

54. Define drain conductance.

The reciprocal of drain resistance (rd) is the drain conductance (Gd). It is also called the output
conductance
 iD
gd  , where, V GS  cons tan t
 V DS

55. Define Amplification Factor.

Amplification factor is the ratio of the small change in the drain voltage to the corresponding
small change in the gate voltage at constant drain current.
 V  V
    I D   ; I D     cons tan t
DS DS

  V GS 
 V GS

56. List the applications of JFET.

The applications of JFET are,
 Used as variable resistors in operational amplifier.
 Used as buffer in measuring instruments and receivers.
 Used in cascade amplifiers in measuring and testing equipments.
 Used in mixer circuits in FM and TV receivers.
 Used in computers.
57. Write the use of JFET as a voltage variable resistor? (nov/dec-2019)
One of the applications of the voltage variable resistor (JFET) is to vary the gain of a multistage
amplifier, as a signal level is increases. This action is called Automatic Gain Control
58. COMPARISON OF JFET AND BJT (Dec 2014, May 2015, 18)

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 BJT (Bipolar Junction Transistor) JFET (Junction Filed Effect Transistor)
 Operation depends on both majority  Its operation depends only on majority
and minority carriers. Therefore, it is a carriers.Therefore, JFET is a unipolar
Bipolar device. device.
 Noise is high  Less noisy than BJT.
 Very high input impedance and low  Low input impedance and high output
output impedance. impedance.
 It is a current controlled device.  It is a voltage controlled device.
59. List out the various biasing circuits for FET ( May 12)
Fixed bias circuit
Emitter bias circuit
Voltage divider bias circuit
60. Draw the small signal equivalent circuit of FET. (Dec 04, 09)

61. Draw the small signal equivalent circuit of CS JFET (Dec 2015)

62. Mention the advantages of BJT compared to FET (Dec 2017)

 Relationship between input and output is linear in BJT but FET it is non linear.
 Gain bandwidth product is high in BJT than FET.

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63. Draw the transfer and drain characteristics curves of JFET. ( MAY 2016)

64. A transistor has a typical 𝜷 of 100. If the collector current is 40mA, what is the value of
emitter current? (May 2017)

𝐼𝐶
𝐼𝐵 =
𝛽
40 𝑚𝐴
= = 0.4 mA
100
𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶
= 0.4 mA + 40mA
= 40.4 mA
65. State the advantages of FET over BJT. (De 2017)
 Input resistance is high compared to BJT
 FET construction is smaller than BJT, thus making them useful in integrating circuits.
 Thermal stability is more for FET than BJT.
 Thermal noise is much lower than BJT
66. Write down the Shockley’s Equation or Drain current Equation.
The drain current equation is given by,
2
 V GS 
I D  I DSS 1  
 
 VP 
Where,
IDSS—Saturation drain current when VGS=0.
VP—Pinch off voltage.
VGS--Gate source voltage.
67. What is MOSFET? (May 2012)

MOSFET is a three terminal device. The terminals are source, gate and drain. The gate of a
MOSFET is insulated from the channel. Because of this, the MOSFET is also known as IGFET.

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 68. What are types of MOSFET?
There are two types of MOSFET,
 Depletion MOSFET
 Enhancement MOSFET
69. Mention the advantages of MOSFET over JFET. [Nov/Dec-2010, 2017]
The advantages of MOSFET over JFET are:
 Gate of a MOSFET is insulated from the channel.
 PN junction is eliminated in MOSFET.
 JFET does not operate for positive values of gate-to-source voltage.
70. Write the working principle of MOSFET?
MOSFET works on the principle that by applying a transverse electric field across an insulator
deposited on the semiconducting material the thickness and hence the resistance of a conducting
channel of a semiconductor material can be controlled.

71. Draw the drain characteristics of enhancement and depletion MOSFET.

72. Write the applications of MOSFET.

 MOSFET can be used in medium speed applications.
 Because of its high impedance, it can be substituted in vacuum tube circuit designs.
 They are also useful in switching applications
73. Comparison between JFET and MOSFET: (May 2016)
S.No Parameter N-channel FET P-Channel FET
1. Mode of operation Depletion mode Depletion mode or
enhancement mode
2. Input resistance High Very high

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3. Drain resistance High Low
4. Gate current Large Very large

74. Comparison of BJT with MOSFET: (May 2014)

S.No Parameter BJT MOSFET
1. Configurations CE,CB,CC CS,CG,CD
2. Input resistance Low (compared to Very high
JFET)
3. Control element Current controlled Voltage controlled device
device
4. Current conduction Bipolar device Unipolar devices

75. What is channel length modulation? (May 2012)

In MOSFET characteristics a non zero slope exists beyond the saturation point. So in the
saturation region the effective channel length decreases and this phenomenon is called channel
length modulation.
76. What does UJT stands for? Justify the name UJT.
 UJT stands for uni junction transistor.
 The UJT is a three terminal semiconductor device having two doped regions.
 It has one emitter terminal (E) and two base terminals (B1and B2).
 It has only one junction and it resembles to a transistor hence the name uni-junction transistor.
77. What is inter base resistance of UJT?
The resistance between the two bases (B1 and B2) of UJT is called as inter base resistance. The
inter base resistance is given by,
R BB  R B 1  R B 2

Where, RB1-Resistance of Silicon bar between B1 and emitter junction.

RB2-Resistance of Silicon bar between B2 and emitter junction.

78. What is meant by intrinsic stand-off ratio April/May 2023

The ratio between emitter to base 1 resistance (RB1) and the total resistance (RBB) is called as
intrinsic stand-off ratio. It is given by,
R B1 R B1
  
R B1  R B 2 R BB

 is intrinsic stand off ratio.

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  The value of  ranges from 0.56 to 0.75.
79. Draw the equivalent circuit of UJT (Dec 2017)

80. Differentiate BJT and UJT.

BJT-Bipolar Junction Transistor UJT-Uni-Junction Transistor
It has two PN junctions. It has only one PN junctions.
Three terminals present are emitter, base and Three terminals are emitter, base1 and
collector base2.
Basically an amplifying device. Basically a switching device

81. Define holding current in a SCR.

Holding current is defined as the minimum value of anode current to keep the SCR in ON state.
82. What is meant by latching ?(Apr/May-2019)
The ability of SCR to remain conducting even when the gate signal is removed is called
as latching.
83. Draw the two transistor model of SCR (May 2017)

84. What is a thyristor? Mention two of them (May 2015)

A thyristor is a semiconductor device whose switching action depends on internal regenerative
feedback. Unlike BJT’s and FET’s a thyristor can be operated only as a switch. A thyristor can be
two terminal, three terminal or four terminal, unidirectional or bidirectional device

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  Silicon controlled rectifier (SCR)
 Gate turn off thyristor (GTO)
 Diac
 Triac
85. Show how an SCR can be triggered on by the pulse to the gate terminal (Dec 15)
 Consider that the voltage is applied between gate and cathode when SCR is in forward
blocking state.
 The gate is made positive with respect to the cathode.
 The electrons from n – type cathode which are majority in number, cross the junction J 3 to
reach to positive of battery.
 While holes from p type move towards the negative of battery, this constitutes the gate current.
 This current increases the anode current as some of the electrons cross junction J2 .
 As anode current increases, more electrons cross the junction J 2 and the anode current
increases.
 Due to regenerative action, within short time, the junction J2 breaks and SCR conducts heavily.

86. What is breakover voltage in SCR (April / May 2018)

 Forward break over voltage of SCR is the minimum forward voltage at which SCR starts
conducting.
 If gate is supplied by a positive current then forward breakover voltage occurs earlier than
no gate current condition.
87. FET has lower thermal noise than BJT-justify. (April / May 2019 )
 FET has very low charge carriers cross the junction. because FET has positive temperature
coefficient resistivity.
 If temperature increases its drain resistance also increases,reducing the drain
current.Thus,unlike BJT, thermal runaway does not occur with FET.
88. What is meant by negative resistance region of UJT? (Nov/Dec 21)
UJT possesses negative resistance characteristic as with the increase in emitter current
voltage decreases. In order to turn off the device, a negative pulse is then needed
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89. When Vgs of a JFET changes from -3.1V to -3V,the drain current changed from 1mA to
1.3 mA.Find the value of transconductance.
∆VGS =0.1 V, ∆ID =0.3 mA
∆ID 0.3 𝑥 10^−3
gm= = =3 mA fV
∆VGS 0.1

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 16 MARKS(Q&A)

1. Explain the input and output characteristics of BJT in common emitter configuration (Nov/Dec 2020)
 A bipolar junction transistor (BJT) is a three terminal semiconductor device.
 Its operation depends on the interaction of both majority and minority carriers and hence the
name bipolar.
 The operation of the transistor depends on both majority and minority carriers. So, a transistor
is called a bipolar device.
 The output voltage, current, or power is controlled by the input current in a transistor. So it is
called the current controlled device. This is the basic principle of the BJT.
Advantages of BJT:
Transistor has the following advantage than the vacuum tube such as,
 Smaller in size
 No filament and no need of power for heating filament
 Low operating voltage
 Higher efficiency
Applications of BJT:
 In amplifiers and oscillators.
 As a switch in digital circuits.
 In computers, satellite.
 It can be used as amplifier and logic switches.

2.11 TRANSISTOR CONSTRUCTION:

BJT consists of three terminals:
 Collector (C)
 Base (B)
 Emitter (E)
Emitter:
 Emitter main function is to supply majority charge carriers.
 The emitter is always forward biased with respect to the base so that it is able to supply
majority charge carriers to the base.
 The emitter is heavily doped so that it may be able to inject a large number of charge
carriers.
Base:

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  Base is the middle section of the transistors and is very lightly doped.
 It is very thin so that it may pass most of the injected charge carriers to the collector.
Collector:
 Collector main function is to collect majority charge carriers.
 Collector is always reverse biased so as to remove the charge carriers away from its
junction with the base.
 It is moderately doped.
 Collector is made physically larger than emitter and base, because collector dissipates
more power than emitter.
2.12 Junctions of transistor:
A transistor has two p-n junctions.
 One junction is between the emitter and the base and is called emitter base junction and
the other junction is between the base and the collector and is called collector base
junction.
 Thus transistor is like two PN junction diodes connected back to back.
2.13 TYPES:
There are two types of bipolar transistors,
 NPN transistor and
 PNP transistor.
Sl. NPN Transistor PNP Transistor
No
1 In NPN transistor a thin layer of P-type In PNP transistor a thin layer of N-type silicon
silicon is sandwiched between two layers of is sandwiched between two layers of P-type
N-type silicon. silicon.
2 The emitter region is made up of N-type The emitter region is made up of P-type
semiconductor, base region is made of P-typesemiconductor, base region is made of N-type
semiconductor, and collector region is made semiconductor, and collector region is made
of N-type semiconductor of P-type semiconductor.

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3

4 The symbolic representation of the NPN is The symbolic representation of the PNP is

2.14 Operating regions of transistor:

The operating regions of transistor are
Active region - EB junction is forward biased
CB junction is reverse biased
Cut-Off region EB junction is reverse biased
CB junction is reverse biased
Saturation region EB junction is forward biased
CB junction is forward biased
Inverse active region EB junction is reverse biased
CB junction is forward biased

2.15 OPERATION OF AN NPN TRANSISTOR:

 Because of the forward bias applied to the emitter base junction, the majority carriers
(electrons) in the emitter (N-type) are repelled and these electrons move towards base.
 As the base is lightly doped with P-type, a very small number of holes in P-type combine with
a very small number of electrons (coming from emitter) and produces a very small base current
(IB).

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  The remaining electrons (more than 95%) cross over into the collector region. As the collector
base junction was reverse biased, the electrons in the collector are attracted by the supply and
results in a collector current (IC)

 Thus, the emitter current is the sum of IC and IB, since the direction of emitter current is
opposite to the supply (FB).
 I E   I C  I B 
2.15 OPERATION OF PNP TRANSISTOR

 Due to the forward bias applied to the emitter base junction, the majority carriers (holes) in the
emitter (P-type) are repelled and these holes move towards base.
 As the base is lightly doped with N-type, a very small number of electrons in N-type combine
with a very small number of holes (coming from emitter) and produces a very small base
current (IB).
 The remaining holes (more than 95%) cross over into the collector region.
 As the collector base junction is reverse biased, the holes in the collector are attracted by the
supply and results in a collector current (IC).
 IE  IB  IC

20
2.16 CONFIGURATION OF TRANSISTOR CIRCUIT:
 A transistor is a three terminal device. But require ‘4’ terminals for connecting it in a circuits.
2 terminals for input, 2 terminals for output.
 Hence one of the terminal is made common to the input and output circuits. Common
terminal is grounded.
 The way in which transistors are connected in a circuit is called as configuration.

TYPES OF CONFIGURATIONS:
Three types of configuration is available,
1. Common base (CB) configuration
2. Common emitter (CE) configuration
3. Common collector (CC) configuration
2.16.1Common base (CB) configuration:
This is also called as grounded base configuration. In this configuration, Base is common
terminal, Emitter is input and Collector is output terminal. This type of transistor arrangement is not
very common due to its unusually high voltage gain characteristics.

The collector current 𝐼𝐶 is given by

𝐼𝐶 = 𝐼𝐶(𝐼𝑁𝐽) + 𝐼𝐶𝐵𝑂
𝑰𝑪(𝑰𝑵𝑱) = It is an injected collector current due to number of electrons crossing the collector base
junction.

21
𝑰𝑪𝑩𝑶 = it is the reverse saturation current flowing due to minority carrier between collector and the
base when the emitter is open. 𝐼𝐶𝐵𝑂 is negligible as compared to 𝐼𝐶(𝐼𝑁𝐽) and therefore we have
𝐼𝐶 ≈ 𝐼𝐶(𝐼𝑁𝐽)
Current amplification factor (or) Current gain 𝛼
o/p current IC
Current gain (  )  
i / p current I E

IC
  
I E

𝐼𝐶(𝐼𝑁𝐽) = 𝛼 𝐼𝐸
𝑉𝑜𝑢𝑡 𝐼𝐶 x 𝑅𝐿
Voltage gain 𝐴𝑣 = =
𝑉𝑖𝑛 𝐼𝐸 x 𝑅𝑖𝑛
𝐼𝐶 𝑅𝐿
Where: is the current gain, alpha (α) and is the resistance gain. The value of α is in the range
𝐼𝐸 𝑅𝑖𝑛
from 0.95 to 0.995 depending on the thickness of base region.
Substituting the value of 𝐼𝐶(𝐼𝑁𝐽)
𝐼𝐶 = 𝛼 𝐼𝐸 + 𝐼𝐶𝐵𝑂
𝐼𝐶𝐵𝑂 is negligible
∴ 𝐼𝐶 = 𝛼 𝐼𝐸
𝐼
𝛼 = 𝐼𝐶
𝐸

The common base circuit is generally only used in single stage amplifier circuits such as microphone
pre-amplifier or radio frequency (Rf ) amplifiers due to its very good high frequency response.
2.16.2 Common emitter (CE) configuration:
Explain the working mechanism of the CE configuration of BJT. April/May 2023
This is also called as grounded Emitter configuration. In this configuration, Emitter is common
terminal, Base is input and Collector is output terminal.

𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶 in amps
Since the electrical relationship between these three currents, 𝐼𝐵 , 𝐼𝐶 and 𝐼𝐸 is determined by the
physical construction of the transistor itself, any small change in the base current ( 𝐼𝐵 ), will result in a
much larger change in the collector current ( 𝐼𝐶 ).

22
 o/p current IC
Current gain (  )  
i / p current IB

IC
  
IB

By combining the expression of 𝛼 and 𝛽

𝐼𝐶 = 𝛼 . 𝐼𝐸
𝐼𝐶 = 𝛽. 𝐼𝐵
𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶
𝐼𝐵 = 𝐼𝐸 - 𝐼𝐶
𝐼𝐶 𝐼𝐶
𝛽= =
𝐼𝐵 𝐼𝐸 − 𝐼𝐶

Dividing the numerator and denominator of R.H.S. of above equation by 𝐼𝐸 , we get

𝛼
𝛽=
1− 𝛼
𝐼𝐶
We know that 𝛼 =
𝐼𝐸

𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶
𝐼𝐶
𝛼=
𝐼𝐵 + 𝐼𝐶

Dividing the numerator and denominator of R.H.S. of above equation by 𝐼𝐵 , we get

𝛽
𝛼=
𝛽+1

This type of bipolar transistor configuration has greater input impedance, current and power gain than
that of the common base configuration but its voltage gain is much lower. The common emitter
configuration is an inverting amplifier circuit. This means that the resulting output signal is 180o “out-
of-phase” with the input voltage signal.
2.16.3 Common collector (CC) configuration:
This is also called as grounded Collector configuration. In this configuration, Collector is
common terminal, Base is input and Emitter is output terminal. The input signal is connected directly
to the base, while the output is taken from the emitter load as shown. This type of configuration is
commonly known as a Voltage Follower or Emitter Follower circuit.
Current relation in common collector configuration
𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶
𝐼𝐸 = 𝐼𝐵 + 𝛼 𝐼𝐸 + 𝐼𝐶𝐵𝑂
∴ 𝐼𝐸 (1- 𝛼) = 𝐼𝐵 + 𝐼𝐶𝐵𝑂
𝐼𝐵 𝐼𝐶𝐵𝑂
∴ 𝐼𝐸 = +
(1− 𝛼) (1− 𝛼)

23
 𝛼
We know that 𝛽=
1− 𝛼
𝛼
1+ 𝛽 = 1 +
1− 𝛼
1
1+ 𝛽 =
1− 𝛼
𝐼𝐸 = 𝐼𝐵 (1 + 𝛽)+ 𝐼𝐶𝐵𝑂 (1 + 𝛽)
Neglecting 𝐼𝐶𝐵𝑂 we have
𝐼𝐸 = 𝐼𝐵 (1 + 𝛽)
𝐼𝐸 𝛼 1
= (1 + 𝛽) = 1+ =
𝐼𝐵 1− 𝛼 1− 𝛼

2.17 CHARACTERISTICS OF BIPOLAR JUNCTION TRANSISTOR

1. Input and Output characteristics of CB configuration:
2. Input and Output characteristics of CE configuration:
3. Input and Output characteristics of CC configuration:
2.17.1 Input and Output characteristics of CB configuration:
1. Explain the construction and operation of NPN transistor with neat sketch. Also comment on
the characteristics of NPN transistor. (Dec 2014)

Explain the input output characteristics of BJT in common base configuration. (May 14)

 Common base configuration circuit is shown in figure. Here base is grounded and it is used as
the common terminal for both input and output.
 It is also called as grounded base configuration. Emitter is used as an input terminal where as
collector is the output terminal.

24
 Input characteristics:
It is defined as the characteristic curve drawn between input voltage and input current whereas output
voltage is constant.
 To determine input characteristics, the collector base voltage VCB is kept constant.
 Keep VCB=0V (by adjusting VCC) and emitter current IE is increased from zero by increasing
VEB (VEB is increased by increasing the input supply voltage VEE).
 This is repeated for higher fixed values (constant) of VCB.
 A curve is drawn between emitter current and emitter base voltage at constant collector base
voltage (VEB) at constant VCB.
 When VCB =0V, as the Emitter Base junctions is forward biased. The junction behaves as an
ordinary PN junction diode.
 Therefore, the input characteristics curve is same as forward biased PN junction diode curve.
 When VCB is increased, the width of the base region decreases. IE increases, therefore cut in
voltage decreases and hence the curve shifted towards left for VCB>1V

2. Sketch and explain the output characteristics of transistor in CB mode. (May 09, 14 Dec 08, May 2023)
Output Characteristics:
 It is defined as the characteristic curve drawn between output voltages VCB and output current
IC whereas input current IE is constant.
 To determine output characteristics, the emitter current IE is kept constant.
 Keep IE=0mA (by adjusting VEE) by increasing VCB, the collector current IC is noted. (VCB is
increased by increasing VCC).
 This is repeated for higher fixed values of IE.
 A graph is drawn between VCB and IC at constant IE.
 From the above graph, it is clear that IC flows even when VCB=0V.

25
  As the emitter base junction is forward biased and collector base junction is reverse biased, the
majority carriers from the emitter (electrons) are injected into the base region. This region is
called active region of the transistor.
 In active region IC is approximately equal to IE and works as an amplifier.
 Due to the action of internal potential barrier at the reverse biased collector base junction, the
electrons flow to the collector region and gives rise to collector (IC) even when VCB=0V.

Early Effect (or) Base width modulation:

 As the reverse bias collector voltage (VCC) increases, the reverse bias applied to the collector-
base junction increases, thus the depletion width between the collector base junction increases.
 This decreases the effective width of base. This effect is called early effect (or) Base width
modulation.
Consequences of early effect:
The Early effect has three consequences.
 There is less chance of recombination within the base region.

 The charge gradient is increased within the base and consequently the current of the minority
carriers injected across the junction increases.

 For extremely large voltages, the effective base width may be reduced to zero, causing
breakdown in the transistor. This phenomenon is called the punch through.

Punch through (or) Reach through:

 For extremely large reverse voltage is applied to the C-B junction, the “base width” is reduced
to zero, causing voltage breakdown in a transistor. It is known as punch trough or reach
through.

26
2.17.2 CE CONFIGURATION:
3. Draw the circuit diagram of NPN transistor CE configuration and describe the static input

and output characteristics. (May 11, 12 Dec 10)

 In common emitter configuration circuit is shown in figure. Here emitter is grounded and it is
used as the common terminal for both input and output.
 It is also called as grounded emitter configuration. Base is used as a input terminal whereas
collector is the output terminal.
 The CE configuration is most commonly used. The reasons are due to:
 High current gain
 High power gain
 High voltage gain
 Moderate input to output ratio

Input Characteristics:
 It is defined as the characteristic curve drawn between input voltages to input current whereas
output voltage is constant.
 To determine input characteristics, the collector base voltage VCB is kept constant.
 Keep VCE=0V (by adjusting VCC) the base current IB is increased by increasing the VBE. (VBE is
increased VBB).
 This is repeated for higher values of VCE.
 A graph is drawn between VBE and IB at constant VCE.
 When VCE=0V, as the emitter base junction is forward biased, the junction behaves as an
ordinary PN junction diode.
 Therefore the input characteristics curve is same as forward biased PN diode curve.

27
  When VCE is increased, the width of the depletion region at the collector base junction
increases, thus the effective width of base decreases.
 This decreases the base current IB. Hence to yet the same value of IB, VBE should be increased.
The curve shits to right if VCE is increased.
4. Explain the three regions of output characteristics of a transistor in CE configuration.
(Dec 08)
Output Characteristics:
 It is defined as the characteristic curve drawn between output voltages to output current
whereas input current is constant.
 Keep I B  0A (by adjusting VBB), by increasing VCE, the collector current (IC) is noted. (VCE
is increased by increasing VCC).
 This is repeated for higher fixed values of IB.
 A graph is drawn between VCE and IC at constant IB.
The output characteristic has 3 basic regions:
Saturation Region:
 The region left to the line 0A of the curves is called saturation region.
 In this region both the junctions are forward biased.
 Here increase in base current does not cause large change in collector current
Cut-off Region:
 The region below the curve IB=0 is called cut-off region.
 When the operating point of the transistor enters the cut-off region, the transistor is OFF.
 Here both the junctions are in reverse bias. The collector current is almost equal to zero.
 The transistor acts as open circuit in this region.

28
Active Region:
 The central region is active region. In this region, the emitter base junction is forward biased,
Collector base junction is reverse biased.
 If a transistor is to be used as a linear amplifier, it should be operated in the active region

2.17.3 CC CONFIGURATION:
Draw the circuit diagram of NPN transistor CC configuration and describe the static input and
output characteristics.

With neat sketches ,explain the input and output characteristicsof an emitter follower.(Nov/Dec
2019)

 Common collector configuration circuit is shown in figure. Here collector is grounded and it is
used as the common terminal for both input and output.
 It is also called as grounded collector configuration. Base is used as an input terminal whereas
emitter is the output terminal.
 The common collector transistor amplifier configuration is called as emitter or voltage
follower. Since it has unity voltage gain and because of its very high input impedance.
 It doesn't draw any input current from the signal. So, the input signal is coupled to the output
circuit without making any distortion.

29
 Input Characteristics:
 It is defined as the characteristic curve drawn between input voltages to input current whereas
output voltage is constant.
 To determine input characteristics, the emitter base voltage VEC is kept constant.
 Keep VEC= a constant voltage (say 2V). The base current (IB) is increased by increasing VBC
(VBC is increased by increasing VBB).
 This is repeated for higher fixed values of VEC.
 A graph is drawn between VBC and IB at constant VEC.

Output Characteristics:
 It is defined as the characteristic curve drawn between output voltage and output current
whereas input current is constant.
 To determine output characteristics, the base current IB is kept constant.
 Keep I B  0A (by adjusting VBB), by increasing VEC, emitter current (IE) is noted. [VEC is
increased by increasing VEE].
 This is repeated for higher fixed values of IB.
 A graph is drawn between VEC and IC at constant IB.

Applications:
 The emitter follower circuit is widely used in electronic instruments because of low output
impedance and high input impedance.

30
  It is used for impedance matching

2.17.4 Comparison of CB, CE and CC Configurations:

5. Compare CB, CE and CC configuration. (Nov 2013, May 2012, 14)

Biasing of BJT

 The transistor can be operated in three regions: cut –off, active and saturation by applying
proper biasing conditions.
 In order to operate transistor in the desired we region we have to apply external d.c. voltages of
correct polarity and magnitude to the two junctions of the transistor. This is nothing but the
biasing of the transistor.
 Biasing is needed to operate transistor in desired region
 And to get the output signal power greater than input signal power.

2.18. Different Biasing Circuits

Explain different types of biasing circuits (Dec – 10, 11, 13, 15 May 11, 12)

 Fixed bias circuit

 Collector to base bias circuit
 Voltage divider / self bias circuit
 Emitter stabilized bias circuit
 Miscellaneous bias circuit.

Enumerate the selection of Q point for transistor bias circuit and discuss the limitations on
the output voltage swing (Nov/Dec -2019)

2.18.1 Fixed Bias Circuit

The below fig (a) shows the fixed bias circuit. It is the simplest bias configuration. For the d.c.
analysis we can replace capacitor with an open circuit because the reactance of a capacitor for d.c. is

31
 𝑋𝑐 = 1/2𝜋fc = 1/2𝜋f(0) = ∞

The d.c. equivalent of fixed bias circuit is shown in fig.(b)

Base circuit
Applying Kirchhoff’s voltage (KVL) to the base circuit shown in fig (c) we get,

𝑉𝐶𝐶 - 𝐼𝐵 𝑅𝐵 -𝑉𝐵𝐸 = 0
𝑉𝐶𝐶 −𝑉𝐵𝐸
𝐼𝐵 = …………………………… (1)
𝑅𝐵

Collector Circuit

Applying KVL to the collector circuit shown in fig(d)

𝑉𝐶𝐶 - 𝐼𝐶 𝑅𝐶 -𝑉𝐶𝐸 = 0
𝑉𝐶𝐶 −𝑉𝐶𝐸
𝐼𝐶 = …………………………… (2)
𝑅𝐶

The magnitude of collector is given by,

𝐼𝐶 = 𝛽𝐼𝐵

It is important to note that since the base current 𝐼𝐵 is controlled by the value of 𝑅𝐵 and 𝐼𝐶 is related to
𝐼𝐵 by constant 𝛽, the magnitude of 𝐼𝐶 is not a function of the resistance 𝑅𝐶 .

However, the change in 𝑅𝐶 will change the value of 𝑉𝐶𝐸 .

𝑉𝐶𝐸 = 𝑉𝐶 - 𝑉𝐸
Where 𝑉𝐶 = collector voltage, 𝑉𝐸 = emitter voltage
Similarly,
𝑉𝐵𝐸 = 𝑉𝐵 - 𝑉𝐸 where, 𝑉𝐵 = base emitter voltage

32
In this circuit 𝑉𝐸 = 0
Therefore 𝑉𝐶𝐸 = 𝑉𝐶 and 𝑉𝐵𝐸 = 𝑉𝐵

Example problem 1

For the circuit shown in fig. calculate 𝐼𝐵 , 𝐼𝐶 , 𝑉𝐶𝐸 , 𝑉𝐵 , 𝑉𝐶 and 𝑉𝐵𝐶 . Assume 𝑉𝐵𝐸 = 0.7 and 𝛽 = 50.
Solution

𝑉𝐶𝐶 −𝑉𝐵𝐸 10−0.7

𝐼𝐵 = = = 42.27 𝜇A
𝑅𝐵 220 x 103

𝐼𝐶 = 𝛽𝐼𝐵 = 50 x 42.27 x 10−6 = 2.1135mA

𝑉𝐶𝐸 = 𝑉𝐶𝐶 - 𝐼𝐶 𝑅𝐶 = 10 - 2.1135 x 10−3 x 1.2 x 103 = 7.4638 V

𝑉𝐵 = 𝑉𝐵𝐸 = 0.7 V

𝑉𝐶 = 𝑉𝐶𝐸 = 7.4638 V

𝑉𝐵𝐶 = 𝑉𝐵 - 𝑉𝐶 = 0.7 – 7.4638

= - 6.7638

The negative voltage indicates that base collector junction is reverse biased.

Example problem 2

Design a fixed bias circuit to have operating point of 10V, 3mA. The circuit is supplied with 20V and
uses a silicon transistor of ℎ𝑓𝑒 = 250.

Solution: the fig a shows the fixed bias circuit with given values.

Applying KVL to collector circuit we get,

𝑉𝐶𝐶 - 𝐼𝐶 𝑅𝐶 -𝑉𝐶𝐸 = 0

33
 𝑉𝐶𝐶 −𝑉𝐶𝐸 20−10
𝑅𝐶 = = = 3.33KΩ
𝐼𝐶 3 X 10−3

𝐼𝐶 3 X 10−3
𝐼𝐵 = = = 12mA
𝛽 250

Now apply KVL to base circuit we get,

𝑉𝐶𝐶 −𝑉𝐵𝐸 20−0.7
𝑅𝐵 = = = 1.6MΩ
𝐼𝐵 12 X 10−3

Stability factor

We know that 𝐼𝐶 is a function of 𝐼𝐶𝑂 , 𝑉𝐵𝐸 and 𝛽. Thus, it is convenient to introduce the three partial
derivatives of 𝐼𝐶 with respect to these variables. These derivates are called stability factors S, S’ and
S” and are defined as follows.
𝜕𝐼𝐶
S= 𝑉𝐵𝐸 , 𝛽 constant
𝜕𝐼𝐶𝑂

𝜕𝐼𝐶
S’ = 𝐼𝐶𝑂 and 𝛽 constant
𝜕𝑉𝐵𝐸

𝜕𝐼𝐶
S” = 𝐼𝐶𝑂 and 𝑉𝐵𝐸
𝜕𝛽

Standard equation for derivation of stability factors of all biasing circuits

(1+𝛽)
S= 𝜕𝐼
1− 𝛽( 𝐵)
𝜕𝐼𝐶

2.18.2 Fixed Bias using a PNP Transistor

Here the voltage polarities and current directions are reversed than that of npn transistor fixed bias
circuit.

However, the equations applied for the analysis of npn transistor fixed bias circuit can be applied for
the analysis of pnp transistor fixed bias circuit.
Advantages
 This is a simple circuit which uses very few components.
 The operating point can be fixed anywhere in the active region of the characteristics by simply
changing the values of 𝑅𝐵 . Thus, it provides maximum flexibility in the design.
Disadvantages
 Thermal stability is not provided by this circuit. So the operating point is not maintained.
𝐼𝐶 = 𝛽𝐼𝐵 + 𝐼𝐶𝐸𝑂
 Since 𝐼𝐶 = 𝛽𝐼𝐵 and 𝐼𝐵 is already fixed; 𝐼𝐶 depends on 𝛽 which changes unit to unit and shifts
the operating point.
 Thus stabilization of operating point is very poor in the fixed bias circuit.

34
2.18.3 Collector to Base Bias Circuit
In this the biasing resistor is connected between the collector and the base of the transistor to provide a
feedback. Thus 𝐼𝐵 flows through 𝑅𝐵 and (𝐼𝐶 + 𝐼𝐵 ) flows through the 𝑅𝐶

Base circuit
Apply KVL to the base circuit

𝑉𝐶𝐶 - (𝐼𝐶 + 𝐼𝐵 )𝑅𝐶 - 𝐼𝐵 𝑅𝐵 -𝑉𝐵𝐸 = 0

𝑉𝐶𝐶 = (𝑅𝐶 + 𝑅𝐵 )𝐼𝐵 + 𝐼𝐶 𝑅𝐶 + 𝑉𝐵𝐸

= (𝑅𝐶 + 𝑅𝐵 )𝐼𝐵 + 𝛽𝐼𝐵 𝑅𝐶 + 𝑉𝐵𝐸

𝑉𝐶𝐶 −𝑉𝐵𝐸
𝐼𝐵 =
𝑅𝐵 +(1+𝛽)𝑅𝐶

𝑉𝐶𝐶 −𝑉𝐵𝐸
𝐼𝐵 = 𝛽≫1
𝑅𝐵 +𝛽𝑅𝐶
Collector circuit
𝑉𝐶𝐶 - (𝐼𝐶 + 𝐼𝐵 )𝑅𝐶 -𝑉𝐶𝐸 = 0

𝑉𝐶𝐸 = 𝑉𝐶𝐶 - (𝐼𝐶 + 𝐼𝐵 )𝑅𝐶

 If there is change in 𝛽 due to the change in temperature, then collector current 𝐼𝐶 tends to
increase.
 As a result, voltage drop across 𝑅𝐶 increases. Since supply voltage 𝑉𝐶𝐶 is constant, due to
increase in 𝐼𝐶 𝑅𝐶 , 𝑉𝐶𝐸 decreases. Due to reduction in 𝑉𝐶𝐸 , 𝐼𝐵 reduces.
 As 𝐼𝐶 depends on 𝐼𝐵 , decrease in 𝐼𝐵 reduces the original increase in 𝐼𝐶 . The result is that the
circuit tends to maintain a stable value of collector current, keeping the Q point fixed.
 A part of output is fed back to the input, and increase in collector current decreases the base
current. Thus negative feedback exists in the circuit, so this circuit is also called voltage
feedback bias circuit.

35
 Stability factors for collector to base bias circuit
𝜕𝐼𝐶
S= 𝑉𝐵𝐸 , 𝛽 constant
𝜕𝐼𝐶𝑂

(1+𝛽) (1+𝛽)
S= 𝜕𝐼
= 𝑅𝐶
1− 𝛽( 𝐵) 1+ 𝛽( )
𝜕𝐼𝐶 𝑅𝐶 + 𝑅𝐵

2.18.4 Voltage Divider Bias, Self Bias or Emitter Bias

7. Explain the emitter bias method used in transistor amplifier circuits. (Dec 17)

 A circuit which is used to establish a stable operating point is the self biasing circuit. This
circuit is also known as voltage divider bias circuit.
 In this circuit, the biasing is provided by three resistors: 𝑅1 , 𝑅2 and 𝑅𝐸 .
 The resistors 𝑅1 and 𝑅2 act as a potential divider giving a fixed voltage to point B which is
base.
 If collector current increases due to change in temperature or 𝛽, the emitter current 𝐼𝐸 also
increases and the voltage drop across 𝑅𝐸 increases, reducing the voltage difference between
base and emitter (𝑉𝐵𝐸 )
 Due to reduction in 𝑉𝐵𝐸 , base current 𝐼𝐵 and hence collector current 𝐼𝐶 also reduces. Therefore,
we can say that negative feedback exists in the voltage divider bias circuit.
 This reduction in collector current 𝐼𝐶 compensates for the original change in 𝐼𝐶 .

Circuit analysis

Fig (a) shows thevenin’s equivalent circuit of voltage divider bias. Here, 𝑅1 and 𝑅2 are replaced by
𝑅𝐵 and 𝑉𝑇 , where 𝑅𝐵 is the parallel combination of 𝑅1 and 𝑅2 and 𝑉𝑇 is the thevenin’s voltage.

𝑅𝐵 Can be calculated as
𝑅1 𝑅2
𝑅𝐵 =
𝑅1 +𝑅2
Apply KVL to the base circuit

VT - IB R B -VBE - (1 + β)IB R E = 0

36
 VT −VBE
IB =
RB +(1+β)RE

Collector Circuit
Apply KVL to collector circuit we have,

VCE = VCC - IC R C - IE R E

Stability factors for collector to base bias circuit

𝜕𝐼𝐶
S= 𝑉𝐵𝐸 , 𝛽 constant
𝜕𝐼𝐶𝑂

(1+𝛽) (1+𝛽)
S= 𝜕𝐼
= 𝑅𝐸
1− 𝛽( 𝐵) 1+ 𝛽( )
𝜕𝐼𝐶 𝑅𝐸 + 𝑅𝐵

Problem (Anna Univ Dec 2017)

In an transistor amplifier using voltage divider bias, the operating point is chosen such that 𝐼𝐶 =
20mA, 𝑽𝑪𝑬 = 3V. if 𝑹𝑪 = 2.2kΩ, 𝑽𝑪𝑪 = 9V and 𝜷 = 50, find the values of bias resistors and 𝑹𝑬 .
Assume 𝑽𝑩𝑬 = 0.3V and current through the bias resistors is 10 𝑰𝑩 . ( Dec – 2017)

Solution

Applying KVL to the collector circuit we have,

0 = VCC - IC R C - IE R E - VCE

VE = VCC - IC R C - VCE

= 9 – (2 mA x 2.2K) – 3 = 1.6V
𝑉𝐸 1.6 1.6
𝑅𝐸 = = (1+𝛽)𝐼 = (1+50)(2X10−3)/50 = 784 Ω
𝐼𝐸 𝐶 /𝛽

𝐼𝐶 2 X 10−3
𝐼𝐵 = = = 40 µA
𝛽 50

37
Current through the bias registers,

I = 10 𝐼𝐵 = 400 µA

𝑉𝐵𝐸 = 𝑉𝐵 - 𝑉𝐸

𝑉𝐵 = 𝑉𝐵𝐸 + 𝑉𝐸 = 0.3 + 1.6 = 1.9V

𝑉𝐵 1.9
𝑅2 = = = 4.75 kΩ
𝐼 400 X 10−6

Voltage drop across 𝑅1 = 𝑉𝐶𝐶 - 𝑉𝐵 = 9 – 1.9 = 7.1 V

∴ 𝑅1 = 7.1 / 400 10−6

Problem (Anna University May 2017)

Design a voltage divider bias circuit for transistor to establish the quiescent point at 𝑉𝐶𝐸 = 12 V, 𝐼𝐶
=1.5 mA, stability factor S≤ 3, 𝛽 = 50, 𝑉𝐵𝐸 = 0.7V, 𝑉𝐶𝐶 = 22.5V and 𝑅𝐶 = 5.6kΩ

Solution

STEP 1: calculate 𝑅𝐸

𝐼𝐶 1.5 X 10−3
𝐼𝐵 = = = 30 µA
𝛽 50

𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶 = 1.53mA

VE = 𝑉𝐶𝐶 - 𝐼𝐶 𝑅𝐶 - 𝑉𝐶𝐸

= 22.5 – (1.5mA x 5.6k) – 12 = 2.1V

𝑉𝐸 2.1
𝑅𝐸 = = = 1.37 kΩ
𝐼𝐸 1.53 X 10−3

38
STEP 2: Calculate 𝑹𝑩

We know that, stability factor for self bias circuit is

(1+𝛽)
S= 𝑅𝐸
1+ 𝛽( )
𝑅𝐸 + 𝑅𝐵

51
3= 1.37 k
1+50 ( )
1.37 k+ RB

51 51
3= 68.5 k
= 1.37 k+ RB +68.5 k
1+ (1.37 k+ R ) ( 1.37 k+ RB
)
B

51 (1.37 k+ RB )
3=
1.37 k+ RB +68.5 k

4.11 k + 3R B +205.5k = 69.87k +51R B

R B = 2.91k Ω

Since S should be ≤3, R B should be ≤2.91 k Ω

Let us take R B = 3 k Ω

STEP 3 Calculate 𝑹𝟏 and 𝑹𝟐

VT = IB R B + VBE + VE

VT = 30 x 10−6 x 3000 + 0.7 + 2.1 = 2.89 V

𝑅2
VT = VCC
𝑅1 +𝑅2

𝑅2 VT 2.89
= = = 0.128
𝑅1 +𝑅2 VCC 22.5

𝑅1 𝑅2
We have, RB = = 3kΩ
𝑅1 +𝑅2

RB 3K
𝑅1 = 𝑅2 = 0.128 = 23.44 KΩ
𝑅1 +𝑅2

𝑅2
= 0.128
23.44 𝐾+𝑅2

𝑅2 = 3.44 K

Example problem

For a circuit shown in figure VCC = 20V, 𝑅𝐶 = 2KΩ, 𝛽= 50, VBE = 0.2V, 𝑅1 = 100KΩ, 𝑅𝐸 = 100Ω.
Calculate IB , 𝑉𝐶𝐸 , 𝐼𝐶 and stability factor S.

39
2.20 FIELD EFFECT TRANSISTORS
The acronym FET stands for field effect transistor. It is a three terminal, unipolar, solid state device
in which output current is controlled by an electric field set up in the device by externally applied
voltage between gate and source terminals. There are two types of FETs:
1. Junction field effect transistor (JFET)
2. Metal oxide semiconductor FET (MOSFET)
It is also called insulated – gate FET (IGFET). It may be further subdivided into
(i) Depletion – enhancement MOSFET i.e. DE MOSFET
(ii) Enhancement – only MOSFET i.e. E – only MOSFET
Both of these can be either P – channel or N – channel devices.

8. Explain the construction of N channel JFET. Also explain the drain and transfer
characteristics of the same. (Dec 10, May 12, 14, 17)
CONSTRUCTION OF N-CHANNEL JFET:
 It consists of N-type bar which is made of silicon.
 Ohmic contacts (terminals) are made at the two ends of the bar, are called Source and
Drain.
 Heavily doped P-type is diffused on both sides of the bar are joined together is called
gate.
 The region in the N-type bar between the depletion regions is called N-channel.
1. Source (S)
It is the terminal through which majority carriers enter the bar. Since carriers originate from it,
it is called the source. This terminal is connected to the negative pole of the battery
2. Drain (D)
It is the terminal through which majority carriers leave the bar i.e. they are drained out from
this terminal. The drain to source voltage 𝑉𝐷𝑆 drives the drain current 𝐼𝐷 This terminal is
connected to the positive pole of the battery
3. Gate (G)
These are two internally connected heavily doped impurity regions which form two P –N
junctions but only one terminal is taken out, which is called gate. The gate – source voltage 𝑉𝐺𝑆
reverse biases the gates.

40
 4. Channel (C)
It is the space between two gates through which majority carriers pass from source to drain
when 𝑉𝐷𝑆 is applied.

2.21. Structures of N Channel and P channel

41
Summarize the operation and characteristics behaviour of JFET under various biasing.(may23)
2.22 OPERATION OF N-CHANNEL JFET:

Case (i):
 When VGS = 0 and VDS = 0 (When no voltage is applied between drain and source, and
gate and source).
 The thickness of the depletion regions round the PN junction is uniform.
Case (ii): When VDS=0 and VGS is decreased from zero.
 As negative voltage is applied to gate (to P-type), the PN junctions are reverse biased and
hence the thickness of the depletion region increases.
 In FET, when VDS=0 and VGS is decreased from zero, the PN junctions are reverse biased
and hence the thickness of depletion region increases.
 At one particular voltage (VGS) the two depletion regions make contact with each other.
This condition is called cut-off condition.

Case (iii): When VGS = 0 and VDS is increased from zero.

 As Drain is connected to positive supply, the majority carriers in the N-type (i.e.,
electrons) flow from source to drain through the N channel.
 Therefore, ID (drain current) flows from drain to source.
 The magnitude of drain current depends on,

42
  The number of majority carriers (electrons) available in the channel
 The length (L) and conductivity of the channel.
 The cross-sectional area (A) of the channel.
 The magnitude of the applied voltage VDS .
 Therefore, the channel acts as a resistor with a resistance value given by,
L L
R   R  
A A
WKT ,

V DS AV
ID  
DS

R  L

Where,  -Resistivity of the channel.

 As VDS increases, the thickness of the depletion region increases the cross sectional
area of the channel.
 As a certain value of VDS (say VP), the cross-sectional area becomes minimum. When the
gate to source voltage (VGS) is increased further, a stage is reached at which two
depletion regions touch each other. It is called as “Pinch off region”.
 This reduces the drain current to zero.
 The drain to source voltage at which the channel pinch off occurs is known as pinch
off voltage (VP).

Circuit symbols for N-channel and P- channel FET

The P-channel Junction Field Effect Transistor operates exactly the same as the N-channel above, with
the following exceptions: 1). Channel current is positive due to holes, 2). the polarity of the biasing
voltage needs to be reversed.

JFET Channel Pinched-off

In this pinch-off region the Gate voltage, VGS controls the channel current and VDS has little or no
effect.

The result is that the FET acts more like a voltage controlled resistor which has zero resistance
when VGS = 0 and maximum “ON” resistance ( RDS ) when the Gate voltage is very negative

43
 Under normal operating conditions, the JFET gate is always negatively biased relative to the source.

It is essential that the Gate voltage is never positive since if it is all the channel current will flow to
the Gate and not to the Source, the result is damage to the JFET.

Then to close the channel:

 No Gate Voltage ( VGS ) and VDS is increased from zero.
 No VDS and Gate control is decreased negatively from zero.
 VDS and VGS varying.

Pinch off Voltage

As we continue to increase the reverse bias of gate terminal the depletion layer widens and a point is
reached where entire channel is filled with depletion layer and drain current will be reduced to zero
except for small reverse saturation currents order of nano amperes.
The gate to source voltage at which the entire channel will be depleted of charge carrier is
called pinch-off voltage.

Compare N-channel and P-channel JFET:

N-channel JFET P-channel JFET
 Current carriers are electrons.  Current carriers are holes.
 Mobility of electrons is large  Mobility of Holes is poor.
 Input noise is less  Noise is high.
 Large transconductance  Low transconductance.

2.23 Modes of FET’s

Common Source (CS) Configuration

In the Common Source configuration (similar to common emitter), the input is applied to the Gate
and its output is taken from the Drain.
This is the most common mode of operation of the FET due to its high input impedance and good
voltage amplification and as such Common Source amplifiers are widely used.

44
The common source mode of FET connection is generally used audio frequency amplifiers and in high
input impedance pre-amps and stages. Being an amplifying circuit, the output signal is 180o “out-of-
phase” with the input.

Common Gate (CG) Configuration

In the Common Gate configuration (similar to common base), the input is applied to the Source and
its output is taken from the Drain with the Gate connected directly to ground (0v) as shown.

The high input impedance feature of the previous connection is lost in this configuration as the
common gate has low input impedance, but high output impedance.

This type of FET configuration can be used in high frequency circuits or in impedance matching
circuits were low input impedance needs to be matched to high output impedance. The output is “in-
phase” with the input.

Common Drain (CD) Configuration

 In the Common Drain configuration (similar to common collector), the input is applied to the
Gate and its output is taken from the Source.
 The common drain or “source follower” configuration has high input impedance and low
output impedance and near-unity voltage gain so is therefore used in buffer amplifiers.
 The voltage gain of the source follower configuration is less than unity, and the output signal is
“in-phase”, 0o with the input signal.
 This type of configuration is referred to as “Common Drain” because there is no signal
available at the drain connection, the voltage present, +VDD just provides a bias. The output is
in-phase with the input.

45
Biasing of JFET Amplifier
 This common source (CS) amplifier circuit is biased in class “A” mode by the voltage divider
network formed by resistors R1 and R2.
 The voltage across the Source resistor RS is generally set to be about one quarter of VDD,
( VDD/4 ) but can be any reasonable value.
 The required Gate voltage can then be calculated from this RS value. Since the Gate current is
zero, (IG = 0) we can set the required DC quiescent voltage by the proper selection of
resistors R1 and R2.
 The control of the Drain current by a negative Gate potential makes the Junction Field Effect
Transistor useful as a switch and it is essential that the Gate voltage is never positive for an N-
channel JFET as the channel current will flow to the Gate and not the Drain resulting in
damage to the JFET.
 The principals of operation for a P-channel JFET are the same as for the N-channel JFET,
except that the polarity of the voltages need to be reversed.

2.23 Static Characteristics of a JFET

We will consider the following two characteristics:
(i) Drain characteristics
It gives relation between 𝐼𝐷 and 𝑉𝐷𝑆 for different values of 𝑉𝐺𝑆 (which is called running
variable).
(ii) Transfer characteristics
It gives relation between 𝐼𝐷 and 𝑉𝐺𝑆 for different values of 𝑉𝐷𝑆
We will analyse these characteristics for an N channel JFET connected in the common – source
mode as shown in Fig .

46
 Fig. common source JFET

JFET DRAIN CHARACTERISTICS WITH 𝑽𝑮𝑺 =0

10. Sketch and explain the typical shape of drain characteristics of JFET for 𝐕𝐆𝐒 =0 with
indication of four region clearly. (May 2017)

This characteristic is shown in figure below. It can be sub divided into following four regions:
1. Ohmic region
2. Curve AB
3. Pinch – off or saturation or amplifier region
4. Breakdown region

Ohmic region OA
This part of the characteristics is linear. For low values of 𝑉𝐷𝑆 , current varies directly with voltage
following Ohm’s law. It means that JFET behaves like an ordinary resistor till point A (called knee) is
reached.
Curve AB
In this region, 𝐼𝐷 increases at inverse square law rate up to point B which is called pinch off point. The
drain to source voltage 𝑉𝐷𝑆 corresponding to point B is called pinch off voltage 𝑉𝑃𝑂 at 𝑽𝑮𝑺 =0

47
Pinch – off Region BC
It is also known as saturation region or amplifier region. Here, JFET operates as a constant – current
device because 𝐼𝐷 is relatively independent of 𝑉𝐷𝑆 . It is due to the fact that as 𝑉𝐷𝑆 increases, channel
resistance also increases proportionally thereby keeping 𝐼𝐷 practically constant at 𝐼𝐷𝑆𝑆 . Reverse bias
required by the gate channel junction is supplied entirely by 𝑉𝐷𝑆 since 𝑉𝐺𝑆 = 0.

Drain current in this region is given by Shockley’s equation

2
𝑉𝐺𝑆 2 𝑉𝐺𝑆
𝐼𝐷 = 𝐼𝐷𝑆𝑆 (1 − ) = 𝐼𝐷𝑆𝑆 (1 − )
𝑉𝑃𝑂 𝑉𝐺𝑆 (𝑜𝑓𝑓)

It is the normal operating region of the JFET when used as an amplifier.

Breakdown Region

If 𝑉𝐷𝑆 is increased beyond the value corresponding to point C, called avalanche breakdown voltage,
JFET enters the breakdown region where 𝐼𝐷 increases to an excessive value. This happens because the
reverse biased gate channel P-N junction undergoes avalanche breakdown when even small changes in
𝑉𝐷𝑆 produce very large changes in 𝐼𝐷

Highlights:

 It is interesting to note that increasing values of 𝑉𝐷𝑆 make a JFET behave first as resistor
(ohmic region), then as a constant current source (pinch off region) and finally, as a constant –
voltage source (breakdown region)

TRANSFER CHARACTERISTICS

 It is a plot of 𝐼𝐷 versus 𝑉𝐺𝑆 for a constant value of 𝑉𝐷𝑆 and is shown in figure. It is similar to the
Trans conductance characteristics of a vacuum tube or transistor.
 It is seen that when 𝑉𝐺𝑆 = 0, 𝐼𝐷 = 𝐼𝐷𝑆𝑆 and when 𝐼𝐷 = 0, 𝑉𝐺𝑆 = 𝑉𝑃𝑂 . The transfer characteristic
2
𝑉𝐺𝑆 2 𝑉𝐺𝑆
approximately follows the equation 𝐼𝐷 = 𝐼𝐷𝑆𝑆 (1 − ) = 𝐼𝐷𝑆𝑆 (1 − ) can be written
𝑉𝑃𝑂 𝑉𝐺𝑆 (𝑜𝑓𝑓)

48
 𝐼𝐷
 The above equation can be written as 𝑉𝐺𝑆 = 𝑉𝐺𝑆 (𝑜𝑓𝑓) (1 − √𝐼 )
𝐷𝑆𝑆

 This characteristics can be obtained from the drain characteristic by observing 𝑉𝐺𝑆 and 𝐼𝐷𝑆𝑆
values for different values of 𝑉𝐷𝑆

2.24 DC Biasing of a JFET

Summarize the operation and charcteristic behviour of JFET under various biasing conditions.

(May 2023)
A JFET may be biased by using either
1. A separate power source 𝑉𝐺𝐺 as shown in fig. (a)
2. Some form of self bias as shown in fig.(b)
3. Source bias as in fig.(c)
4. Voltage divider bias as in fig (d)

2.25 COMMON SOURCE JFET AMPLIFIER

A simple circuit for such an amplifier is shown in figure below. Here 𝑅𝐺 serves the purpose of
providing leakage path to the gate current, 𝑅𝑆 develops gate bias, 𝐶3 provides ac ground to the
input signal and 𝑅𝐿 acts as drain load.

49
Working

When negative going signal is applied to the input

1. Gate bias is increased

2. Depletion regions are widened
3. Channel resistance is increased
4. 𝐼𝐷 is increased
5. Drop across 𝑅𝐿 is decreased
6. Consequently, a positive going signal becomes available at the output through 𝐶2

When a positive going signal is applied at the input, then in a similar way, a negative going signal
becomes available at the output.
It is seen that there is phase inversion between the input at the gate and output signal at the drain.

Applications of JFET:
 Used as variable resistors in operational amplifier.
 Used as buffer in measuring instruments and receivers.
 Used in cascade amplifiers in measuring and testing equipments.
 Used in mixer circuits in FM and TV receivers.
 Used in computers.
2.26 COMPARISON OF JFET AND BJT (May 2004, 14, 15 , Dec-14,18)
BJT (Bipolar Junction Transistor) JFET (Junction Filed Effect Transistor)
 Operation depends on both majority  Its operation depends only on
and minority carriers. Therefore, it is a majority carriers. Therefore, JFET
Bipolar device. is a unipolar device.
 Noise is high  Less noisy than BJT.
 Very high input impedance and low  Low input impedance and high
output impedance. output impedance.
 It is a current controlled device.  It is a voltage controlled device.

50
  At high current levels, BJT have  At high current levels, FET has
positive temperature co-efficient. This negative temperature co-efficient.
leads to thermal breakdown (Thermal So its performance is unaffected by
run away). ambient temperature changes.
 BJTs are cheaper to produce.  JFETs are expensive than BJT.
 Not much easier to fabricate.  Easier to fabricate.
 BJT amplifiers have high gain  FET amplifiers have low gain
bandwidth. bandwidth. Signal distortion is
high.
 Performance is degraded by neutron  It can tolerate a much higher level
radiation. of radiation.
 Lower switching speed and cut off  Higher switching speed and cut off
frequencies. frequencies.

2.27 Use of JFET as a VVR or VDR (Dec 05, 06, 07, 08)
 Consider the drain characteristics of FET. In this characteristics the region before pinch off
voltage, drain characteristics is linear, i.e. FET operation is linear.
 This region of FET is useful as a voltage controlled resistor, i.e. the drain to source
resistance is controlled by the bias voltage 𝑉𝐺𝑆 .
 The operation of FET in this region is useful in most linear applications of FET.
 In such an application the FET is also referred to as a Voltage –Variable Resistor (VVR)
or Voltage – Dependent Resistor (VDR).
 Voltage –Variable Resistor property of FET can be used to vary the voltage gain of a
multistage amplifier A as signal level is increased.
 This action is called automatic gain control (AGC).

2.28 Small signal A.C. Equivalent Circuit for JFET

51
The JFET parameters are the major components of low frequency small signal model for JFET. In
JFET the drain to source current 𝐼𝐷 is controlled by gate to source voltage 𝑉𝐺𝑆 . The change in drain
current due to change in gate to source voltage can be determined using the transconductane factor 𝑔𝑚

Δ𝐼𝑑 = 𝑔𝑚 Δ 𝑉𝐺𝑆

𝒈𝒎 is the transconductance factor of JFET and it gives the relation between input and output.
𝛥𝑉𝐷𝑆
𝑟𝑑 = at 𝑉𝐺𝑆 constant
𝛥𝐼𝐷
𝒓𝒅 is the another important parameter of JFET. It is knows as drain resistance (𝒓𝒅 )
It determines the output impedance 𝑍0 of the JFET amplifier.
𝛥𝑉𝐷𝑆
Amplification factor µ = at drain current 𝐼𝐷 constant.
𝛥𝑉𝑔𝑆
The parameters 𝑔𝑚 , 𝑟𝑑 , µ are related by
µ = 𝑟𝑑 𝑔𝑚
JFET Low Frequency a.c. Equivalent Circuit
 Fig. shows the small signal low frequency a.c. equivalent circuit for n channel JFET.
 The relation of 𝐼𝑑 by 𝑉𝑔𝑆 is included as a current source 𝑔𝑚 𝑉𝑔𝑆 connected from drain to
source.
 The input impedance is represented by the open circuit its input terminals, since gate current 𝐼𝐺
is zero. The output impedance is represented by 𝑟𝑑 from drain to source.

2.29. Common source amplifier with fixed bias

9. For A Common Source Amplifier, Draw The Small Signal Equivalent Circuit And Determine
Expression For Gain, Input Impedance And Output Impedance. ( Dec 09, May 2014)
Fig. shows Low frequency equivalent model for common source JFET amplifier circuit with fixed bias
circuit is replacing by
 All capacitors and d.c. supply voltages with short circuits and
 JFET with its low frequency equivalent circuit

52
Input impedance 𝒁𝒊
From the equivalent model, the input impedance is found easily
𝒁𝒊 = 𝑹𝑮
Output impedance 𝒁𝒐
The output impedance z0 is the impedance measured looking from the output side with input voltage
(𝑣𝑖 ) equal to zero. As 𝑣𝑖 = 0,
𝑉𝑔𝑆 = 0, and hence 𝑔𝑚 𝑉𝑔𝑆 = 0

The 𝑔𝑚 𝑉𝑔𝑆 = 0 allows current source to be replaced by an open circuit. Therefore the output
impedance is,
𝑍𝑜 =𝑅𝐷 ǁ 𝑟𝑑
If 𝑟𝑑 >> 𝑅𝐷 then
𝒁𝒐 =𝑹𝑫
Voltage gain
𝑉𝑑𝑠 𝑉𝑂
The voltage gain 𝐴𝑣 = =
𝑉𝑔𝑠 𝑉𝑖

Looking at figure we can write

𝑉𝑜 = - 𝑔𝑚 𝑉𝑔𝑆 (𝑅𝐷 ǁ 𝑟𝑑 )
As we know 𝑉𝑖 = 𝑉𝑔𝑠
𝑉𝑜 = - 𝑔𝑚 𝑉𝑖 (𝑅𝐷 ǁ 𝑟𝑑 )
𝑉𝑜
𝐴𝑣 = = -𝑔𝑚 (𝑅𝐷 ǁ 𝑟𝑑 )
𝑉𝑖
And if 𝑟𝑑 >> 𝑅𝐷

53
 𝑨𝒗 = -𝒈𝒎 𝑹𝑫
The negative sign in voltage gain indicates that there is a phase shift of 180° between input and output
voltages.

2.30. MOSFET or IGFET

MOSFET’s operate same as JFET’s e but Gate terminal is electrically insulated from the main current
carrying channel and is therefore called an Insulated Gate Field Effect Transistor.

MOSFETs are three terminal devices with a Gate, Drain and Source and both P-channel (PMOS) and
N-channel (NMOS) MOSFETs are available.

MOSFETs are available in two basic forms:

(i) Depletion- enhancement MOSFET or DE MOSFET
(ii) Enhancement only MOSFET

Principle:
 By applying a transverse electric field across an insulator, deposited on the semiconducting
material, the thickness and hence the resistance of a conducting channel of a semiconducting
material can be controlled.
 In depletion MOSFET, the controlling electric field reduces the number of majority
carriers available for conduction.
 In Enhancement MOSFET, application of electric field causes an increase in the majority
carriers density in the conducting regions of the transistor.
Depletion – enhancement MOSFET or DE MOSFET

This MOSFET is so called because it can be operated in both depletion mode and enhancement
mode by changing the polarity of 𝑉𝐺𝑆 .

When negative gate – source voltage is applied, the N-channel DE MOSFET operates in the
depletion mode. However, with positive gate voltage, it operates in the enhancement mode. Since a
channel exists between drain and source, 𝐼𝐷 flows even when 𝑉𝐺𝑆 = 0. That is why DE MOSFET is
known as normally ON MOSFET.

54
Enhancement – only MOSFET
This MOSFET operates only in the enhancement mode and has no depletion mode. It works with
large positive gate voltages only.

It differs in construction from the DE MOSFET since E – MOSFET has no channel between
source and drain. Hence, it does not conduct when 𝑉𝐺𝑆 = 0. This is why it is called normally – OFF
MOSFET.

In E – only MOSFET, 𝐼𝐷 flows only when 𝑉𝐺𝑆 exceeds 𝑉𝐺𝑆 (𝑡ℎ) .

Construction of N channel depletion MOSFET

 An N-channel depletion MOSFET consists of lightly doped P-type substrate and highly doped
two layers of N-type material acting as a source and drain.
 The source and drain terminals are connected through metallic contacts to n doped regions
linked by an n channel.
 The gate is also connected to a metal contact surface but remains insulated from the N channel
by a very thin layer of dielectric material, silicon dioxide (SiO2)
 When the gate to source voltage VGS = 0 an appreciable drain current flows
Working of Depletion Mode of N channel DE MOSFET

10. Explain the working of a depletion mode MOSFET. Draw and explain its VI characteristics
(Dec 2017) (Nov/Dec 21)
11. Explain the working of depletion mode and enhancement mode MOSFET. (April 2018)
(Or)
(i)Brief about the operation of an N-channel depletion type MOSFET with a neat diagram.
(ii)Enumerate the characteristics of N channel depletion MOSFET with suitable graphs.
(Apr/May- 2019)
 When 𝑉𝐺𝑆 = 0, electrons can flow freely from source to drain through the conducting
channel which exists between them.
 When negative voltage is applied at gate terminal, it depletes the N channel of its electrons
by inducing positive charge in it as shown in figure. (a).

55
  Greater the negative voltage on the gate, greater is the reduction in the number of electrons
in the channel and, consequently, lesser its conductivity.
 In fact too much negative voltage called 𝑉𝐺𝑆 (𝑜𝑓𝑓) can cut off the channel.
 Hence, with negative voltage, a DE MOSFET behaves like a JFET.
 Hence, negative gate operation of a DE MOSFFET is called its depletion mode operation.

Fig. Depletion mode N-channel DE MOSFET

Drain characteristics of an N-channel DE- MOSFET:

 The drain characteristic shows the relation between drain current versus drain to source voltage
of MOSFET.

Fig. Drain Characteristics of N channel depletion MOSFET

Pinch-off voltage:
 When VDS is increased, ID increases and it becomes practically constant at a certain value
of VDS, called the pinch-off voltage.
 The drain current ID almost gets saturated beyond the pinch-off voltage.
 Since the current in a FET is due to majority carriers, the induced positive charges make
the channel less conductive and ID drops as VGS is made negative.
Transfer characteristics of an N-channel MOSFET:

56
  The transfer characteristic shows the relation between the gate source voltage (VGS) and drain
current.
 The gate to source cut-off voltage, VGS (OFF), at which drain current, ID has reduced to
negligibly small value at a certain value of VDS.
 This voltage VGS (OFF) corresponds to pinch off voltage VP of JFET.

Working of Enhancement Mode of N – channel DE MOSFET

 When positive voltage is applied to the gate, the input gate capacitor is able to create free
electrons in the channel which increases 𝐼𝐷 .
 These electrons are added to those already existing there. This increased number of electrons
increases or enhances the conductivity of the channel.
 As the positive gate voltage is increased, the number of induced electrons is increased, so,
conductivity of the source to drain channel is increased and, consequently increasing amount of
current flows between the terminals.
 This is why positive gate operation of a DE MOSFET is known as its enhancement mode
operation.

57
2.31. Construction of Enhancement MOSFET

10. Explain the construction, operation and characteristics of n- channel enhancement type
MOSFET (Dec 13, May 14)

11. with the help of suitable diagram, explain the working of enhancement MOSFET (May 15)

12. Draw the cross section diagram for an N type enhancement mode MOSFET. Briefly explain
its operation. (Dec 15)

13. Elaborately discuss the drain current characteristics (output) and transfer characteristics of
MOSFET (May 16, 17)

 Two highly doped N+ regions are diffused in a lightly doped substrate of P-type silicon
substrate.
 One N+ region is called the source (S) and the other one is called the drain (D). They are
separated by 1 mil (10-3 inch).
 A thin insulating layer of Si02 is grown over the surface of the structure and holes are cut
into the oxide layer, allowing contact with source and drain.
 Then a thin layer of metal aluminium is formed over the layer of Si02.
 This metal layer covers the entire channel region and it forms the gate G.
 The metal area of the gate, in conjunction with the insulating oxide layer of Si02 and the
semiconductor channel forms a parallel plate capacitor.
 This device is called the insulated gate FET because of the insulating layer of Si02.
 This layer gives extremely high input impedance for the MOSFET.
 Substrate is not normally used as either an input or an output connection but instead it is used
for grounding the substrate
Enhancement only N Channel MOSFET

 This N channel MOSFET (also called NMOS) finds wide application in digital circuitry.

58
  As there is no channel between source and drain, it can never operate in negative gate voltage
because it will induce positive charge in the space between the drain and source which will not
allow the passage of electrons between the two.
 Therefore, it operates with positive gate voltage only.
 When 𝑉𝐺𝑆 = 0 there is no drain current i.e. 𝐼𝐷 = 0.
 When the voltage is sufficiently greater than the threshold voltage 𝑉𝐺𝑆 (𝑡ℎ) the drain current
starts to flow in thin metal oxide film from source to drain.
 The thin layer of P substrate touching the metal oxide film which provides channel for
electrons is called N – type inversion layer or virtual N channel.
 The minimum gate – source voltage produces this N type inversion layer and hence drain
current is called threshold voltage 𝑉𝐺𝑆 (𝑡ℎ) .

 When 𝑉𝐺𝑆 <𝑉𝐺𝑆 (𝑡ℎ) , 𝐼𝐷 = 0.

 Drain current starts only when 𝑉𝐺𝑆 >𝑉𝐺𝑆 (𝑡ℎ) .

Drain characteristics of Enhancement MOSFET:

 Drain characteristics shows the relation between drain current and drain voltage, taking gate
to Source voltage (VGS) as constant.
 The drain current, ID is plotted for different values of drain to source voltage (VDS) are noted.
 As VGS is made positive the current ID increases slowly at first and then much more rapidly
with an increase in VGS.
 It is found that, when VGS is increased, the drain current is also increased

59
 Fig. Drain Characteristics of N channel E- MOSFET

Transfer characteristics of Enhancement MOSFET:

 Transfer characteristics shows the relation between drain current and gate to source voltage
at constant values of drain to source voltage.
 When the gate to source voltage, VGS ≤ zero, the drain current ID is extremely small of the
order of nano amperes.
 As VGS is progressively made positive, the drain current ID first increases slowly and then at a
relatively fast rate with the increase of VGS.
 The voltage at which the drain current (ID) reaches some value from zero is the gate-source
threshold voltage and is given by VGST.

A P- channel E – only MOSFET (PMOS) is constructed like NMOS except that all the P and N
regions are interchanged. It operates with negative gate voltage only.

2.32. Drain current equation of depletion and enhancement MOSFETs:

Depletion MOSFET:

2
 V 
I DS  I DSS  1  GS 
 
 VP 

60
Enhancement MOSFET:
I DS  K V GS  V T 
2

where ,

V T   Thresho l d Vo l tage.

 n C Dx
K  ;    Width of the channe l and L - l ength of the channe l.
L

Where 𝑉𝐺𝑆 - 𝑉𝑇 is a gate to source overdrive voltage

The parameter K is called conduction parameter it is constant and it is a function of the construction
of the device. The value of K can be determined from equation,
𝐼𝐷(ON)
K= 2
(𝑉𝐺𝑆 (𝑂𝑁) − 𝑉𝑇 )

𝐶𝐷x = oxide capacitance per unit area

𝜀𝐷𝑥
𝐶𝐷x =
𝑡𝐷𝑥

𝜀𝐷𝑥 = oxide permittivity

𝑡𝐷𝑥 = oxide thickness
µ𝑛 = mobility of free electrons in the inversion layer.
Problem
The data sheet of an enhancement MOSFET gives 𝑰𝑫(𝒐𝒏) = 500 mA at 𝑽𝑮𝑺 = 10V and 𝑽𝑮𝑺(𝒕𝒉) = 1 V.
find the drain current for 𝑽𝑮𝑺 = 5 V. (Dec 2017)
𝐼𝐷(ON)
K= 2
(𝑉𝐺𝑆 (𝑂𝑁) − 𝑉𝑇 )

500 x 10−3
= = 6.1728 x 10−3 A/V
(10−1)2

For 𝑽𝑮𝑺 = 5 V
𝑰𝑫 = 6.1728 x 10−3 (5 − 1)2
= 98.765 mA
Uses of MOSFET:
 MOSFET can be used in medium speed applications.
 Because of its high impedance, it can be substituted in vacuum tube circuit designs.
 They are also useful in switching applications.
2.34. Comparison of BJT with MOSFET:
S.No Parameter BJT MOSFET
1. Configurations CE,CB,CC CS,CG,CD
2. Input resistance Low (compared to Very high

61
 JFET)
3. Control element Current controlled Voltage controlled device
device
4. Current conduction Bipolar device Unipolar devices
5. Types PNP and NPN N-channel and P-Channel
MOSET (Depletion type,
Enhancement type)
6. Input and Output linear Non-linear
Relation
7. Noise More thermal noise Less thermal noise
8. Thermal stability Low High
9. Size Larger than MOSFET Smaller size.
10. Switching speed slower Faster
11. Power Consumption High Very low.

2.35. Advantages of FET’s

1. High input impedance

2. Small in size
3. Ruggedness
4. Long life
5. High frequency response
6. Low noise
7. Negative temperature co efficient, hence, better thermal stability.
8. High power gain
9. A high immunity to radiations
10. No offset voltage when used as a switch (or chopper)
Disadvantage
1. Small gain bandwidth product
2. Greater susceptibility to damage in handling them.
2.36. FET Applications
1. As input amplifiers in oscilloscope, electronic voltmeters because their high input
resistance reduces loading effect to minimum.
2. In logic circuit where it is kept OFF when there is zero input while it is turned ON with
very little power input.
3. For mixer operation of FM and TV receivers
4. As voltage variable resistor (VVR) in operational amplifiers and tone controls.
5. Large scale integration (LSI) and computer memories because of very small size.

62
2.37. UJT (Uni-Junction Transistor):
Briefly explain the construction and working of UJT. (May 10, 15 Dec 11, 15, Dec-19,20,May2023)

 UJT is a 3 terminal semiconductor switching device.

 As it has only one PN junction and 3 leads, it resembles to a transistor, hence it is commonly
known as Uni-Junction Transistor.

Construction: Symbol Equivalent Circuit

 The UJT has three terminals: an emitter (E) and two bases (B1 and B2).
 It consists of lightly doped N type silicon bar in which heavily doped P type is diffused at one
end closed to Base2.
Working:
(i).When emitter terminal open:
 The total resistance between the two bases (B1 and B2) of UJT is called as inter base
resistance. The inter base resistance is given by,
R BB  R B 1  R B 2

Where, RB1- Resistance of Silicon bar between B1 and emitter junction.

RB2 - Resistance of Silicon bar between B2 and emitter junction.
 Let VBB be the voltage applied between B1 and B2. The voltage drop across RB1 is given by,
 R B1 
V T  V BB  
 R B1  R B2 
V T  V BB . 

R B1 R B1
  
R B1  R B 2 R BB

Where, . is intrinsic stand off ratio

 The ratio between emitter to base 1 resistance (RB1) and the total resistance (RBB) is called as
intrinsic stand-off ratio.

63
  The value of  ranges from 0.56 to 0.75.
 This voltage V1 reverse biases the diode (D) and no emitter current flows from B2 to emitter
due to minority carriers.
(ii) When positive voltage (VE) is applied to the emitter:
 The diode remains reverse biased as long as VE is less than V1. If exceeds V1, diode becomes
forward biased.
 Under this condition, holes from P-type are injected into N-type.
 These holes are repelled by B2 and attracted by B1.
 Accumulation of holes in emitter to B1 reduces the resistance (RB1) and hence emitter current
increases.
 As RB1 reduces, V1 reduces and hence VE decreases.
 The device is now in ON state. Thus, it exhibits a negative resistance region.
(iii) When negative voltage is applied to the emitter:
 The diode gets reverse biased and the emitter current is cut off. Now, the device is in “OFF”
state.
Discuss the characteristics of UJT. (Nov/Dec-2018)
Characteristics:

Vp-Peak voltage, Vv-Valley voltage

 When emitter voltage is up to peak point P i.e., VP, the diode is reverse biased.
 So, the region left of peak point is called cut off region. At point P, the diode starts
conducting.
 Hence, resistance decreases, thereby decreasing VE for the increase in IE. So, there is a
negative resistance region between peak point and valley point.
 After valley point, the device goes to saturation and UJT acts as an ordinary PN junction
diode.

64
 Applications:
 It is used in timing circuits, switching circuits and in phase control circuits
 It is used in saw tooth generator.
 It is used for pulse generation
 It can be used as a relaxation oscillator to obtain short pulses for triggering of SCRs.
2.37.UJT Relaxation Oscillator
Explain the working of UJT as a relaxation oscillator with necessary waveforms and derive the
expression for frequency of oscillation. (Dec 10, 11, 16 May 13, 16)
 The pulse signal required to drive the digital circuits can be obtained from a single stage
oscillator circuits using a particular device like unijunction transistor.
 Such a oscillator which uses UJT is called UJT Relaxation Oscillator.
 The basic circuit of UJT relaxation oscillator is shown in figure.

 The R1 and R2 are biasing resistances which are selected such that they are lower than interbase
resistances RB1 and RB2.
 The resistance RT and the capacitance CT decide the oscillating rate.
 The value of RT is so selected that operating point of UJT remains in the negative resistane
region.
 The characteristic of UJT shows the variation between emiiter voltage and emitter current.

65
Operation
 Capacitor CT gets charged through the resistance RT towards the supply voltage VBB . as long
as the capacitor voltage is less than the peak voltage VP , the emitter appear as an open circuit
VP = η VBB + VD ……………………………………(1)
 Where η is stand off ratio of UJT and VD is the cut in voltage of diode.
 When the capacitor voltage exceeds the peak voltage, the UJT fires (ON).
 The capacitor starts discharging through R1 + RB1 where RB1 is the internal base resistance. As
RB1 is negligible and hence capacitor discharges through R1 .
 While capacitor discharges through R1 it produces a pulse across R1.
 When the capacitor voltage falls below VV i.e. VC = VE = VV , the UJT gets turned OFF. The
capacitor starts charging again.
 The discharge time of pulse is controlled by the time constant CT R1 while the charging time
constant by RT CT . the waveforms are shown in figure.
 There is voltage drop across R2 and voltage rise across R1 , when UJT fires.

 The charging equation of the capacitor is given by,

66
 VC(t) = VV + VBB [ 1- e-t / CT RT ] ………………………..(2)
But VC(t) = VP at t = T
VP = VV + VBB [ 1- e-t / CT RT ]…………………………(3)
Using eqn. (1)
η VBB + VD = VV + VBB [ 1- e-t / CT RT ] …………………………………….(4)
neglecting VD and VV to get approximate relation for T.
η = 1- e-t / CT RT
T = RT CT ln [1 / 1-η]……………………………….(5)
fo = 1/T = 1 / (RT CT ln [1 / 1-η])…………………….(6)
where f0 = Oscillating frequeny
2.38. Differentiate BJT and UJT.

2.38.THYRISTOR
 A thyristor is a semiconductor device whose switching action depends on internal
regenerative feedback.
 Unlike BJT’s and FET’s a thyristor can be operated only as a switch. A thyristor can be
two terminal, three terminal or four terminal, unidirectional or bidirectional device.
Application what is application of UJT? (Nov/Dec-2018)
Control of large load for
 Motor, heaters, lighting systems and other similar devices.
Some of the commonly used members of the thyristors family are,
 Silicon controlled rectifier (SCR)
 Gate turn off thyristor (GTO)
 Diac

BJT-Bipolar Junction Transistor UJT-Uni-Junction Transistor

It has two PN junctions. It has only one PN junctions.
Three terminals present are emitter, base and Three terminals are emitter, base1 and
collector base2.
Basically an amplifying device. Basically a switching device
 Triac
 Insulated Gate Bipolar Transistor (IGBT)
 Power MOSFET.

67
Explain the construction, operation and characteristics of SCR. (Dec- 14, 16)
Outline the structure of a SCR and explain its operation. Also illustrate its V-I characteristics
(Apr/May-2019)
Explain the working of silicon controlled rectifier with neat diagram (May – 17, 18)
Explain the working of thyristor with neat diagram (Dec – 17)
Symbol:

Construction:

 It is a 4 layer (PNPN), 3 terminal device, in which end P layer is anode (A), end N layer is
cathode (K) and P layer nearer to cathode acts as a gate (G).
 The three terminals are taken out from these three layers (outer p layer, N layer and middle P
layer).
 The SCR is turned ON by passing current through the gate terminal.
 SCR’s are made up of silicon and not Germanium because leakage current in silicon is very
small compared to Germanium.
Working Principle
i) When Gate is open and ii) When Gate is closed.
i) When gate is open
 Consider the anode is positive with respect to cathode and gate is open.
 The junctions J1 and J3 are forward biased and junction J2 is reverse biased. There is depletion
region around J2 and only leakage current flows which is negligibly small.

68
  Practically the SCR is said to be OFF. This is called forward blocking state of SCR and
voltage applied to anode and cathode with anode positive is called forward voltage.
 With gate open, if cathode is made positive with respect to anode, the junctions J1 , J3 become
reverse biased and J2 forward biased.
 The voltage applied to make cathode positive is called reverse voltage and SCR is said to be in
reverse blocking state,
 If forward voltage is increased and made sufficiently large, the reverse biased junction J 2
breaks down and SCR conducts heavily.
 This voltage is called forward break over voltage 𝑽𝑩𝑶 of SCR.
 In such condition, SCR is said to be ON or triggered.

ii) When gate is closed

 Consider that the voltage is applied between gate and cathode when SCR is in forward
blocking state.
 The gate is made positive with respect to the cathode.
 The electrons from n – type cathode which are majority in number, cross the junction J 3 to
reach to positive of battery.
 While holes from p type move towards the negative of battery, this constitutes the gate current.
 This current increases the anode current as some of the electrons cross junction J2 .
 As anode current increases, more electrons cross the junction J 2 and the anode current
increases.
 Due to regenerative action, within short time, the junction J2 breaks and SCR conducts heavily.
 The resistance R is required to limit the current. Once the SCR is turned conducts, the gate
loses its control.
Characteristics of SCR:

 SCR acts as a switch, when it is forward biased.

 When gate is open (i.e.,) gate current IG is zero. Here the anode is positive and cathode is
negative.
 The junctions J1 and J3 are forward biased and J2 is reverse biased.
 When the applied voltage increases, forward current increases until it reaches break over
voltage (VBO).
 Forward break over voltage of SCR is the minimum forward voltage at which SCR starts
conducting.

69
  SCR will not conduct upto certain value of forward voltage when it is in forward condition. It
blocks the current up to this particular voltage.
 During this period leakage current only flows through the device which is very less. This
region is called as forward blocking region.
 Once firing takes place, current increases abruptly and voltage drop across the device
decreases sharply.
 At this point the device is switched to ON.
 To keep the device is in ‘ON’, the device requires a current called Holding current.
 When IG<0, the amount of reverse bias applied to J2 is increased. So the breakdown voltage
(VBO) is increased.
 When IG > 0, the amount of reverse bias applied to J2 is decreased. So the breakdown voltage
(VBO) is decreased.
 As the voltage at which SCR is switched ‘ON’ can be controlled by varying the gate current
(IG), it is commonly called as controlled switch.
Note: (SCR is also called as Thyristors).

Fig: Characteristics of SCR

Two Transistor Equivalent model of SCR:

 The device may be constituted by two transistors T1 (PNP) and T2 (NPN) connected back
to back.

70
 We can write, I b 1  I A  I e 1           (1 )

I e1
 The gain of first transistor:  
IA

I e1   1 I A

Substitute this in equation (1),

I b 1  I A   1 I A  I A (1   1 )              ( 2 )

From figure (2)  I B1  I C2              ( 3 )

IC2
The gain of sec ond transistor (as it is in CB mode)  2

I C1

IC2
2 
IK

I C 2   2 I K                      (4)

Substitute equation (3) in (2)  I C2  I A (1   1 )

Then substitut e equation (4)   2 I K  I A (1   1 )     (5)

W . K .T , For SCR : I K  I A  Ig        ( 6 ) {Cathode current  Anode  gate current}

Substitute (6) in (5)

 2 (I A
 Ig)  I A (1   1 )

 2 I A   2 Ig  I A   1 I A
 2 Ig  I A   1 I A   2 I A
 2 Ig  I A 1  (  1   2 ) 

 2 Ig
IA 
1  ( 1   2 )

71
  If ( 1   2 ) =1; IA=∞, the anode current IA suddenly reaches a very high current.
 The ability of the SCR to remain ON when the triggering current is removed is referred to as
latching.
 The device suddenly triggers into ON state from OFF state. This characteristic of SCR is called
Regenerative Action.
Thyristor Rating [Specification of SCR]:
 Latching current (IL): It is the minimum current to trigger the device (SCR) from its OFF
state to ON state.
 Holding current (IH): It is the minimum current required to hold the device (SCR) in ON
state.
 Gate current (Ig): It is the current applied to the gate to control the SCR.
Peak Inverse Vo ltage (PIV)
 Voltage safety factor (Vf): V f 
2 * RMS va lue of operating voltage

The value of Vf normally lies between 2 and 2.7.

 Break over voltage: It is defined as the minimum forward voltage with gate open at which
the SCR starts conducting heavily.
Advantages of SCR:
 It can handle and control large currents.
 Its switching speed is very high.
 It has no moving parts, therefore it gives noiseless operation.
 Its operating efficiency is high.
Applications:
 It can be used as a speed controller in DC and AC motors.
 It can be used as an inverter.
 It is used in battery chargers and for phase control and heater control.
 It is used in light dimming control circuits.
DIAC [Diode AC Switch]:
Construction:
 DIAC is 3 layers, two terminal semiconductor switching device. It has two junctions J1 and J2.
It does not have any control terminal.
Construction: symbol

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  The DIAC can be constructed in either NPN or PNP form.
 The two leads are connected to P regions of silicon separated by N region.
Operation:
Case i: When MT1 is positive with respect to MT2:

 The junction J1 becomes forward biased and the junction J2 becomes reverse biased.
 A small leakage current flows between the junction J1 and J2.
 If the voltage is increased to a large amount at a particular voltage called forward break over
voltage (VBO), avalanche breaks down occurs at the reverse biased junction J2 and large
amount of current flows between the terminals.
 Thus DIAC turns to ON state and exhibits negative resistance characteristics.

Case ii: When MT2 is positive with respect to MT1:

 The junction J2 becomes forward biased and the junction J1 becomes reverse biased.
 A small leakage current flows between the junction J1 and J2.
 If the voltage is increased to a large amount at a particular voltage called forward break over
voltage (VBO), avalanche breaks down occurs at the reverse biased junction J1 and large
amount of current flows between the terminals.
 Thus DIAC turns to ON state and exhibits negative resistance characteristics.
 Thus DIAC conducts in both directions.

VI Characteristics of DIAC:

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 Fig: V-I characteristics
 From the characteristics curve, it has identical characteristics for both positive and negative
cycles of AC signal.
 Hence DIAC acts as a switch in both directions.
 If the voltage is less than VBO, a very small amount of leakage current flows through the device
and the device remains in OFF state.
 When the voltage reaches VBO, the device starts conducting and exhibits negative resistance
Characteristics in which the current increases sharply and the voltage decreases. Thus DIAC turns
to ON state.
Applications:
 To trigger TRIAC
 Heat and Motor speed control
 Light dimmer circuits
TRIAC [Triode AC Switch]:
 TRIAC is a three terminal bidirectional semiconductor switching device.
 It can conduct in either forward or reverse direction.
 It is the combination of 2 SCR’s connected in parallel but in opposite direction.

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 Fig: Construction symbol
 The anode of one SCR is connected to the cathode of another SCR.
 The gates are connected together.
 It consists of 2 four layer switches in parallel and switches are P1N1P2 N2 and P2N1P1 N4.
 It has two main terminals namely Main Terminal (MT1), Main Terminal (MT2) and one
gate terminal (G).
 TRIAC acts as a switch for both directions.

Operations:

Fig: Equivalent circuit

 The different operating modes of TRIAC are,
 Keeping MT2 and G positive
 Keeping MT2 negative and G positive.
 Keeping MT2 positive and G negative.
 Keeping MT2 and G negative.

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 a) Mode 1 b) Mode 2 c) Mode 3 d) Mode 4

 The operation of TRIAC depends upon the polarity of voltage across its main terminal and
Gate.

Mode 1:  MT2 and G are positive.

 The current flows from MT2 to MT1 through the switch P1N1P2 N2.
Mode 2:  MT2 is negative and G is positive.
 The current flows from MT1 to MT2 through the switch P2N1P2 N2.
Mode 3:  MT2 is positive and G is negative.
 The current flows from MT2 to MT1 through the switch P1N1P2 N2.
 It is less efficient compared to mode 1.
Mode 4:  MT2 and G are negative.
 The current flows from MT1 to MT2 through the switch P2N1P2 N4.
 It is less efficient compared to mode 1.

 The mode 1 and mode 4 are efficient modes. So it is called as “Normal Mode”

VI Characteristics of TRIAC:
 From the characteristics curve, it is clear that TRIAC has identical characteristics for both
positive and negative cycles of AC signal.
 During positive half cycle MT2 is positive and SCR 1 is in ON state and the TRIAC operates
in Mode 1 and Mode 2.
 During negative half cycle MT1 is positive and SCR 2 is in ON state and the TRIAC operates
in Mode 3 and Mode 4.
 If the voltage is less than VBO, a very small amount of current called leakage current flows
through the device and the device remains in OFF state.
 When the voltage reaches VBO, the device starts conducting and exhibits negative resistance
Characteristics in which the current increases sharply and the voltage decreases. Thus DIAC
turns to ON state.

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 Fig: V-I characteristics
Applications:
 Heater and Motor speed control
 Phase control
 Static switch to turn a.c. power ON and OFF.

2.41. INSULATED GATE BIPOLAR TRANSISTOR (IGBT)

 The IGBT is the latest device in power electronics. It is obtained by combining the properties
of BJT and MOSFET.
 The gate circuit of MOSFET and collector emitter circuits of BJT are combined together to
form a new device called IGBT.
 Thus the IGBT has advantages of both BJT and MOSFETs.
 IGBT has three terminals: Gate (G), Collector(C) and emitter (E).
 Current flows from collector to emitter whenever a voltage between gate and emitter is applied.
 The IGBT is said to have turned ‘on’. When gate emitter voltage is removed, IGBT turns off.
 Thus gate has full control over the conduction of IGBT.

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41. Explain the construction, working and characteristics of IGBT (May 2016, 17)(Nov/Dec 21)
Construction of IGBT
 The structure of IGBT is similar to that of MOSFET except that the IGBT has additional p+
layer. This layer is collector (Drain) of IGBT.
 This p+ injecting layer is heavily doped. It has the doping intensity of 1019 per cm3.
 The doping of other layers is similar to that of MOSFET. 𝑛+ layers have 1019 per cm3.
 P type body region has doping level of 1016 per cm3
 𝑛− drift region is lightly doped 1014 per cm3
 The IGBTs which have 𝑛+ buffer layers are called punch through IGBTs. Such IGBTs have
asymmetric voltage blocking capabilities and have faster turn-off times. Hence they are used
for inverter and chopper circuits.
 The IGBTs without 𝑛+ buffer layers are called non punch through IGBTs. Such IGBTs have
symmetric voltage blocking capabilities. Hence they are used for rectifier circuits.

Operation of IGBT
 When 𝑉𝐺𝑆 > 𝑉𝐺𝑆 (threshold), then the channel of electrons is formed beneath the gate as shown
in figure.
 These electrons attract holes from 𝑝+ layer.
 Hence holes are injected from 𝑝+ layer into 𝑛− drift region.
 Thus hole/electron current starts flowing from collector to emitter.
 When holes enter p type body region, they attract more electrons from 𝑛+ layer.
 The electrons from 𝑛+ layer are further move to the 𝑛− drift region.
 Thus the holes and electrons are injected in large numbers in 𝑛− drift region.

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  This reduces the resistance of 𝑛− drift region. This is called conductivity modulation of 𝑛−
drift region. 𝑛− drift region

2.42. Characteristics of IGBT

There are two characteristics for IGBT

i) Steady state (V – I) or Output characteristics

ii) Transfer Characteristics

Steady state (V – I) or Output characteristics

 The following figure shows the V –I characteristics of n channel IGBT. The characteristics are
plotted for drain (collector) current 𝐼𝐷 with respect to drain source (collector emitter) voltage
𝑉𝐷𝑆 .
 The characteristics are plotted for different values of gate to source (𝑉𝐺𝑆 ) voltages.
 When the gate to source voltage is greater than threshold voltage 𝑉𝐺𝑆(𝑡ℎ) , then IGBT turns ON.
 When the gate to source voltage (𝑉𝐺𝑆 ) is less than threshold voltage 𝑉𝐺𝑆(𝑡ℎ) , then IGBT turns
OFF.
 The 𝐵𝑉𝐷𝑆𝑆 is the breakdown drain to source voltage when gate is open circuited.
 The IGBT is the popular device nowadays. IGBT has simples drive circuit and it has low on
state losses.
Transfer characteristics
 The drain current 𝐼𝐷 versus gate to source voltage 𝑉𝐺𝑆 is called transfer characteristics.
 This characteristic relates variation in output current with respect to variation in input voltage.
 Transfer characteristics are linear over the most of the range of drain currents.
 The characteristics becomes nonlinear when gate to source voltage approaches 𝑉𝐺𝑆(𝑡ℎ) .

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 When the gate to source voltage (𝑉𝐺𝑆 ) is less than threshold voltage 𝑉𝐺𝑆(𝑡ℎ) , then IGBT goes in
OFF state.

Fig. output characteristics Fig; Transfer characteristics

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