DTM Sorted Question
DTM Sorted Question
1.2 Number systems - Decimal, Binary, Octal, and Hexadecimal and conversions
• Winter 2024: Q2(a) Describe Gray to binary and binary to Gray code conversion with
example.
• Winter 2024: Q1(a) Define 1’s complement and write example of it.
1.5 Applications of digital circuits; TTL, CMOS, ECL; Characteristics of digital ICs
• Winter 2018: Q1(b) Define terms “Minterm” and “Maxterm” with proper example of
each.
• Winter 2024: Q2(b) Minimize the following expression using K-map and realize it
using basic logic gates: Y = Σm(1, 3, 4, 5, 6, 7)
• Winter 2018: Q2(b) Convert the given minterm into standard POS form Y(A,B,CD) =
(A·BC) + (B·C D) + (A B)
• Winter 2018: Q4(b) Minimize and draw logic circuit using basic gates F(A,B,CD) =
πm {0, 2, 4, 6, 7, 10, 11, 14, 15}
• Winter 2018: Q3(d) Simplify Y = Σm (1, 2, 8, 9, 10, 12, 13) + d (4,5) using K-MAP
2.4 Half Adder and Half Subtractor using K-MAP
• Winter 2024:
o Q1(b) Define Multiplexer and list types of Multiplexer.
o Q6(a)(1) Implement the logical expression Y = A'BC + A'B'C + AB'C using
8:1 MUX.
o Q6(a)(2) Draw circuit diagram of 1:4 DEMUX using logic gates. Write its
truth table.
• Winter 2018: Q4(e) Draw 16:1 multiplexer using 4:1 multiplexers ONLY with proper
labels.
• Winter 2024:
o Q1(c) List the types of triggering.
o Q2(d) Describe working of JK flip-flop using NAND gates with truth table.
o Q3(c) Draw the block schematic of D flip-flop. Explain its working with truth
table.
• Winter 2018:
o Q1(c) Draw symbol of JK flip-flop and write its truth table.
o Q2(c) Clocked R-S and T flip-flop symbols, truth tables, applications.
o Q3(c) Draw waves for positive and negative edge triggering.
• Winter 2024:
o Q1(d) Draw the format of 8086 Flag register.
o Q1(f) Classify the general purpose and segment register of 8086.
o Q2(c) Describe concept of memory segmentation of 8086.
o Q5(b) Describe the physical address generation of 8086 with example.
• Winter 2018:
o Q1(d) State importance of pipelining in 8086 microprocessor.
o Q1(f) Define physical and effective address.
o Q6(a) Draw architectural block diagram of 8086 and describe function.
• Winter 2018: Q4(d)(i) Differentiate between RISC and CISC processor (3 points)
• Winter 2024:
o Q1(g) State function of STC and AAA instructions.
o Q5(c) Write instructions for:
1. Divide 20H by 5H
2. Rotate content of AX by 4-bit to right
3. Logical AND of AX & BX
o Q6(c) Write function of MOV, MUL, ADD, INC instructions (6 variations)
• Winter 2018: Q3(b) Explain PUSH, DAA, IDJV, XOR for 8 and 16 bit data
• Winter 2018: Q1(g) Choose instruction for:
o Addition with carry
o Division of 8-bit
o Rotate BL
o AND of AX, BX
• Repeated in:
o Winter 2024
o Summer 2023
o Summer 2019
• Times Asked: 3
• Repeated in:
o Winter 2024
o Winter 2018
• Times Asked: 2
• Repeated in:
o Winter 2024
o Winter 2018
• Times Asked: 2
• Repeated in:
o Summer 2023
o Winter 2024
• Times Asked: 2
• Repeated in:
o Winter 2024
o Summer 2023
• Times Asked: 2
• Repeated in:
o Winter 2024
o Winter 2022
• Times Asked: 2
• Repeated in:
o Winter 2024
o Winter 2018
• Times Asked: 2
• Repeated in:
o Winter 2024
o Winter 2022
• Times Asked: 2
• Repeated in:
o Winter 2024
o Winter 2018
• Times Asked: 2
10. Implement logical expression using 8:1 multiplexer.
• Repeated in:
o Winter 2024
o Winter 2019
• Times Asked: 2
• Repeated in:
o Winter 2024
o Summer 2022
• Times Asked: 2
• Repeated in:
o Winter 2024
o Summer 2023
• Times Asked: 2
• Repeated in:
o Winter 2024
o Winter 2022
• Times Asked: 2
15. Draw symbol and write truth table of JK flip-flop.
• Repeated in:
o Winter 2024
o Winter 2018
• Times Asked: 2
• Repeated in:
o Winter 2024
o Winter 2022
• Times Asked: 2
• Repeated in:
o Winter 2024
o Summer 2022
• Times Asked: 2